Doped semiconductor nanocrystal layers and preparation thereof

Abstract

The present invention relates to a doped semiconductor nanocrystal layer comprising (a) a group IV oxide layer which is free of ion implantation damage, (b) from 30 to 50 atomic percent of a semiconductor nanocrystal distributed in the group IV oxide layer, and (c) from 0.5 to 15 atomic percent of one or more rare earth element, the one or more rare earth element being (i) dispersed on the surface of the semiconductor nanocrystal and (ii) distributed substantially equally through the thickness of the group IV oxide layer. The present invention also relates to a semiconductor structure comprising the above semiconductor nanocrystal layer and to processes for preparing the semiconductor nanocrystal layer.

Description

FIELD OF THE INVENTION

[0002] The present invention relates to semiconductor nanocrystal layers doped with rare earth elements, to semiconductor structures comprising these semiconductor nanocrystal layers, and to processes for preparing the semiconductor nanocrystal layers doped with rare earth elements.

BACKGROUND OF THE INVENTION

[0003] Silicon has been a dominant semiconductor material in the electronics industry, but it does have a disadvantage in that it has poor optical activity due to an indirect band gap. This poor optical activity has all but excluded silicon from the field of optoelectronics. In the past two decades there have been highly motivated attempts to develop a silicon-based light source that would allow one to have combined an integrated digital information processing and an optical communications capability into a single silicon-based integrated structure. For a silicon-based light source (silicon Light Emitting Diode (LED)) to be of any practical use, it should (1) emit at a technologically important wavelength, (2) achieve its functionality under practical conditions (e.g. temperature and pump power), and (3) offer competitive advantage over existing technologies.

[0004] One material that has gathered much international attention is erbium (Er) doped silicon (Si). The light emission from Er-doped Si occurs at the technological important 1.5 micron (μm) wavelength. Trivalent erbium in a proper host can have a fluorescence of 1540 nm due to the 4I13/2→4I15/2 intra-4f transition. This 1540 nm fluorescence occurs at the minimum absorption window of the silica-base telecommunication fibre optics field. There is great interest in Er doping of silicon as it holds the promise of silicon based optoelectronics from the marriage of the vast infrastructure and proven information processing capability of silicon integrated circuits with the optoelectronics industry. Theoretical and experimental results also suggest that Er in Si is Auger-excited via carriers, generated either electrically or optically, that are trapped at the Er-related defect sites and then recombine, and that this process can be very efficient due to strong carrier-Er interactions. However, if this strong carrier-Er interaction is attempted in Er-doped bulk Si, the efficiency of the Er3+ luminescence is reduced at practical temperature and pump powers.

[0005] Recently, it has been demonstrated that using silicon-rich silicon oxide (SRSO), which consists of Si nanocrystals embedded in a SiO2 (glass) matrix, reduces many of the problems associated with bulk Si and can have efficient room temperature Er3+ luminescence. The Si nanocrystals act as classical sensitizer atoms that absorb incident photons and then transfer the energy to the Er3+ ion, which then fluoresce at the 1.5 micron wavelength with the following significant differences. First, the absorption cross section of the Si nanocrystals is larger than that of the Er3+ ions by more than 3 orders of magnitude. Second, as excitation occurs via Auger-type interaction between carriers in the Si nanocrystals and Er3+ ions, incident photons need not be in resonance with one of the narrow absorption bands of Er3+. However, existing approaches to developing such Si nanocrystals have only been successful at producing concentrations of up to 0.3 atomic percent of the rare earth element, which is not sufficient for practical applications.

[0006] In general, manufacture of type IV semiconductor nanocrystals doped with a rare earth element is done by ion implantation of silicon ions into a silicon oxide layer, followed by high temperature annealing to grow the silicon nanocrystals and to reduce the ion implantation damage. The implantation of Si ions is followed by an ion implantation of the rare earth ions into the annealed silicon nanocrystal oxide layer. The resulting layer is again annealed to reduce the ion implant damage and to optically activate the rare-earth ion.

[0007] There are several problems with this method: i) it results in a decreased layer surface uniformity due to the ion implantation; ii) it requires an expensive ion implantation step; iii) it fails to achieve a uniform distribution of group IV semiconductor nanocrystals and rare-earth ions unless many implantation steps are carried out; and iv) it requires a balance between reducing the ion implant damage by thermal annealing while trying to maximise the optically active rare-earth.

[0008] To diminish the above drawbacks, Plasma Enhanced Chemical Vapor Deposition (PECVD) has been utilised to make type IV semiconductor nanocrystal layers. The prepared layers are then subjected to a rare-earth ion implantation step and a subsequent annealing cycle to form the IV semiconductor nanocrystals, and to optically activate the rare-earth ions that are doped in the nanocrystal region. Unfortunately, the layers prepared with this method are still subjected to an implantation step, which results in a decrease in surface uniformity.

[0009] Another PECVD method that has been used to obtain a doped type IV semiconductor crystal layer consists of co-sputtering together both the group IV semiconductor and rare-earth metal. In this method, the group IV semiconductor and a rare-earth metal are placed into a vacuum chamber and exposed to an Argon ion beam. The argon ion beam sputters off the group IV semiconductor and the rare-earth metal, both of which are deposited onto a silicon wafer. The film formed on the silicon wafer is then annealed to grow the nanocrystals and to optically activate the rare-earth ions. As the rare earth metal is in solid form, the argon ion beam (plasma) is only able to slowly erode the rare earth, which leads to a low concentration of rare earth metal in the deposited film. While higher plasma intensity could be used to more quickly erode the rare earth metal and increase the rare earth concentration in the film, a higher intensity plasma damages the film or the group IV semiconductor before it is deposited. The plasma intensity is therefore kept low to preserve the integrity of the film, therefore limiting the rare earth concentration in the film. The doped group IV semiconductor nanocrystal layers made through this method have the drawbacks that: i) the layer does not have a very uniform distribution of nanocrystals and rare-earth ions, ii) the layer suffers from upconversion efficiency losses due to rare-earth clustering in the film, and iii) the concentration of rare earth metal in the layer is limited by the plasma intensity, which is kept low to avoid damaging the layer.

[0010] The concentration of the rare earth element in semiconductor nanocrystal layers is preferably as high as possible, as the level of photoelectronic qualities of the film, such as photoluminescence, is proportional to the concentration. One problem encountered when a high concentration of rare earth element is present within the semiconductor layer is that when two rare earth metals come into close proximity with one another, a quenching relaxation interaction occurs that reduces the level of photoelectronic dopant response observed. The concentration of rare earth element within a semiconductor film is thus balanced to be as high as possible to offer the most fluorescence, but low enough to limit the quenching interactions.

SUMMARY OF THE INVENTION

[0011] In one aspect, the present invention provides a doped semiconductor nanocrystal layer, the doped semiconductor nanocrystal layer comprising (a) a group IV oxide layer which is free of ion implantation damage, (b) from 30 to 50 atomic percent of a semiconductor nanocrystal distributed in the group IV semiconductor oxide layer, and (c) from 0.5 to 15 atomic percent of one or more rare earth element, the one or more rare earth element being (i) dispersed on the surface of the semiconductor nanocrystal and (ii) distributed substantially equally through the thickness of the group IV oxide layer.

[0012] In another aspect, the present invention provides a semiconductor structure comprising a substrate, on which substrate is deposited one or more of the doped semiconductor nanocrystal layer described above.

[0013] In another aspect, the present invention provides a process for preparing a doped semiconductor nanocrystal layer, the process comprising:

[0014] (a) subjecting a target comprising a mixture of (i) a powdered group IV binding agent, (ii) a powdered semiconductor selected from a group IV semiconductor, a group II-VI semiconductor and a group III-V semiconductor, and (iii) a powdered rare earth element, the rare earth element being present in concentration of 0.5 to 15 atomic percent, to a pulse laser deposition procedure to deposit a semiconductor rich group IV oxide layer doped with a rare earth element, and

[0015] (b) annealing the semiconductor rich group IV oxide layer doped with a rare earth element at a temperature of from 600° C. to 1000° C.

[0016] In another aspect, the present invention provides a process for preparing a doped semiconductor nanocrystal layer, the process comprising:

[0017] (a) introducing (i) a gaseous mixture of a group IV element precursor and molecular oxygen, and (ii) a gaseous rare earth element precursor, in a plasma stream of a Plasma Enhanced chemical Vapor Deposition (PECVD) instrument to form a semiconductor rich group IV oxide layer doped with a rare earth element, and

[0018] (b) annealing the semiconductor rich group IV oxide layer doped with a rare earth element at a temperature of from 600° C. to 1000° C.

[0019] The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying figures which illustrate preferred embodiments of the present invention by way of example.

DESCRIPTION OF THE FIGURES

[0020] Embodiments of the invention will be discussed with reference to the following Figures:

[0021] FIG. 1 is a diagram of a semiconductor structure comprising a substrate, a doped semiconductor nanocrystal layer, and a current injection layer;

[0022] FIG. 2 is a diagram of a superlattice semiconductor structure comprising a substrate and alternating doped semiconductor nanocrystal layers and dielectric layers; and

[0023] FIG. 3 is a diagram of a Pulse Laser Deposition apparatus.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Doped Semiconductor Nanocrystal Layer

[0025] The doped semiconductor nanocrystal layer of the invention comprises a group IV oxide layer in which is distributed semiconductor nanocrystals. The group IV element used to prepare the layer is preferably selected from silicon, germanium, tin and lead, and the group IV semiconductor oxide layer is more preferably silicon dioxide. The group IV oxide layer preferably has a thickness of from 1 to 2000 nm, for example of from 80 to 2000 nm, from 100 to 250 nm, from 30 to 50 nm, or from 1 to 10 nm.

[0026] The semiconductor nanocrystals that are dispersed within the group IV semiconductor oxide layer are preferably the nanocrystal of a group IV semiconductor, e.g. Si or Ge, of a group II-VI semiconductor, e.g. ZnO, ZnS, ZnSe, CaS, CaTe or CaSe, or of a group III-V semiconductor, e.g. GaN, GaP or GaAs. The nanocrystals are preferably from 1 to 10 nm in size, more preferably from 1 to 3 nm in size, and most preferably from 1 to 2 nm in size. Preferably, the nanocrystals are present within the group IV semiconductor oxide layer in a concentration of from 30 to 50 atomic percent, more preferably in a concentration of 37 to 47 atomic percent, and most preferably in a concentration of from 40 to 45 atomic percent.

[0027] The one or more rare earth element that is dispersed on the surface of the semiconductor nanocrystal can be selected to be a lanthanide element, such as cerium, praseodymium, neodymium, promethium, gadolinium, erbium, thulium, ytterbium, samarium, dysprosium, terbium, europium, holmium, or lutetium, or it can be selected to be an actinide element, such as thorium. Preferably, the rare earth element is selected from erbium, thulium, and europium. The rare earth element can, for example, take the form of an oxide or of a halogenide. Of the halogenides, rare earth fluorides are preferred as they display more intense fluorescence due to field distortions in the rare earth-fluoride matrix caused by the high electronegativity of fluorine atoms. Most preferably, the rare earth element is selected from erbium oxide, erbium fluoride, thulium oxide, thulium fluoride, europium oxide and europium fluoride.

[0028] The one or more rare earth element is preferably present in the group IV semiconductor oxide layer in a concentration of 0.5 to 15 atomic percent, more preferably in a concentration of 5 to 15 atomic percent and most preferably in a concentration of 10 to 15 atomic percent. While such a high concentration of rare earth element has led to important levels of quenching reactions in previous doped semiconductor materials, the doped semiconductor nanocrystal layer of the present invention can accommodate this high concentration as the rare earth element is dispersed on the surface of the semiconductor nanocrystal, which nanocrystal offers a large surface area. The reduced amount of quenching reactions between the rare earth element and the proximity of the rare earth element to the semiconductor nanocrystal provide the basis for a doped semiconductor nanocrystal layer that offers improved optoelectronic properties.

[0029] Semiconductor Structure

[0030] Using the doped semiconductor nanocrystal layer described above, a multitude of semiconductor structures can be prepared. For example, a semiconductor structure is shown in FIG. 1, in which one or more layers 33 of the doped semiconductor nanocrystal layer are deposited on a substrate 31.

[0031] The substrate on which the semiconductor nanocrystal layer is formed is selected so that it is capable of withstanding temperatures of up to 1000° C. Examples of suitable substrates include silicon wafers or poly silicon layers, either of which can be n-doped or p-doped (for example with 1×1020 to 5×1021 of dopants per cm3), fused silica, zinc oxide layers, quartz and sapphire substrates. Some of the above substrates can optionally have a thermally grown oxide layer, which oxide layer can be of up to about 2000 nm in thickness, a thickness of 1 to 20 nm being preferred. The thickness of the substrate is not critical, as long as thermal and mechanical stability is retained.

[0032] The semiconductor structure can comprise a single or multiple doped semiconductor nanocrystal layers, each layer having an independently selected composition and thickness. By using layers having different rare earth elements, a multi-color emitting structure can be prepared. For example, combining erbium, thulium and europium in a single semiconductor structure provides a structure that can fluoresce at the colors green (erbium), blue (thulium), and red (europium).

[0033] When two or more doped semiconductor nanocrystal layers are used in a single semiconductor structure, the layers can optionally be separated by a dielectric layer. Examples of suitable dielectric layers include silicon dioxide, silicon nitrite and silicon oxy nitrite. The silicon dioxide dielectric layer can also optionally comprise semiconductor nanocrystals. The dielectric layer preferably has a thickness of from 1 to 10 nm, more preferably of 1 to 3 nm and most preferably of about 1.5 nm. The dielectric layer provides an efficient tunnelling barrier, which is important for obtaining high luminosity from the semiconductor structure.

[0034] The semiconductor structure can also have an Indium Tin Oxide (ITO) current injection layer (34) overtop the one or more doped semiconductor nanocrystal layers. The ITO layer preferably has a thickness of from 150 to 300 nm. Preferably, the chemical composition and the thickness of the ITO layer is such that the semiconductor structure has a conductance of from 30 to 70 ohms cm.

[0035] The thickness of the semiconductor structure is preferably 2000 nm or less, and the thickness will depend on the thickness of the substrate, the number and thickness of the doped semiconductor nanocrystal layers present, the number and the thickness of the optional dielectric layers, and the thickness of the optional ITO layer.

[0036] One type of preferred semiconductor structure provided by an embodiment of the present invention is a superlattice structure, shown by way of example in FIG. 2, which structure comprises multiple layers of hetero-material 20 on a substrate 11. Multiple doped semiconductor nanocrystals layers having a thickness of from 1 nm to 10 nm are deposited on the substrate 12 and 14, and the doped semiconductor nanocrystals layers can comprise the same or different rare earth elements. Optionally, the doped semiconductor nanocrystal layers are separated by dielectric layers 13 of about 1.5 nm in thickness, and an ITO current injection layer (not shown) can be deposited on top of the multiple layers of the superlattice structure. There is no maximum thickness for the superlattice structure, although a thickness of from 250 to 2000 nm is preferred and a thickness of from 250 to 750 nm is more preferred.

[0037] Preparation of the Doped Semiconductor Nanocrystal Layer

[0038] The preparation of the doped semiconductor nanocrystal layer comprises the following two general steps:

[0039] (a) the simultaneous deposition of a semiconductor rich group IV oxide layer and of one or more rare earth element; and

[0040] (b) the annealing of the semiconductor rich group IV oxide layer prepared in (a) to form semiconductor nanocrystals.

[0041] The semiconductor rich group IV oxide layer comprises a group IV oxide layer, which group IV oxide is preferably selected from SiO2 or GeO2, in which group IV oxide layer is dispersed a rare earth element and a semiconductor, which semiconductor can be the same as, or different than, the semiconductor that forms the group IV oxide layer.

[0042] By “semiconductor rich”, it is meant that an excess of semiconductor is present, which excess will coalesce to form nanocrystals when the semiconductor rich group IV oxide layer is annealed. Since the rare earth element is dispersed within the oxide layer when the nanocrystals are formed, the rare earth element becomes dispersed on the surface of the semiconductor nanocrystals upon nanocrystal formation.

[0043] Since the semiconductor rich group IV oxide layer and the one or more rare earth element are deposited simultaneously, ion implantation of the rare earth element is avoided. As such, the group IV oxide layer surface is free of the damage associated with an implantation process. Also, since the rare earth element is deposited at the same time as the semiconductor rich group IV oxide layer, the distribution of the rare earth element is substantially constant through the thickness of the group IV oxide layer.

[0044] The deposition of the semiconductor rich group IV oxide layer doped with one or more rare earth elements is preferably carried out by Plasma-Enhanced Chemical Vapor Deposition (PECVD) or by Pulse Laser Deposition (PLD). The above two methods each have their respective advantages for preparing the semiconductor rich group IV oxide layer doped with one or more rare earth elements, and the methods are described below.

[0045] Pulse Laser Deposition

[0046] Pulse laser deposition is advantageous for the deposition of the semiconductor rich group IV oxide layer doped with one or more rare earth elements as it permits the deposition of a wide variety of semiconductors and a wide variety of rare earth elements.

[0047] Referring now to FIG. 3, which shows by way of a diagram a typical set up of a pulse laser deposition apparatus, the pulse laser deposition apparatus consists of a large chamber 41, which can be evacuated down to at least 10−7 bars or pressurized with up to 1 atmosphere of a gas such as oxygen, nitrogen, helium, argon, hydrogen or combinations thereof. The chamber has at least one optical port 42 in which a pulse laser beam 45 can be injected to the chamber and focused down onto a suitable target 44. The target is usually placed on a carrousel 43 that allows the placement of different target samples into the path of the pulse laser focus beam. The carrousel is controlled so that multiple layers of material can be deposited by the pulse laser ablation of the target. The flux of the focused pulse laser beam is adjusted so that the target ablates approximately 0.1 nm of thickness of material on a substrate 47, which can be held perpendicular to the target and at a distance of 20 to 75 millimetres above the target. This flux for instance is in the range of 0.1 to 20 joules per square cm for 248 nm KrF excimer laser and has a pulse width of 20-45 nanosecond duration. The target can be placed on a scanning platform so that each laser pulse hits a new area on the target, thus giving a fresh surface for the ablation process. This helps prevent the generation of large particles, which could be ejected in the ablation plume 46 and deposited on to the substrate. The substrate is usually held on a substrate holder 48, which can be heated from room temperature up to 1000° C. and rotated from 0.1 to 30 RPM depending on the pulse rate of the pulse laser, which in most cases is pulsed between 1-10 Hz. This rotation of the substrate provides a method of generating a uniform film during the deposition process. The laser is pulsed until the desired film thickness is met, which can either be monitored in real time with an optical thickness monitor or quartz crystal microbalance or determined from a calibration run in which the thickness is measured from a given flux and number of pulses. Pulse laser deposition can be used for depositing layers of from 1 to 2000 nm in thickness.

[0048] For the preparation of a semiconductor rich group IV oxide layer doped with one or more rare earth elements, the target that is ablated is composed of mixture of a powdered group IV binding agent, a powdered semiconductor that will form the nanocrystal, and a powdered rare earth element. The ratio of the various components found in the doped semiconductor nanocrystal layer is decided at this stage by controlling the ratio of the components that form the target. Preferably, the mixture is placed in a hydraulic press and pressed into a disk of 25 mm diameter and 5 mm thickness with a press pressure of at least 500 Psi while being heated to 700° C. The temperature and pressure can be applied, for example, for one hour under reduced pressure (e.g. 10−3 bars) for about one hour. The press pressure is then reduced and the resulting target is allowed to cool to room temperature.

[0049] The group IV binding agent can be selected to be a group IV oxide (e.g. silicon oxide, germanium oxide, tin oxide or lead oxide), or alternatively, it can be selected to be a group IV element (e.g. silicon, germanium, tin or lead). When the group IV binding agent is a group IV oxide, the binding agent, the semiconductor and the rare earth element are combined to form the target, and the pulse laser deposition is carried out in the presence of any one of the gases listed above. If a group IV element is used as the group IV binding agent instead, the pulse laser deposition is carried out under an oxygen atmosphere, preferably at a pressure of from 1×10−4 to 5×10−3 bar, to transform some or all of the group IV element into a group IV oxide during the laser deposition process. When the semiconductor element which is to form the nanocrystals is selected to be a group II-VI semiconductor (e.g. ZnO, ZnS, ZnSe, CaS, CaTe or CaSe) or a group III-V semiconductor (e.g. GaN, GaP or GaAs), the oxygen concentration is kept high to insure that all of the group IV element is fully oxidized. Alternatively, if the nanocrystals to be formed comprise the same group IV semiconductor element that is being used as the binding agent, the oxygen pressure is selected so that only part of the group IV element is oxidized. The remaining non-oxidized group IV element can then coalesce to form nanocrystals when the prepared semiconductor rich group IV oxide layer is annealed.

[0050] The powdered rare earth element that is used to form the target is preferably in the form of a rare earth oxide or of a rare earth halogenide. As mentioned above, the rare earth fluoride is the most preferred of the rare earth halogenides.

[0051] Pulse laser deposition is useful for the subsequent deposition of two or more different layers. Multiple targets can be placed on the carrousel and the pulse laser can be focussed on different targets during the deposition. Using this technique, layers comprising different rare earth elements can be deposited one on top of the other to prepare semiconductor structures as described earlier. Different targets can also be used to deposit a dielectric layer between the semiconductor rich group IV oxide layers, or to deposit a current injection layer on top of the deposited layers. Pulse laser deposition is the preferred method for preparing the superlattice semiconductor structure described above.

[0052] Preparation of the semiconductor rich group IV oxide layer doped with one or more rare earth elements can of course be carried out with different pulse laser deposition systems that are known in the art, the above apparatus and process descriptions being provided by way of example.

[0053] Plasma Enhanced Chemical Vapor Deposition

[0054] PECVD is advantageous for the deposition of the semiconductor rich group IV oxide layer doped with one or more rare earth element, as it permits the rapid deposition of the layer. The thickness of the semiconductor rich group IV oxide layer doped with one or more rare earth element prepared with PECVD is 10 nm or greater, more preferably from 10 to 2000 nm.

[0055] Formation of a non-doped type IV semiconductor nanocrystal layer through chemical vapor deposition has been described, for example, by J. Sin, M. Kim, S. Seo, and C. Lee [Applied Physics Letters, (1998), Volume 72, 9, 1092-1094], the disclosure of which is hereby incorporated by reference.

[0056] In this embodiment, the doped semiconductor nanocrystal layer is prepared by incorporating a rare-earth precursor into the PECVD stream above the receiving heated substrate on which the semiconductor film is grown. PECVD can be used to prepare the doped semiconductor nanocrystal layer where the semiconductor nanocrystal is a silicon or a germanium nanocrystal, and where the rare earth element is a rare earth oxide.

[0057] In the PECVD process, a group IV element precursor is mixed with oxygen to obtain a gaseous mixture where there is an atomic excess of the group IV element. An atomic excess is achieved when the ratio of oxygen to group IV element is such that when a group IV dioxide compound is formed, there remains an excess amount of the group IV element. The gaseous mixture is introduced within the plasma stream of the PEVCD instrument, and the silicon and the oxygen are deposited on a substrate as a group IV dioxide layer in which a group IV atomic excess is found. It is this excess amount of the group IV element that coalesces during the annealing step to form the group IV nanocrystal. For example, to prepare a silicon dioxide layer in which silicon nanocrystals is dispersed, a silicon rich silicon oxide (SRSO) layer is deposited on the substrate.

[0058] The group IV element precursor can contain, for example, silicon, germanium, tin or lead, of which silicon and germanium are preferred. The precursor itself is preferably a hydride of the above elements. A particularly preferred group IV element precursor is silane (SiH4).

[0059] The ratio (Q) of group IV element precursor to oxygen can be selected to be from 3:1 to 1:2. If an excess of group IV element precursor hydride is used, the deposited layer can contain hydrogen, for example up to approximately 10 atomic percent hydrogen. The ratio of the flow rates of the group IV element precursor and of oxygen can be kept, for example, between 2:1 and 1:2.

[0060] Also introduced to the plasma stream is a rare earth element precursor, which precursor is also in the gaseous phase. The rare earth precursor is added to the plasma stream at the same time as the group IV element precursor, such that the rare earth element and the group IV element are deposited onto the substrate simultaneously. Introduction of the rare earth precursor as a gaseous mixture provides better dispersion of the rare earth element within the group IV layer. Preferably, presence of oxygen in the plasma stream and in the deposited layer leads to the deposition of the rare earth element in the form of a rare earth oxide.

[0061] The rare earth element precursor comprises one or more ligands. The ligand can be neutral, monovalent, divalent or trivalent. Preferably, the ligand is selected so that when it is coordinated with the rare earth element, it provides a compound that is volatile, i.e. that enters the gaseous phase at a fairly low temperature, and without changing the chemical nature of the compound. The ligand also preferably comprises organic components that, upon exposure to the plasma in the PECVD apparatus, will form gaseous by-products that can be removed through gas flow or by reducing the pressure within the PECVD apparatus. When the organic components of the ligand are conducive to producing volatile by-products (e.g. CO2, O2) less organic molecules are incorporated into the deposited layer. Introduction of organic molecules into the deposited layer is generally not beneficial, and the presence of organic molecules is sometimes referred to as semiconductor poisoning.

[0062] Suitable ligands for the rare earth element can include acetate functions, for example 2,2,6,6-tetramethyl-3,5-heptanedione, acetylacetonate, flurolacetonate, 6,6,7,7,8,8,8-heptafluoro-2,2-dimethyl-3,5-octanedione, i-propylcyclopentadienyl, cyclopentadienyl, and n-butylcyclopentadienyl. Preferred rare earth metal precursor include tris(2,2,6,6-tetramethyl-3,5-heptanedionato) erbium(III), erbium (III) acetylacetonate hydrate, erbium (III) flurolacetonate, tris(6,6,7,7,8,8,8-heptafluoro-2,2-dimethyl-3,5-octanedionate)erbium (III), tris(i-propylcyclopentadienyl)erbium (III), Tris(cyclopentadienyl)erbium (III), and tris(n-butylcyclopentadienyl)erbium (III). A particularly preferred rare earth element precursor is tris(2,2,6,6-tetramethyl-3,5-heptanedionato) erbium(III) (Er+3 [(CH3)3CCOCH═COC(CH3)3]3), which is also referred to as Er+3 (THMD)3.

[0063] If the rare earth element precursor is not in the gaseous phase at room temperature, it must be transferred to the gaseous phase, for example, by heating in an oven kept between 80° C. and 110° C. The gaseous rare earth element precursor is then transferred to the plasma stream with an inert carrier gas, such as argon. The gaseous rare earth element precursor is preferably introduced to the plasma at a position that is below a position where the group IV element containing compound is introduced to the plasma. Use can be made of a dispersion mechanism, for example a dispersion ring, to assist in the dispersion of the gaseous rare earth element precursor in the plasma.

[0064] In order to obtain a more even deposition of the doped type IV oxide layer, the substrate can be placed on a sceptre that rotates during deposition. A circular rotation of about 3 rpm is suitable for increasing the uniformity of the layer being deposited.

[0065] An Electron Cyclotron Resonated (ECR) reactor is suitable for producing the plasma used in the PECVD method described above. ECR is a particular method of generating plasma, where the electrons have a spiral motion caused by a magnetic field, which allows a high density of ions in a low-pressure region. The high ion density with low pressure is beneficial for deposition, as the rare earth metal precursor can be stripped of its organic components and incorporated uniformly and in a high concentration. The plasma used in the PECVD method can comprise, for example, argon, helium, neon or xenon, of which argon is preferred.

[0066] The PECVD method is carried out under a reduced pressure, for example 1×10−7 torr, and the deposition temperature, microwave power and scepter bias can be kept constant. Suitable temperature, microwave and scepter bias values can be selected to be, for example, 300° C., 400 W and −200 VDC, respectively.

[0067] The semiconductor rich group IV oxide layer doped with one or more rare earth element can be grown at different rates, depending on the parameters used. A suitable growth rate can be selected to be about 60 nm per minute, and the semiconductor rich group IV oxide layer can have a thickness of from 10 to 2000 nm, more preferably of from 100 to 250 nm.

[0068] Preparation of the semiconductor rich group IV oxide layer doped with one or more rare earth elements can of course be carried out with different plasma enhanced chemical vapor deposition systems that are known in the art, the above apparatus and process descriptions being provided by way of example.

[0069] Annealing Step

[0070] After the semiconductor rich group IV oxide layer doped with one or more rare earth element has been prepared, the doped type IV oxide layer is annealed, optionally under flowing nitrogen (N2), in a Rapid Thermal Anneal (RTA) furnace, at from about 600° C. to about 1000° C., more preferably from 800° C. to 950° C., from 5 minutes to 30 minutes, more preferably from 5 to 6 minutes. It is during the annealing step that the atomic excess of semiconductor is converted into semiconductor nanocrystals.

[0071] When PECVD is used to prepare the semiconductor rich group IV oxide layer doped with one or more rare earth element, the annealing step can also be carried out under an oxygen atmosphere to insure oxidation of the rare earth element, or under a reduced pressure in order to facilitate the removal of any volatile by-products that might be produced.

[0072] The amount of excess semiconductor in the group IV oxide layer and the anneal temperature dictate the size and the density of the semiconductor nanocrystal present in the final doped semiconductor nanocrystal layer.

[0073] Since the rare earth element is well dispersed through the deposited group IV semiconductor oxide layer, when the nanocrystals are formed during the annealing step, the rare earth element becomes localised on the surface of the nanocrystals. Since the nanocrystals provide a large surface area on which the rare earth element can be dispersed, the concentration of the rare earth element can be quite elevated, while retaining good photoelectronic properties.

[0074] The following examples are offered by way of illustration and not by way of limitation.

EXAMPLES

Example 1

[0075] Silane (SiH4) and oxygen (O2) are added to an argon plasma stream produced by an Electron Cyclotron Resonated (ECR) reactor via dispersion ring. The ratio (Q) of silane to oxygen has been varied between 3:1,1.7:1,1.2:1,1:1.9, and 1:2. An erbium precursor (Tris(2,2,6,6-tetramethyl-3,5-heptanedionato) erbium(III) [Er+3 (THMD)3]) is placed in a stainless steel oven held between 90 and 110° C.

[0076] A carrier gas of Ar is used to transport the Er precursor from the oven through a precision controlled mass-flow controller to a dispersion ring below the Silane injector and above the heated substrate. The instrument pressure is kept at about 1×10−7 torr. The substrates used are either fuse silica or silicon wafers on which is thermally grown an oxide layer of 2000 nm thickness. The deposition temperature, the microwave power and the sceptre bias are kept constant at 300° C., 400 W and −200 VDC. The SiH4, Ar flow rates were adjusted while keeping the O2 flow rate at 20 militorr sec−1 for the various excess silicon content. The Er/Ar flow rate was adjusted to the vapor pressure generated by the temperature controlled oven for the desired erbium concentration. The film is grown at a rate of 60 nm per minute and thickness has been grown from 250 nm to 2000 nm thick. The scepter was rotated at 3 rpm during the growth to help in uniformity of film. After deposition, the samples are annealed at 950° C.-1000° C. for 5-6 minutes under flowing nitrogen (N2) in a Rapid Thermal Anneal (RTA) furnace.

Example 2

[0077] An ablation target is fabricated by combining powdered silicon, powdered silicon dioxide and powdered erbium oxide, the prepared powder mixture comprising 45% silicon, 35% silicon oxide and 20% erbium oxide. Each powder component has a size of about 300 mesh. The mixture is placed into a ball mill and ground for approximately 5 to 10 minutes. The mixture is then placed into a 25 mm diameter by 7 mm thick mould, placed into a hydraulic press, and compressed for 15 minutes at 500 psi. The obtained target is then placed into an annealing furnace and heated to 1200° C. in a forming gas atmosphere of 5% H2 and 95% N2 for 30 minutes. The Target is cooled down to room temperature and then reground in a ball mill for ten minutes. The mixture is then again placed in a mould, compressed and annealed as described above. The obtained target is placed onto a target holder inside a vacuum chamber. A silicon substrate [n-type, <110> single crystal, 0.1-0.05 Ωcm conductivity] of 50 mm diameter and 0.4 cm thickness is placed on a substrate holder parallel to and at a distance of 5.0 cm above the surface of the target. The substrate is placed onto a substrate support that is heated at 500° C., and the substrate is rotated at a rate of 3 rpm during the deposition. The vacuum chamber is evacuated to a base pressure of 1×10−7 torr and then back filled with 20×10−3 torr of Ar. An excimer laser (KrF 248 nm) is focused on to the target at an energy density of about 10 Jcm−2 and at a glancing angle of 40° to the vertical axis, such that a 0.1 nm film is generated per pulse. The target is rotated at 5 rpm during deposition in order to have a fresh target surface for each ablation pulse. After a 100 nm layer is deposited on the substrate, the newly deposited film is annealed at temperature of from 900° C. to 950° C. for 5 minutes to form silicon nanocrystals in the Silicon Rich Silicon Oxide (SRSO).

[0078] The substrate is reintroduced in the vacuum chamber, and the target is replaced with an Indium Tin Oxide (ITO) target. The atmosphere inside the vacuum chamber is set to 2×103 torr of O2, and the substrate is heated to 500° C. and rotated at 3 rpm. A 100 nm ITO layer is deposited on top of the annealed rare earth doped SRSO film.

[0079] All publications, patents and patent applications cited in this specification are herein incorporated by reference as if each individual publication, patent or patent application were specifically and individually indicated to be incorporated by reference. The citation of any publication is for its disclosure prior to the filing date and should not be construed as an admission that the present invention is not entitled to antedate such publication by virtue of prior invention.

[0080] Although the foregoing invention has been described in some detail by way of illustration and example for purposes of clarity of understanding, it is readily apparent to those of ordinary skill in the art in light of the teachings of this invention that certain changes and modifications may be made thereto without departing from the spirit or scope of the appended claims.

[0081] It must be noted that as used in this specification and the appended claims, the singular forms “a”, “an”, and “the” include plural reference unless the context clearly dictates otherwise. Unless defined otherwise all technical and scientific terms used herein have the same meaning as commonly understood to one of ordinary skill in the art to which this invention belongs.

Claims

1. A doped semiconductor nanocrystal layer comprising (a) a group IV oxide layer which is free of ion implantation damage, (b) from 30 to 50 atomic percent of a semiconductor nanocrystal distributed in the group IV oxide layer, and (c) from 0.5 to 15 atomic percent of one or more rare earth element, the one or more rare earth element being (i) dispersed on the surface of the semiconductor nanocrystal and (ii) distributed substantially equally through the thickness of the group IV oxide layer.

2. A doped semiconductor nanocrystal layer according to claim 1, wherein the group IV oxide layer comprises silicon dioxide or germanium dioxide.

3. A doped semiconductor nanocrystal layer according to claim 1, wherein the group IV oxide layer has a thickness of from 1 to 2000 nm.

4. A doped semiconductor nanocrystal layer according to claim 1, wherein the group IV oxide layer has a thickness of from 80 to 2000 nm.

5. A doped semiconductor nanocrystal layer according to claim 1, wherein the group IV oxide layer has a thickness of from 100 to 250 nm.

6. A doped semiconductor nanocrystal layer according to claim 1, wherein the group IV oxide layer has a thickness of from 1 to 10 nm.

7. A doped semiconductor nanocrystal layer according to claim 1, wherein the semiconductor nanocrystal is a group IV semiconductor, a group II-VI semiconductor or a group III-V semiconductor.

8. A doped semiconductor nanocrystal layer according to claim 7, wherein the group IV semiconductor is selected from Si, Ge, Sn and Pb.

9. A doped semiconductor nanocrystal layer according to claim 7, wherein the group II-VI semiconductor is selected from ZnO, ZnS, ZnSe, CaS, CaTe and CaSe.

10. A doped semiconductor nanocrystal layer according to claim 7, wherein the group III-I semiconductor is selected from GaN, GaP and GaAs.

11. A doped semiconductor nanocrystal layer according to claim 1, wherein the concentration of semiconductor nanocrystals in the group IV oxide layer is from 37 to 47 atomic percent.

12. A doped semiconductor nanocrystal layer according to claim 1, wherein the concentration of semiconductor nanocrystals in the group IV oxide layer is from 40 to 45 atomic percent.

13. A doped semiconductor nanocrystal layer according to claim 1, wherein the semiconductor nanocrystals are from 1 to 10 nm in size.

14. A doped semiconductor nanocrystal layer according to claim 1, wherein the semiconductor nanocrystals are from 1 to 3 nm in size.

15. A doped semiconductor nanocrystal layer according to claim 1, wherein the semiconductor nanocrystals are from 1 to 2 nm in size.

16. A doped semiconductor nanocrystal layer according to claim 1, wherein the rare earth element is selected from cerium, praseodymium, neodymium, promethium, gadolinium, erbium, thulium, ytterbium, samarium, dysprosium, terbium, europium, holmium, lutetium, and thorium.

17. A doped semiconductor nanocrystal layer according to claim 16, wherein the rare earth element is selected from erbium, thulium and europium.

18. A doped semiconductor nanocrystal layer according to claim 1, wherein the rare earth element is in the form of an oxide or a halogenide.

19. A doped semiconductor nanocrystal layer according to claim 18, wherein the halogenide is a fluoride.

20. A doped semiconductor nanocrystal layer according to claim 1, wherein the rare earth concentration is from 5 to 15 atomic percent.

21. A doped semiconductor nanocrystal layer according to claim 1, wherein the rare earth concentration is from 10 to 15 atomic percent.

22. A semiconductor structure comprising a substrate, on which substrate is deposited one or more doped semiconductor nanocrystal layers according to claim 1.

23. A semiconductor structure according to claim 22, wherein the substrate is selected from a silicon wafers or a poly silicon layer, either of which can be optionally n-doped or p-doped, and a layer of fused silica, zinc oxide, quartz or sapphire.

24. A semiconductor structure according to claim 22, wherein the semiconductor structure comprises one or more dielectric layer.

25. A semiconductor structure according to claim 24, wherein the dielectric layer comprise silicon oxide, silicon nitrite or silicon oxy nitrite.

26. A semiconductor structure according to claim 24, wherein the dielectric layer has a thickness of 1 to 10 nm.

27. A semiconductor structure according to claim 24, wherein the dielectric layer has a thickness of 1 to 3 nm.

28. A semiconductor structure according to claim 24, wherein the dielectric layer has a thickness of about 1.5 nm.

29. A semiconductor structure according to claim 22, wherein the semiconductor structure comprises a current injection layer.

30. A semiconductor structure according to claim 29, wherein the current injection layer is an indium tin oxide layer.

31. A semiconductor structure according to claim 22, wherein the semiconductor structure has a thickness of 2000 nm or less.

32. A process for preparing a doped semiconductor nanocrystal layer, the process comprising: (a) subjecting a target comprising a mixture of (i) a powdered group IV binding agent, (ii) a powdered semiconductor selected from a group IV semiconductor, a group II-VI semiconductor and a group III-V semiconductor, and (iii) a powdered rare earth element, the rare earth element being present in concentration of 0.5 to 15 atomic percent, to a pulse laser deposition procedure to deposit a semiconductor rich group IV oxide layer doped with a rare earth element, and (b) annealing the semiconductor rich group IV oxide layer doped with a rare earth element at a temperature of from 600° C. to 1000° C.

33. A process according to claim 32, wherein the powdered group IV binding agent is selected from silicon oxide, germanium oxide, lead oxide and tin oxide.

34. A process according to claim 32, wherein the powdered group IV binding agent is selected from silicon, germanium, lead and tin, and wherein the pulse laser deposition procedure is carried out under an oxygen atmosphere.

35. A process according to claim 34, wherein the oxygen atmosphere has a pressure suitable to obtain the semiconductor rich group IV oxide layer with 30 to 50 atomic percent of excess semiconductor.

36. A process according to claim 32, wherein the group IV semiconductor is selected from Si, Ge, Sn and Pb.

37. A process according to claim 32, wherein the group II-VI semiconductor is selected from ZnO, ZnS, ZnSe, CaS, CaTe and CaSe.

38. A process according to claim 32, wherein the group III-I semiconductor is selected from GaN, GaP and GaAs.

39. A process according to claim 32, wherein the powdered rare earth element is selected from cerium, praseodymium, neodymium, promethium, gadolinium, erbium, thulium, ytterbium, samarium, dysprosium, terbium, europium, holmium, lutetium, and thorium.

40. A process according to claim 32, wherein the powdered rare earth element is selected from erbium, thulium and europium.

41. A process according to claim 32, wherein the powdered rare earth element is in the form of an oxide or a halogenide.

42. A process according to claim 40, wherein the halogenide is a fluoride.

43. A process according to claim 32, wherein powdered rare earth element concentration is from 5 to 15 atomic percent.

44. A process according to claim 32, wherein powdered rare earth element concentration is from 10 to 15 atomic percent.

45. A process according to claim 32, wherein the semiconductor rich group IV oxide layer is annealed at a temperature of from 800 to 950° C.

46. A process for preparing a doped semiconductor nanocrystal layer, the process comprising: (a) introducing (i) a gaseous mixture of a group IV element precursor and molecular oxygen, and (ii) a gaseous rare earth element precursor, in a plasma stream of a Plasma Enhanced chemical Vapor Deposition (PECVD) instrument to form a semiconductor rich group IV oxide layer doped with a rare earth element, and (b) annealing the semiconductor rich group IV oxide layer doped with a rare earth element at a temperature of from 600° C. to 1000° C.

47. A process according to claim 46, wherein the group IV element precursor is a hydride of a group IV element.

48. A process according to claim 46, wherein the group IV element precursor comprises silicon, germanium, tin or lead.

49. A process according to claim 46, wherein the group IV element precursor is silane.

50. A process according to claim 46, wherein the ratio of the group IV element precursor and of the molecular oxygen is selected to obtain the semiconductor rich group IV oxide layer with 30 to 50 atomic percent of excess semiconductor.

51. A process according to claim 46, wherein the rare earth element precursor comprises a rare earth element selected from cerium, praseodymium, neodymium, promethium, gadolinium, erbium, thulium, ytterbium, samarium, dysprosium, terbium, europium, holmium, lutetium, and thorium.

52. A process according to claim 46, wherein the rare earth element precursor comprises erbium, thulium or europium.

53. A process according to claim 46, wherein the rare earth element precursor comprises a ligand selected from 2,2,6,6-tetramethyl-3,5-heptanedione, acetylacetonate, flurolacetonate, 6,6,7,7,8,8,8-heptafluoro-2,2-dimethyl-3,5-octanedione, i-propylcyclopentadienyl, cyclopentadienyl, and n-butylcyclopentadienyl.

54. A process according to claim 46, wherein the rare earth element precursor is selected from tris(2,2,6,6-tetramethyl-3,5-heptanedionato) erbium(III), erbium (III) acetylacetonate hydrate, erbium (III) flurolacetonate, tris(6,6,7,7,8,8,8-heptafluoro-2,2-dimethyl-3,5-octanedionate)erbium (III), tris(i-propylcyclopentadienyl)erbium (III), Tris(cyclopentadienyl)erbium (III), and tris(n-butylcyclopentadienyl)erbium (III).

55. A process according to claim 46, wherein the semiconductor rich group IV oxide layer is annealed at a temperature of from 800 to 950° C.

56. A doped semiconductor nanocrystal layer comprising (a) a group IV oxide layer which is free of ion implantation damage, (b) a semiconductor nanocrystal distributed in the group IV oxide layer, and (c) one or more rare earth element, the one or more rare earth element being dispersed on the surface of the semiconductor nanocrystal.