Patent Application
20190334266
The server platform industry continues to demand higher levels of data storage capacity and performance within smaller space constraints. To facilitate this need, an M.2 standard specification, formerly known as the Next Generation Form Factor (“NGFF”), was designed to provide design criteria that could maximize usage of printed circuit board (“PCB”) space while minimizing the form factor of the devices and connectors connected to the PCB. In particular, the M.2 specification provides design criteria such as pin locations and pin spacing for various components.
For example, the M.2 specification provides design criteria that allows PCBs to receive and mate with connectors. Further the M.2 specification provides design criteria for connectors to connect and mate to the PCB, as well as design criteria for sockets of the connectors to receive and mate with storage devices such as solid state devices (“SSDs”). More specifically, the M.2 specification provides standardized pin outs of the PCBs, connectors, and SSDs to support full functionality. Even with the M.2 specification permitting the server platform industry to achieve higher levels of data storage capacity and performance within smaller space constraints, each server platform has generally been limited with the number of SSDs that can be utilized at one time.
The present disclosure is best understood from the following detailed description when read with the accompanying Figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
Illustrative embodiments of the subject matter claimed below will now be disclosed. In the interest of clarity, not all features of an actual implementation are described in this specification. It will be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions will be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort, even if complex and time-consuming, would be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.
A connector is disclosed herein that maintains the same M.2 standard footprint on a printed circuit board (“PCB”) while doubling the number of M.2 modules (e.g., solid state devices such as SIM cards). Embodiments use a reduced number of pins relative to what one would get by simply stacking conventional M.2 modules. Some M.2 standard signals are omitted and their pins repurposed. Also, some other signals (e.g., power signals) share pins instead of each using a separate pin. In some embodiments, additional pins are added over and above those called for by the M.2 standard.
In one embodiment, a connector may comprise a housing body. The housing body may include a front face, a back face, an upper portion, and a bottom portion. The housing body may further define a plurality of sockets that extend from the front face of the housing body towards the back face of the housing body. The plurality of sockets may be vertically positioned between a bottom portion of the housing body and a top portion of the housing body, wherein each of the sockets may be configured to receive a M.2 module with an M.2 standard form factor. The connector may further include a plurality of pins that extend through the housing body to the plurality of sockets. The plurality of pins may extend out of the bottom portion of the housing body, and may be arranged in a first row of pins and a second row of pins. In one embodiment, the first row of pins and the second row of pins may be configured according to an M.2 standard specification for connection to a printed circuit board (“PCB”). In one embodiment, the plurality of pins, which are at least partially positioned within the housing body, may electrically connect each of the M.2 modules to the printed circuit board to permit concurrent operation of the M.2 modules.
In one embodiment, a connector that electrically connects a first and a second solid state device (“SSD”) to a printed circuit board (“PCB”) is disclosed. The connector may include a housing body that defines a first socket and a second socket that are configured to receive the first SSD and the second SSD respectively. The connector may also include a first row of pins and a second row of pins that include PCB contacts and socket contacts. The first and second rows of pins may include a first group of pins and a second group of pins. In one embodiment, the PCB contacts of the first and second rows of pins extend outward from a bottom portion of the housing body and may be positioned in an M.2 configuration. The PCB contacts of the first and second rows of pins may be for electrical connection to the PCB. In one embodiment, the first group of pins may extend through the housing body to the first socket for electrical connection to the first SSD, and the second group of pins may extend through the housing body to the second socket for electrical connection to the second SSD, wherein the first and second row of pins permit concurrent operation of the first and second SSDs.
The technique disclosed herein also includes a method of building a connector that may electrically connect a first and a second solid state device (“SSD”) to a printed circuit board (“PCB”), wherein the connector may allow the first and the second SSDs to be concurrently operated by the PCB. The method may include forming a housing body that includes a first face, a back face, an upper portion, and a bottom portion. The housing body may further define a first socket and a second socket, wherein the first and the second sockets extend from the first face of the housing body towards the back face of the housing body. The first and second sockets may be vertically positioned within the housing body and configured to receive the first and the second SSDs. In one step, the method of building a connector may include positioning a portion of a plurality of pins within the housing body. The plurality of pins may include PCB contacts and socket contacts, and the plurality of pins may also include a first group of pins and a second group of pins.
The method may also include positioning the PCB contacts of the plurality of pins in a first row and a second row, each with an M.2 configuration. The PCB contacts of the plurality of pins may extend outside the bottom portion of the housing body to electrically connect to the PCB. In one embodiment, the method may include routing the first group of pins from the bottom portion of the housing body to the first socket, the socket contacts of the first group of pins may be used for electrical connection to the first SSD. The method may further include routing the second group of pins from the bottom portion of the housing body to the second socket. The socket contacts of the second group of pins may be used for electrical connection to the second SSD.
Referring now to
The body 210 may also comprise an upper portion 216 and a bottom portion 218. In one embodiment, the upper portion 216 is the top fifty percent of the body 210 in the z direction in
In
Returning to
Some of the socket contacts 234 of the plurality of pins 230 (group 233 in
The PCB contacts 232 of the plurality of pins 230 may extend outward from the bottom portion 218 of the connector 200. In one embodiment, the PCB contacts 232 of the plurality of pins 230 may be positioned in a first row 236 along the front face 212 of the connector 200 and a second row 238 may be positioned along the back face 214 of the connector 200 (shown in
In one embodiment, the first row of pins 236 of the plurality of pins 230 may include a first group of pins 240A and a second group of pins 242A, both shown in
In one embodiment, the second row of pins 238 of the plurality of pins 230 may include a first group of pins 240B and a second group of pins 242B, both shown in
In order for the double stack connector 200 to be able to have just two rows (i.e., the first row of pins 236 and the second row of pins 238), one or more mechanisms may be employed in the double stack connector 200. In one embodiment, the double stack connector 200 may omit one or more M.2 standard signals that are not used for the first SSD 400A and the second SSD 400B to operate. As used herein, a connector omits an M.2 standard signal when it does not include a pin 230 to carry that signal (i.e., none of its pins 230 are routed to a pin-position that would be reserved for that signal in an M.2 standard pin layout). For example, a portion of the pins that would usually be used for wireless signals, WIFI signals, Bluetooth signals, navigation signals, or other near field signals may be omitted from the connector 200 in the connector 200. In one embodiment, when the double stack connector 200 omits one or more signals, a pin that would otherwise be dedicated to those signals is no longer used. Accordingly, the pins in those designated M.2 positions previously used for the omitted signals may be repurposed for other uses to operate the first SSD 400A and the second SSD 400B via the first and second rows of pins 236, 238. In one embodiment, when a signal is omitted, the connector may still include a pin 230 that has one end that is located in a pin-position that would normally be reserved for the omitted signal according to M.2, but the pin 230 may have its other end(s) routed to a pin-position that would normally be reserved for a different signal.
In one embodiment, to reduce the number of pins used by the connector 200 to operate the first SSD 400A and the second SSD 400B, certain pins may transmit signals from the PCB 300 from their PCB contact 232 to two or more socket contacts 234. For example, the connector 200 may include shared power pins 260, as shown in
As shown in
Likewise, in one embodiment, the PCB contact 232 of a third power pin 260C and the PCB contact 232 of a fourth power pin 260D of the second row of pins 238 may connect to lanes of the PCB 300 that provide power. In turn, the third and fourth power pins 260C, 260D may each include a plurality of socket contacts 234 to provide electrical connections within the first and/or second sockets 220A, 220B. Specifically the third power pin 260C and the fourth power pin 260D may each split or otherwise be connected to other pins such that the third and fourth power pins 260C, 260D may include a plurality of socket contacts 234 that define the first and/or second sockets 220A, 220B. In one embodiment, the third power pin 260C splits into four socket contacts 234 configured per M.2 standard, and traditionally labeled pins twelve, fourteen, sixteen, and eighteen, and the second power pin 260D splits into two socket contacts 234 configured per M.2 standard for pins traditionally labeled two and four. Accordingly, the number of lanes on the PCB 300 that provide power through the connector 200 and to the first and the second SSDs 400A, 400B may be reduced from six lanes to two lanes for the second row of pins 238.
In one embodiment, pins in addition to those that are standard in an M.2 connection arrangement may be added to the first row of pins 236 and the second row of pins 238 for connection to the PCB 300. The added pins may be positioned into otherwise unused space of the connector housing 210 so that the connector 200 may include a smaller form factor and take up minimum space on the PCB 300.
In one embodiment, pins may be added to the first row of pins 236 and the second row of pins 238 and routed through mechanical keyed gaps in the connector housing 210. The mechanical keyed gaps in the connector housing 210 are voids in the connector housing 210 where pins are usually not placed. For example, an M.2 connector may be in a “M” key or “B” key configuration, which includes a mechanical key gap after either 5 socket connections or 6 socket connections, respectively, and in one embodiment of the subject matter would position additional pins in those mechanical key gaps.
In one embodiment, the double stack connector 200 may include one or more shared pins 280 through the housing 210. Shared pins 280 may be routed through unused space or mechanical keyed gaps in the housing 210.
A method 600 of building a double stack connector 200 that electrically connects a first and a second SSD 400A, 400B to a PCB 300, as described above, is further contemplated, and depicted in
In one embodiment, the method 600 of building a connector 200 may include positioning a portion of the plurality of pins 230 within the housing body 210, as shown in step 620 in
In one embodiment, and shown in step 622, the method 600 may include positioning the PCB contacts 232 of the plurality of pins 230 in a first row of pins 236 and a second row of pins 238. In one embodiment the first row of pins 236 and the second row of pins 238 may be physically positioned according to specifications of an M.2 configuration. In another embodiment, the first row of pins 236 or the second row of pins 238 may include pins that are in addition to those that are standard according to the specifications of an M.2 configuration. The PCB contacts of the plurality of pins 230 may extend outside the bottom portion of the housing body 210 to electrically connect the connector 200 to the PCB 300.
In step 624 of the method 600, the first group of pins 240A may be routed to a first socket 220A, and in step 626, the second group of pins 240B may be routed to a second socket 220B. The socket contacts of the first group of pins 240A may electrically connect to the first SSD 400A, and the socket contacts of the second group of pins 240B may electrically connect to the second SSD 400B.
In one embodiment, the plurality of pins 230 may further comprise a third group of pins 240C. In step 628, the third group of pins 240C may be routed to both the first socket 220A and the second socket 220B.
In step 630, one or more of the plurality of pins 230 may be bent in order to connect to the first SSD 400A, and/or the second SSD 400B.
The foregoing description, for purposes of explanation, used specific nomenclature to provide a thorough understanding of the disclosure. However, it will be apparent to one skilled in the art that the systems and methods described herein can be practiced without such. The foregoing descriptions of specific examples are presented for purposes of illustration and description. They are not intended to be exhaustive of or to limit this disclosure to the precise forms described. Obviously, many modifications and variations are possible in view of the above teachings. The examples are shown and described to best explain the principles of this disclosure and practical applications, to thereby permit others skilled in the art to best utilize this disclosure and various examples with various modifications as are suited to the particular use contemplated. It is intended that the scope of this disclosure be defined by the claims and their equivalents below.
