Number | Name | Date | Kind |
---|---|---|---|
4279020 | Christian et al. | Jul 1981 | |
4334157 | White, Jr. et al. | Aug 1982 | |
4334295 | Nagami | Jun 1982 | |
4653030 | Tochibono et al. | Mar 1987 | |
4686386 | Tadao | Aug 1987 |
Entry |
---|
Konishi, Yasuhiro et al., "A 33-ns 4-Mb DRAM with a Battery-Backup (BBU) Mode", IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1112-1116. |
"4M Bit Dynamic RAM (Self Refresh, Fast Page & Byte Read/Write Modes)", MOS Integrated Circuit .mu.PD424xxxx, NEC Corporation, 1990. |