Patent Application
20060184730
1. Field of the Invention
This invention is related in general to the field of data storage systems. In particular, the invention consists of a system for initializing sectors of a data storage device with logical redundancy check information without transmitting extensive information over a communication bus.
2. Description of the Prior Art
Data storage systems 10, such as the one exemplified in
The data storage devices 14 may include hard disk drives, magneto-optical drives, floppy disk drives, tape cartridges, or other memory device. In a traditional data storage system, these data storage devices 14 may be grouped together as a redundant array of independent/inexpensive disks (“RAID”). Typically, the data storage devices 14 are segregated into sectors, with each sector traditionally containing a set number of bytes of information. Additionally, in a RAID system, it is desirable to maintain parity information across each array in order to ensure integrity of data written to the data storage devices 14. However, before a data storage device 14 can be used, it is traditionally initialized.
One method of initialization includes segregating the data storage devices into sectors and writing binary values to the sectors. One method is to format each data storage device with all zeroes. This is beneficial in that parity for associated RAIDs do not need to be rebuilt. Another method is to format each drive with data other than zeroes, but have each sector contain the same information. However, it is desirable to have a means of initializing data storage devices in a way that does not require rebuilding parity for associated RAIDs but provides logical redundancy checking (“LRC”).
In one exemplary initialization, the first 522 bytes of a 524 byte sector is written to with all zeroes. Two bytes of the sector's logical block address (“LBA”) is written to the last two bytes in order to provide LRC. Traditionally, data written to a data storage device, including initialization information, is transmitted by the host computer 12, through the communication bus 16, to the data storage device. A problem occurs, however, when initializing large numbers of data storage devices containing large numbers of sectors.
In a data storage system 10 having a bandwidth of 100 MB/sec and a write-through speed of 50 MB/sec for each data storage device, initializing a large number of data storage devices would saturate the bandwidth capacity of the communication bus 16. In this example, the bandwidth of the communication bus would be fully utilized during initialization of only two data storage devices, leaving no excess bandwidth for normal communication between the host computers 12 and other data storage devices 14. In an exemplary data storage system 10, up to eight data storage devices are initialized at once. This results in an extensive bottleneck of the communication bus that drastically reduces the ability of the data storage system 10 to accommodate customer input/output requests arriving via the host computer 12. Accordingly, it is desirable to have a means for initializing data storage devices 14 without transmitting extensive amounts of information over the communication bus.
The invention disclosed herein utilizes a command processor, a memory controller, and a memory device to receive an initialization command from a host computer, to generate logical redundancy check (“LRC”) information, combine the LRC information with zeroes, and write the resulting combination to each sector of a data storage device. Integral to the invention is a specialized initialize command originating from the host computer that initiates this process. This specialized initialize command may be an extension of a traditional format command, i.e., a format command with special parameters. Alternatively, a write same command or send diagnostic command may be used, so long as the data written to the data storage device is generated internal to the data storage device.
In one embodiment of the invention, the command processor directs the memory controller to prepare an area of random-access memory (“RAM”) with sets of zeroes and an LRC for each sector that is to be initialized. Here, the LRC is simply the least two significant bytes of the logical block address (“LBA”) for each sector to be written to. Once the sets of initialization information have been staged in the RAM, the memory controller simply transfers this information to the physical surface of the data storage media that will retain the information.
In another embodiment of the invention, the memory controller includes an address of a memory location that contains zeroes. The RAM is simply configured with sequential LRCs. A write channel, using a scatter/gather list, simply combines the zeroes from the location indicated by the address in the memory controller and combines them with the LRC from the RAM. In both embodiments of the invention, data is written to the data storage media in basically the same way that a normal write operation would be performed, except that the written data does not originate at the host computer and is not transmitted over the communication bus. Once the initialization procedure has completed, a notification is transmitted by the command processor back to the host computer to indicate either success or failure.
Various other purposes and advantages of the invention will become clear from its description in the specification that follows and from the novel features particularly pointed out in the appended claims. Therefore, to the accomplishment of the objectives described above, this invention comprises the features hereinafter illustrated in the drawings, fully described in the detailed description of the preferred embodiments and particularly pointed out in the claims. However, such drawings and description disclose just a few of the various ways in which the invention may be practiced.
This invention is based on the idea of using a specialized initialization instruction to direct a command processor residing within a data storage device to generate initialization information including logical redundancy check (“LRC”) information specific to each sector of a data storage media being written to. The invention disclosed herein may be implemented as a method, apparatus or article of manufacture using standard programming or engineering techniques to produce software, firmware, hardware, or any combination thereof. The term “article of manufacture” as used herein refers to code or logic implemented in hardware or computer readable media such as optical storage devices, and volatile or non-volatile memory devices. Such hardware may include, but is not limited to, field programmable gate arrays (“FPGAs”), application-specific integrated circuits (“ASICs”), complex programmable logic devices (“CPLDs”), programmable logic arrays (“PLAs”), microprocessors, or other similar processing devices.
Referring to figures, wherein like parts are designated with the same reference numerals and symbols,
The data storage device 114 is more fully illustrated by the block diagram of
The host interface 118 is an interface between the communication bus 116 and the rest of the data storage device 114. It handles all of the protocol on the communication bus such as small-computer systems interface (“SCSI”). The host interface 118, in conjunction with the communication bus 116, act as a communication channel between the host computer 112 and the command processor 120.
The command processor 120 controls the operation of the data storage device by executing commands received from the host computer 112. The command processor 120 is typically a micro-processor, but may be a field-programmable gate array (“FPGA”), an application-specific integrated circuit (“ASIC”), complex programmable logic device (“CPLD”), general purpose central processing unit (“CPU”), or other programmable logic device. Commands arriving from the host computer 112 are decoded at the command processor 120. When a specialized initiation command 112a arrives from the host computer 112, the command processor 120 directs the memory controller 122 to prepare and execute the initiation process according to the invention.
The memory controller is a device that handles all data transfers to and from all memory location located on the driver media (platters) 130. Traditionally, these data transfers begin and end at the host computer. However, according to the invention, data transferred during the specialized initiation process will originate at the RAM 124.
The RAM 124 memory device, or other similar temporary data storage device, contains read and write buffers for data that is being transferred to and from the data storage media 130. Traditionally, the RAM acts as a large cache for data that has been requested from the data storage media 130 by the host computer 112. Additionally, the RAM 124 may hold data being written by the host computer 112 to the data storage media. In this way, if the host computer wishes to read information that was recently written to the data storage media 130, it may find a recent copy still in the RAM 124, thus reducing the time necessary to retrieve the information.
During the specialized initiation procedure, according to the invention, sector data 132 that will be written to each sector of the data storage media 130 is first configured within the RAM 124. In this manner, each sector can be written to with data originating from the RAM. In this embodiment, the specialized initiation procedure would be transparent to the data storage media, i.e., sector data 132 would be written to the data storage media in the same way as if the data had originated from the host computer 112.
Alternatively, the RAM 124 may be configured with LRC information 134 for each sector of the data storage media 130 to be initialized, the memory controller may contain an address 136 of a memory location 138 within the data storage media 130 that includes all zeroes, and the LRC values 134 are simply appended to several iterations of the contents of the memory location 138 before being written to the each sector 131 of the data storage media 130 by the write channel 126 and drive head 128. For example, an LRC consisting of the two least significant bytes of a sectors logical block address (“LBA”) may be written to the last two bytes of each sector 131, after all other bytes have been written to with binary zeroes. If a sector has an LBA address of 1A5C02, the last two bytes (02) may be written as the LRC. Alternatively, these two bytes may be written in little endian style, i.e., written so that the last significant byte (2) is precedes the more significant byte (0) in the sector 131.
The write channel 126 includes the hardware and controls for writing data from the RAM 124, or directly from the host interface 118, to the data storage media through the drive head 128. In the second embodiment of the invention, indicated above, the write channel 126 must include a scatter/gather list capability in order to combine the LRC information 134 with the data located at the memory location 138 already residing on the data storage media 130. The drive head 128 is an electromagnetic read/write device used to either record information onto the disk or read information from it. The data storage media 130, such as a disk, or platter, or a hard disk drive, is designed to store information in the form of magnetic patterns or other digitally readable format.
An internal initialization algorithm 200 is illustrated by the flowchart of
Those skilled in the art of making data storage systems may develop other embodiments of the present invention. However, the terms and expressions which have been employed in the foregoing specification are used therein as terms of description and not of limitation, and there is no intention in the use of such terms and expressions of excluding equivalents of the features shown and described or portions thereof, it being recognized that the scope of the invention is defined and limited only by the claims which follow.
