The present disclosure relates to distributed storage, such as for big data, distributed databases, large datasets, artificial intelligence, genomics, etc. that use storage remotely located over a network, and more particularly, to shifting drive scrubbing from host-based to drive-based validation to reduce the amount of data a host accesses over drive buses such as PCIe or over the network.
With the incredible number of devices being interconnected all of these interactions generate enormous amounts of data that needs to be stored—somewhere. And this does not include the enormous amount of data created by device users, shoppers, consumers, producers, etc. all of which also needs to be stored, again—somewhere. But beyond simple storage, there is also demand for security, redundancy, fast access, and reliability to stored data. There are many options for implementing a “back end” and two well-known free and hence popular implementations are based on Ceph and Hadoop® technology. These two platforms will be used as exemplary environments in which various aspects of inventive concepts disclosed in the detailed description may be practiced. It is assumed the reader is familiar with implementing both Ceph and Hadoop®, see for example Internet Uniform Resource Locators (URLs) ceph.com and Hadoop®.apache.org, and that the reader understands how data is stored, distributed, and validated for correctness.
As will be appreciated, because “Big Data” typically uses many systems and storage environments distributed across various networks, there may be a lot of overhead in scrubbing (e.g. validating) data that is being stored. This overhead can be particularly substantial, for example, when disaggregated storage such as Nonvolatile Memory Express over Fabrics (NVMe-oF) storage targets/disks are used.
Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. To facilitate this description, like reference numerals designate like structural elements. Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings.
In the following detailed description, reference is made to the accompanying drawings which form a part hereof wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments that may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of embodiments is defined by the appended claims and their equivalents. Alternate embodiments of the present disclosure and their equivalents may be devised without parting from the spirit or scope of the present disclosure. It should be noted that like elements disclosed below are indicated by like reference numbers in the drawings.
Various operations may be described as multiple discrete actions or operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations do not have to be performed in the order of presentation. Operations described may be performed in a different order than the described embodiment. Various additional operations may be performed and/or described operations may be omitted in additional embodiments. For the purposes of the present disclosure, the phrase “A and/or B” means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C). The description may use the phrases “in an embodiment,” or “in embodiments,” which may each refer to one or more of the same or different embodiments. Furthermore, the terms “comprising,” “including,” “having,” and the like, as used with respect to embodiments of the present disclosure, are considered synonymous.
As used herein, the term “circuitry” or “circuit” may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, processor, microprocessor, programmable gate array (PGA), field programmable gate array (FPGA), digital signal processor (DSP) and/or other suitable components that provide the described functionality. Note while this disclosure may refer to a processor in the singular, this is for expository convenience only, and one skilled in the art will appreciate multiple processors, processors with multiple cores, virtual processors, etc., may be employed to perform the disclosed embodiments.
As the world moves, inexorably, into a system of billions of interconnected devices, it is becoming increasingly important to implement robust data storage systems. Conventional storage environments have provided data storage servers having various kinds of local storage managed by the server and utilized for storing data from many different clients. Over time the mode of local storage has evolved to disaggregated storage utilizing storage technology remote to the devices/machines/servers/etc. managing the storage. Since a fundamental requirement of robust storage is maintaining data integrity, it is typically necessary to (hopefully regularly) scrub the storage to identify errors. Storage errors, it will be understood by one skilled in the art, may come from a variety of problems. For example, what seems like a simple write operation actually requires many levels of traversal between the machine/software initiating the write to actually getting the data written, e.g., there are operating software involved in the write that may fail, network hardware that may fail, the remote server software may fail, its storage controller may fail, as well as the storage media itself may introduce errors during writing as well as after the data being written (colloquially called “bit rot”). To alleviate some of the data error risks, storage systems introduce data integrity models that define protocols to ensure data integrity preservation for an I/O request as it transfers from the machine/software requesting a write operation (or read) operation to the physical storage on physical storage. Various embodiments of disk-based scrubbing disclosed herein can take advantage of data integrity techniques that have been developed over the years.
Data integrity is generally implemented by associating additional data (metadata) with each input/output (IO) request, e.g., a write request. The data integrity metadata (DIM) includes information that may be used to verify the data being written is correct at any point from making the storage request to it being written to storage. It will be appreciated that DIM may represent multiple levels of integrity envelopes wrapping the data as it travels, and such use of wrapping/unwrapping and validating data as it travels is understood by the reader. It is assumed the reader is familiar with storage and data integrity standards relating thereto, e.g., the standards presented at t10.org. For example, T10 describes the Data Integrity Field (DIF), an approach to protecting stored data from corruption. DIF was proposed by a T10 subcommittee of the International Committee for Information Technology Standards. See Internet URL www.incits.org/committees/t10. T10 is part of the InterNational Committee on Information Technology Standards (INCITS) accredited by the American National Standards Institute (ANSI). See, e.g., URL www.t10.org/ftp/t10/document.03/03-224r0.pdf.
One feature of DIF is extending a disk sector from a traditional 512 bytes, to 520 bytes, by adding eight additional data integrity bytes. It will be appreciated the 512 byte sector size is arbitrary and a disk may be formatted with any sector size and have associated protection bytes of arbitrary length. The DIF concept is incorporated into the T10-PI standard, an extension of the T10 SCSI Block Commands specification, which uses “Protection Information” (PI) data (including validating data such as a checksum) that is transmitted from the host bus adapter (HBA) and application to a storage device. Because the PI travels with the data, it is possible to provide end-to-end data integrity. In the illustrated embodiments, the PI is written to the storage along with the data (e.g., host data blocks) to allow validating read data. The following
Ceph deployments begin with setting up Ceph Nodes 102 which include a grouping 122 of target disks, processor, scrub process, etc., and an OSD 124 responsible for the machine 122 disk(s). Nodes may be interconnected by way of a network 126 and a Ceph Storage Cluster, e.g., cluster 106. In one example, the Ceph Storage Cluster requires at least one Ceph Monitor (not all referenced components are illustrated) and at least one Ceph Object Storage Daemon (OSD) 112. It will be appreciated that in various embodiments there can be other OSDs, e.g., 116. There can also be a Ceph Metadata Server for running Ceph Filesystem clients. The Ceph OSDs stores data, handle data replication, recovery, backfilling, and rebalancing. The Ceph Monitor, among other things, tracks maps indicating cluster state (e.g., monitor map, OSD map, Placement Group (PG) map, and CRUSH map). The Ceph Metadata Server (MDS) stores metadata on behalf of the Ceph Filesystem (i.e., Ceph Block Devices and Ceph Object Storage do not use MDS). Ceph provides for automated scrubbing, a background operation in Ceph for maintaining data integrity as well as resiliency against drive data corruptions. It will be appreciated Nodes and/or Clusters may be interconnected by way of a network 126 or other communicative coupling.
When Ceph is provisioned using disaggregated storage targets, e.g., disk(s) target(s) 126, 128, 130 with Nonvolatile Memory Express over Fabrics (NVMe-oF) targets, the scrub 108 process overhead increases since each remote disk's data will be read over the locally attached PCIe fabric or over the network in order to allow its managing OSD to validate the stored objects. This overhead is multiplied by each remote target that needs to be validated. During scrubbing an OSD checks metadata related to stored objects to detect corruption. In one embodiment, the Ceph OSD reads all the objects and metadata (a disk Input/Output (10) intensive task), calculates a type of checksum on the data (e.g., a compute intensive task such as crc32c), and compares validation data across replicas. For example, in the illustrated embodiment, reported 110 results may be compared with CRC data obtained of replicated data in other targets 128, 130. This testing detects missing objects, bitrot, failing disks, or other events causing object corruptions. The OSD that detects the error is responsible for updating its corrupted copy by obtaining 114, a correct copy. Unless a drive is failing, typically there are few errors so data transfers related to correcting errors in disaggregated storage tends to be a small percentage of overall data stored.
It will be appreciated after a certain number of errors, embodiments may elect to take storage offline and replace it. And as will be discussed further with respect to
Individual servers index their data and index data is provided to the MapReduce task which then reduces information from servers into a unified data set. The scanner 210 provides background scrubbing of Hadoop® data, where each Hadoop® node 204, 214, 216 actively scans all HDFS partitions in their DataNodes 208, 222, 224 for corruption. If corrupted data is found by a scanner 210, e.g., in DataNode 206, the location reports 228 the error to its Primary Node, e.g., node 204. The Primary Node, as in understood by one skilled in the art, identifies a backup Secondary Node 214 from which it can request 230 corrected data, which the Secondary Node provides 232 the corrected data and the Primary Node can update 234 the corrupted data. A server may track multiple data volumes and hence have multiple scanning operations running concurrently. When Hadoop® is provisioned using disaggregated storage targets, e.g., when the DataNodes 208, 222, 224 use storage such as Nonvolatile Memory Express over Fabrics (NVMe-oF) targets, the scanner process, e.g., scanner 210, overhead increases since each target will be read over the network in order to allow its data to be validated.
In one embodiment the overhead of reading all or substantially all of a DataNode's disaggregated data over a network can be minimized by moving 232 the scanner to be local to the data, e.g., 236, 238, 240, etc., and the storage controller, for example the NVMe-oF controller may attempt to locally repair corrupted data and if that is not possible, then require only errors and control to be sent across the network for verification and correction.
As discussed above with respect to
As is understood by one skilled in the art, LBA is a well-known approach to identifying the location of blocks of data within the storage. The LBA metadata 306 may be treated as containing the host data (data blocks) being written, e.g., host blocks are the data thought of as being written to a disk when stored 320. However, the data blocks may be separate from but associated with the metadata 304-306 (see also
The Application Tag 310 may also be two bytes, and is typically used by applications to add additional validation data to each data block. For example, data structure information about how data is written to disk, such as RAID information, or data about how Ceph or Hadoop® data is structured might be encoded. Since the Application Tag is typically created at a high level, such as by the software or hardware initiating the write request, hence it can be set to contain validation data that could be checked by storage devices (or arbitrary data). The Reference Tag 312 may be four bytes, and contains block address information. As data transfers through a machine, network, controllers, or the like, data might inadvertently get addressing errors and this data may be used to tag data with address and sequencing information to allow correct reconstruction of the data even if blocks are received out of order. This information also facilitates faster data mapping between logical objects that become corrupted that are associated with corrupted LBA locations identified/reported by the storage. Under the T10 standard the Protection Information implements the Guard Tag 308, Application Tag 310 and Reference Tag 312 an optional set of features in the Small Computer System Interface (SCSI) Block Commands protocol (SBC).
With availability of data validation and integrity provided by DIM and DIF (Data Integrity Field) technology, NVMe 1.2.1 (see, URL www.nvmexpress.org/wp-content/uploads/NVM_Express_1_2_1_Gold_20160603.pdf at, e.g., sec. 8.3 “End-to-end Data Protection”) provides an optional end to end data protection based on SCSI T10 discussed above that can be used with nonvolatile media (NVM) disk storage technology. Such technology becomes increasingly important as higher density NVM media is developed, e.g., newer 3D NAND stacking techniques for making larger density drives. With these larger, denser, more complex designs it becomes ever more important to be able to validate drive data, recognize when data regions are failing, and automatically identify, and correct, corrupted data (which may need automatic relocation to a reliable location on the storage), for example, when the corrupted data cannot be automatically repaired with internal drive protection.
DIF, and a Data Integrity Extension (DIX) may be used with NVMe and NVMe-oF storage media, e.g., SSD disks. It will be appreciated arbitrary validation data (e.g., the illustrated Protection Information 304) may be stored 320 in storage (e.g., Drive 316) along with data to be stored. In one embodiment a CRC (e.g., CRC-16, CRC-24, etc.) is stored in the PI metadata and added to the logical block or sector being written. This DIX metadata may be used by a host 326 (e.g., implementing a
End-to-end data protection is a good mechanism to detect errors at the time of host 10, e.g., a host 326 may use a distributed storage service 328 that writes 330 data 302 and associated PI 304 and other metadata 306 to a drive 316, and starts 332 a scrubber 322 operation that reads 334 data from the drive 316 (e.g., by way of its Controller 318), and the scrubber reports out the errors 324 (e.g., the sector/metadata identifying locations on disk having trouble that the host 326 may use to reverse-lookup and correct the affected data blocks. However, it is not efficient for performing integrity checks on large disks in part because typically all data on the disk needs to be accessed over the link to the drive, and this represents a lot of work that is made more problematic for distributed storage, e.g., when the write 330 and read 334 is occurring over a network (see, e.g.,
As drive densities continue to increase (e.g., a 16 TB+ drives are available, and soon these will be considered small), background checking becomes an increasingly serious problem. Background scrubbing may be improved by applying the end-to-end data protection principles as discussed to storage data integrity checks. In one embodiment, the storage media in drive 316 is a Non-Volatile Memory (NVM) 314 solid-state disk (SSD). In one embodiment, the NVM is or includes a memory device is that a block addressable memory device, such as those based on NAND or NOR technologies. A memory device may also include future generation nonvolatile devices, such as a three dimensional crosspoint memory device, or other byte addressable write-in-place nonvolatile memory devices. In one embodiment, the memory device may be or may include memory devices that use chalcogenide glass, multi-threshold level NAND flash memory, NOR flash memory, single or multi-level Phase Change Memory (PCM), a resistive memory, nanowire memory, ferroelectric transistor random access memory (FeTRAM), anti-ferroelectric memory, magnetoresistive random access memory (MRAM) memory that incorporates memristor technology, resistive memory including the metal oxide base, the oxygen vacancy base and the conductive bridge Random Access Memory (CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magnetic junction memory based device, a magnetic tunneling junction (MTJ) based device, a DW (Domain Wall) and SOT (Spin Orbit Transfer) based device, a thiristor based memory device, or a combination of any of the above, or other memory. The memory device may refer to the die itself and/or to a packaged memory product.
The memory's controller 318, e.g., a NVMe controller, performs various tasks such as garbage collection as well as background tasks such as wear-levelling to identify regions of storage media that may be failing. These operations are directed by a Scrubber 322 that as discussed above performs wear-leveling as well as data integrity tests by reading back written data 302 and computing protection information for that data and comparing it to the stored PI 304. In this embodiment, the Controller offloads work from the host 326 and extends background validation to look for corrupted sectors using the data provided in the PI 304, e.g., as discussed above in DIX may be a CRC checksum, or other validation data depending on the disk integrity data (DID) in use. In such fashion the scrubber can determine portions of a NVM that are failing, as well as data that reads fine but for some reason does not validate, e.g., the PIs do not match.
As with encoding storage for a particular DID to use, routine background validation may be determined (or programmed) during namespace creation and set how frequently the drive 316 should sweep through data on associated disks, e.g., NVM 314, for identifying corrupted logical blocks. Note although only one drive 316 is shown with only one NVM 314 it will be appreciated multiple NVM disks may be implemented. It will be further appreciated the drive may contain circuitry to control reviewing the NVM or the NVM may contain circuitry to perform the check itself. In one embodiment, the check may be controlled by standard NVMe administrative commands (or, as it will be appreciated, a proprietary vendor extension) which can be scheduled by the host software, or in some embodiments, automatically performed by circuitry within the drive 316 or the storage itself, e.g., NVM 314. It will be appreciated the same solution may be applied regardless of whether the firmware and/or controller is implemented in host software, or within circuitry within storage.
When host hardware/software (e.g.,
As illustrated one test that may be performed to confirm reading 502 data on the storage is successful. If 504 there is a read error then it will be appreciated that a drive has encountered an error and the affected disk portion may be marked as bad, and because the controller understands the disk layout, it can identify 506 the specific LBA region(s) affected, mark them 508 bad, and report 510 the errors to the host software for correction. It will be appreciated that since the host software must know both LBA and its associated data that was written, the host operating system (OS) can reverse-lookup 512 the data in its system. That is, in one embodiment, the affected Ceph or Hadoop® environment, in order to request data to be written, must know the data and protection information along with the LBA information relating to the logical location of the data to be placed on the drive 316. Knowing this, when the controller 510 receives an error, it has enough information to give host software, such the software used in Ceph, Hadoop®, distributed databases, large datasets, artificial intelligence, genomics, etc. to reverse-lookup 512 a store request to identify the impacted original-data and get a corrected 514 copy for writing back to the drive.
However, if 504 the read test does not give an error relating to a physical error in the storage, such as degrading NVM, data that is read can be tested to determine if 516 the read data passes a validation check. As noted previously, the PI or other data associated with LBA Data 302 can be arbitrarily complex, but known (e.g., in a standard), and may be computed and compared against validation data that was computed by host software, e.g., the Ceph or Hadoop® system, for storing 302 to a drive 316. If 516 there is a read error then the Controller 318 can identify 506 the specific LBA region(s) affected, and report 510 the errors to the host software for reverse-lookup 512 and correction 514. After determining if 504, 516 there were errors, and handling/correcting 512, 514, processing can continue 518, e.g., continuing with the background processes or other tasks.
Returning to
As illustrated, the scrubber 602 is local to, e.g., co-located with or otherwise available to storage, e.g., one or more NVM 604 operating as, for example, NVMe-oF targets 606 communicatively coupled with Controllers 608 which in this example are NVMe controllers for accessing the NVM 604 storage. LBA Data 610, Protection Information (PI) 612 and LBA Metadata 614 is generated as discussed above with respect to
When a store 616 request is received, whether by way of host software, e.g.,
If the scrubber 602 identifies an error accessing the NVM 604 or validating stored data, e.g., validating stored data with some or all of metadata 610-614, the scrubber may compile a list of errors 624 containing, for example, at least the sector and matadata on the NVM affected by the failed read/validation attempt, and provide the errors back to the DSS. While local placement of the scrubber will greatly improve scrubbing remotely located storage, as noted above, it would be quite burdensome for the DSS to have to read an entire NVM over the network or other communication path communicatively coupling the DSS to the Target. The illustrated reporting of just errors to the DSS alleviates burdens on the network, and other hardware and/or software communicating with the Target(s) 606.
The Distributed Storage Service 618 (DSS), in one embodiment, issues IO to a Controller 608 that includes a CRC and optionally application metadata in the Protection Information 612. Application metadata may be used to assist with reverse lookup, which is important for correlating corrupted objects that need be fixed, in accordance with embodiments. It is assumed the metadata is opaque to the controller and meant for reverse lookup usage. It will be appreciated this approach requires taking up storage space with this data, but reduces the need to construct reverse lookup tables which may introduce latency due to locking requirements and processor resources required to do large-scale distributed lookups. Thus the DSS may perform a reverse lookup from LBA sector information using the LBA Metadata and host object format, and since this is an error correction, use the data to determine the Ceph, Hadoop®, etc. object that cannot be read and/or validated and get a corrected copy, e.g., from a mirroring host or the like.
It will be appreciated there are multiple different ways to perform the reverse lookup. One exemplary way is, if the Controller 608 provides meta-data sizes large enough to tag an object (that is, the data being written) with at least its LBA location, then written data will simply incorporate this information and the DSS host software may then directly utilize this information to perform a reverse lookup. Alternatively, if the Controller does not provide metadata large enough to store the desired information for a direct reverse lookup, then the Application Tag 626 may be encoded with information needed to perform the reverse lookup and this information returned by the Controller 608 to the scrubber 602 which in turn returns it to the DSS for performing the reverse lookup.
In yet another alternative, the DSS host hardware and/or software may maintain lookup tables for object to LBA mapping which may be used to speed up corrupted objects identification and correction. In one embodiment, the DSS will use the errors 624 list identifying, for example, failed sectors, as hints only and the DSS will redo the error validation with concurrency control to ensure consistency of the data. It will be appreciated this may be needed because data will be changing during scrubbing process and there is no guarantee the corrupted block remains valid. It will be appreciated that in a distributed storage environment, there may be petabytes or more of data in storage racks, server rooms, etc. Reducing the DSS workload to only redoing possible errors 624 represents a meaningful optimizing of integrity checking, both speeding up background scrubbing while also reducing processor loads in performing the scrubbing.
Depending on its applications, computer device 700 may include other components that may or may not be physically and electrically coupled to the PCB 706. These other components include, but are not limited to, memory controller 708, volatile memory (e.g., dynamic random access memory (DRAM) 710), non-volatile memory such as read only memory (ROM) 712, flash memory 714, storage device 716 (e.g., a hard-disk drive (HDD)), an I/O controller 718, a digital signal processor 720, a crypto processor 722, a graphics processor 724 (e.g., a graphics processing unit (GPU) or other circuitry for performing graphics), one or more antenna 726, a display which may be or work in conjunction with a touch screen display 728, a touch screen controller 730, a battery 732, an audio codec (not shown), a video codec (not shown), a positioning system such as a global positioning system (GPS) device 734 (it will be appreciated other location technology may be used), a compass 736, an accelerometer (not shown), a gyroscope (not shown), a speaker 738, a camera 740, and other mass storage devices (such as hard disk drive, a solid state drive, compact disk (CD), digital versatile disk (DVD)) (not shown), and so forth.
In some embodiments, the one or more processor(s) 702, flash memory 714, and/or storage device 716 may include associated firmware (not shown) storing programming instructions configured to enable computer device 700, in response to execution of the programming instructions by one or more processor(s) 702, to practice all or selected aspects of the methods described herein. In various embodiments, these aspects may additionally or alternatively be implemented using hardware separate from the one or more processor(s) 702, flash memory 714, or storage device 716.
In various embodiments, one or more components of the computer device 700 may implement an embodiment of node 102, host 326, drive 316 (or its associated components), etc. Processor 702 could be in host 326 and communicating with memory 710 though memory controller 708. In some embodiments, I/O controller 718 may interface with one or more external devices to receive a data. Additionally, or alternatively, the external devices may be used to receive a data signal transmitted between components of the computer device 700.
The communication chip(s) 704 may enable wired and/or wireless communications for the transfer of data to and from the computer device 700. The term “wireless” and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communication chip(s) may implement any of a number of wireless standards or protocols, including but not limited to IEEE 802.20, Long Term Evolution (LTE), LTE Advanced (LTE-A), General Packet Radio Service (GPRS), Evolution Data Optimized (Ev-DO), Evolved High Speed Packet Access (HSPA+), Evolved High Speed Downlink Packet Access (HSDPA+), Evolved High Speed Uplink Packet Access (HSUPA+), Global System for Mobile Communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Worldwide Interoperability for Microwave Access (WiMAX), Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 7G, and beyond. The computer device may include a plurality of communication chips 704. For instance, a first communication chip(s) may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth, and a second communication chip 704 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.
The communication chip(s) may implement any number of standards, protocols, and/or technologies datacenters typically use, such as networking technology providing high-speed low latency communication. For example the communication chip(s) may support RoCE (Remote Direct Memory Access (RDMA) over Converged Ethernet), e.g., version 1 or 2, which is a routable protocol having efficient data transfers across a network, and is discussed for example at Internet URL RDMAconsortium.com. The chip(s) may support Fibre Channel over Ethernet (FCoE), iWARP, or other high-speed communication technology, see for example the OpenFabrics Enterprise Distribution (OFED™) documentation available at Internet URL OpenFabrics.org. It will be appreciated datacenter environments benefit from highly efficient networks, storage connectivity and scalability, e.g., Storage Area Networks (SANS), parallel computing using RDMA, Internet Wide Area Remote Protocol (iWARP), InfiniBand Architecture (IBA), and other such technology. Computer device 700 may support any of the infrastructures, protocols and technology identified here, and since new high-speed technology is always being implemented, it will be appreciated by one skilled in the art that the computer device is expected to support equivalents currently known or technology implemented in future.
In various implementations, the computer device 700 may be a laptop, a netbook, a notebook, an ultrabook, a smartphone, a computer tablet, a personal digital assistant (PDA), an ultra-mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit (e.g., a gaming console or automotive entertainment unit), a digital camera, an appliance, a portable music player, or a digital video recorder, or a transportation device (e.g., any motorized or manual device such as a bicycle, motorcycle, automobile, taxi, train, plane, etc.). In further implementations, the computer device 700 may be any other electronic device that processes data.
Any combination of one or more computer usable or computer readable medium(s) may be utilized. The computer-usable or computer-readable medium may be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a transmission media such as those supporting the Internet or an intranet, or a magnetic storage device. Note that the computer-usable or computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted, or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory. In the context of this document, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer-usable medium may include a propagated data signal with the computer-usable program code embodied therewith, either in baseband or as part of a carrier wave. The computer usable program code may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc.
Computer program code for carrying out operations of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). Cooperative program execution may be for a fee based on a commercial transaction, such as a negotiated rate (offer/accept) arrangement, established and/or customary rates, and may include micropayments between device(s) cooperatively executing the program or storing and/or managing associated data.
The present disclosure is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instruction means which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
Example 1 may be a nonvolatile memory (NVM) communicatively coupled to a distributed storage service (DSS), the DSS having a scrubber to validate data stored by the DSS on the nonvolatile memory, comprising: a first background task to review NVM operation to identify a first potential error; and a second background task operable to read a block of data from the NVM having a first portion containing data and a second portion containing validation information for the data, determine a reference validation for the data, and compare the reference validation to the second portion to identify a second potential error; wherein the first and second potential errors are selectively reported to the scrubber.
Example 2 may be example 1, wherein the NVM has a format having a known validation function, and wherein the determine the reference validation for the data is based at least in part on applying the validation function to the data of the first portion.
Example 3 may be example 1, wherein the NVM has a physical structure with a format having a logical layout corresponding to the physical structure, the first background task further to: fail to successfully read a physical portion of the NVM; fail to automatically relocate data stored at the physical portion; identify a first portion of the logical layout corresponding to the physical portion; and include the first portion in the first potential error.
Example 4 may be example 3, the second background task further to automatically: identify a second portion of the logical layout corresponding to the block of data; and include the second portion in the second potential error.
Example 5 may be example 1, wherein the validation data includes Disk Integrity Data incorporating selected ones of Data Integrity Field (DIF), Protection Information (PI), Data Integrity Extension (DIX), and Application Tag.
Example 6 may be example 1, in which the scrubber is disposed with the DSS and the NVM is a remote target of the DSS, further comprising: wherein the scrubber is to validate substantially all of the NVM, but wherein the NVM self-inspects to offload scrubbing from the scrubber and only reports to the scrubber portions of the NVM corresponding to the first and second errors.
Example 7 may be example 6 wherein the total size of reported portions of the NVM represents less than 10% of the total size of the NVM.
Example 8 may be example 1, wherein the NVM is disposed within a machine, the machine comprising: a controller to receive a write request from the DSS including at least data and metadata associated with the data to store on the NVM; wherein the controller controls the first and second background tasks based at least in part on the validation data.
Example 9 may be example 8, wherein the metadata includes at least one tag to facilitate identifying a mapping between a logical object written by the DSS to the NVM, and one or more LBA locations on the NVM for storing the logical object.
Example 10 may be example 1 wherein a namespace creation for the NVM includes encoding in the NVM a schedule for performing the first background task, and wherein the second background task is performed during selected ones of the first background task.
Example 11 may be example 1, wherein the NVM is one of a cluster of NVM providing distributed storage for the DSS.
Example 12 may be example 1 or 2, wherein the NVM has a physical structure with a format having a logical layout corresponding to the physical structure, the first background task further to: fail to successfully read a physical portion of the NVM; fail to automatically relocate data stored at the physical location; identify a first portion of the logical layout corresponding to the physical portion; and include the first portion in the first potential error.
Example 13 may be any of examples 1-3, wherein the validation data includes Disk Integrity Data incorporating selected ones of Data Integrity Field (DIF), Protection Information (PI), Data Integrity Extension (DIX), and Application Tag.
Example 14 may be any of examples 1-5, in which the scrubber is disposed with the DSS and the NVM is a remote target of the DSS, further comprising: wherein the scrubber is to validate substantially all of the NVM, but wherein the NVM self-inspects to offload the scrubbing task from the scrubber and only reports to the scrubber portions of the NVM corresponding to the first and second errors.
Example 15 may be any of examples 1-7, wherein the NVM is disposed within a machine, the machine comprising: a controller to receive a write request from the DSS including at least data and metadata associated with the data to store on the NVM; wherein the controller controls the first and second background tasks based at least in part on the validation data.
Example 16 may be any of example 1-9 wherein a namespace creation for the NVM includes encoding in the NVM a schedule for performing the first background task, and wherein the second background task is performed during selected ones of the first background task.
Example 17 may be any of examples 1-10 wherein the NVM is one of a cluster of NVM providing distributed storage for the DSS.
Example 18 may be one or more non-transitory computer-readable media having instructions accessible by a machine including at least one processor, and at least one nonvolatile memory storage (NVM), the machine communicatively coupled to a distributed storage service (DSS) having a scrubber service to validate data stored by the DSS on the nonvolatile memory, that, in response to execution of the instructions by the machine, cause the machine to: review, as a first background task, NVM operation to identify a first potential error; and read, as a second background task, a block of data from the NVM having a first portion containing data and a second portion containing validation information for the data, determine a reference validation for the data, and compare the reference validation to the second portion to identify a second potential error; wherein the first and second potential errors are selectively reported to the scrubber.
Example 19 may be example 18, further including instructions to: identify a validation function corresponding to a format of the NVM; and determine the reference validation for the data based at least in part on applying the validation function to the data of the first portion.
Example 20 may be example 18, wherein the NVM has a physical structure with a format having a logical layout corresponding to the physical structure, the instructions for the first background task comprising instructions to: first test for failure to successfully read a physical portion of the NVM; second test for failure to automatically relocate data stored at the physical portion; identify a first portion of the logical layout corresponding to the physical portion; and include the first portion in the first potential error.
Example 21 may be example 20, the instructions for the second background task comprising instructions to automatically identify a second portion of the logical layout corresponding to the block of data; and include the second portion in the second potential error.
Example 22 may be example 18, in which the scrubber is disposed with the DSS and the NVM is a remote target of the DSS, further comprising instructions for the NVM to offload scrubbing from the scrubber by self-inspecting for errors and only report to the scrubber self-identified errors.
Example 23 may be example 18, wherein the NVM is disposed within the machine, the machine comprising: a controller to receive a write request from the DSS including at least data and metadata associated with the data to store on the NVM; and instructions, which when executed by the machine, direct the controller to control the first and second background tasks based at least in part on the validation data.
Example 24 may be any of examples 18 or 19, wherein the NVM has a physical structure with a format having a logical layout corresponding to the physical structure, the instructions for the first background task comprising instructions to: first test for failure to successfully read a physical portion of the NVM; second test for failure to automatically relocate data stored at the physical location; identify a first portion of the logical layout corresponding to the physical portion; and include the first portion in the first potential error.
Example 25 may be any of example 18-20, the instructions for the second background task comprising instructions to automatically identify a second portion of the logical layout corresponding to the block of data; and include the second portion in the second potential error.
Example 26 may be any of examples 18-25, in which the scrubber is disposed with the DSS and the NVM is a remote target of the DSS, further comprising instructions for the NVM to offload the scrubbing task from the scrubber by self-inspecting for errors and only report to the scrubber self-identified errors.
Example 27 may be any of examples 18-26, wherein the NVM is disposed within the machine, the machine comprising: a controller to receive a write request from the DSS including at least data and metadata associated with the data to store on the NVM; instructions, which when executed by the machine, direct the controller to control the first and second background tasks based at least in part on the validation data.
Example 28 may be a system comprising: a nonvolatile memory configured with autonomous self-validation circuitry to scrub the nonvolatile memory to identify errors within the nonvolatile memory; a distributed storage service including a scrubber communicatively coupled with the nonvolatile memory; wherein the scrubber automatically receives error reports from nonvolatile memory.
Example 29 may be example 28, further comprising: disposing the distributed storage service and the scrubber in a host; and disposing the nonvolatile memory and a controller in a disk configured to be a NVMe-oF target communicatively coupled with the host.
Example 30 may be example 28, further comprising: a local PCIe fabric communicatively coupling a selected one of the distributed storage or the scrubber with nonvolatile memory.
It will be apparent to those skilled in the art that various modifications and variations can be made in the disclosed embodiments of the disclosed device and associated methods without departing from the spirit or scope of the disclosure. Thus, it is intended that the present disclosure covers the modifications and variations of the embodiments disclosed above provided that the modifications and variations come within the scope of any claims and their equivalents.
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Number | Date | Country | |
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20190004888 A1 | Jan 2019 | US |