Patent Grant
8144142
The present invention relates to a drive circuit for driving a capacitive load by a driving pulse and a display device using the drive circuit.
Known as conventional drive circuits for driving capacitive loads are sustain drives for driving sustain electrodes in plasma display panels, for example.
The switch SW11 is connected between a power supply terminal V4 and a node N11, and the switch SW12 is connected between the node N11 and a ground terminal. A power supply voltage Vsus is applied to the power supply voltage V4. The node N11 is connected to 480 sustain electrodes, for example. A panel capacitance Cp corresponding to the total capacitance between the plurality of sustain electrodes and the ground terminal is shown in
The recovery capacitor C401 is connected between a node N13 and the ground terminal. The switch SW21 and the diode D401 are connected in series between the node N13 and a node N12, and the diode D402 and the switch SW22 are connected in series between the node N12 and the node N13. The recovery coil L401 is connected between the node N12 and the node N11.
First, in a time period Ta, the switch SW21 is turned on, and the switch SW12 is turned off. At this time, the switches SW11 and SW22 are turned off. Thus, a potential at the node N11 gently rises due to LC resonance caused by the recovery coil L401 and the panel capacitance Cp. Then, in a time period Tb, the switch SW21 is turned off, and the switch SW11 is turned on. Thus, the potential at the node N11 rapidly rises. In a time period Tc, the potential at the node N11 is fixed to the power supply voltage Vsus.
Then, in a time period Td, the switch SW11 is turned off, and the switch SW22 is turned on. Thus, the potential at the node N11 gently falls due to LC resonance caused by the recovery coil L401 and the panel capacitance Cp. Thereafter, in a time period Te, the switch SW22 is turned off, and the switch SW12 is turned on. Thus, the potential at the node N11 rapidly falls, and is fixed to the ground potential. A periodical sustain pulse Psu is applied to the plurality of sustain electrodes by repeating the above-mentioned operations in the sustain time period.
As described in the foregoing, a rise portion and a fall portion of the sustain pulse Psu are respectively composed of LC resonance portions in the time periods Ta and Td by the operation of the switch SW21 or SW22 and edges in the time periods Tb and Te by an on-operation of the switch SW11 or SW12 (see Patent Document 1).
Each of the switches SW11, SW12, SW21, and SW22 is generally composed of an FET (Field Effect Transistor) serving as a switching element. Each of the FETs has a drain-source capacitance as a parasitic capacitance. An interconnection connected to each of the FETs has an inductance component. When the switch SW11 or the like performs a switching operation, therefore, a switching noise is generated. Thus, the switching noise is applied to the plurality of sustain electrodes. The plurality of sustain electrodes serve as an antenna, to undesirably radiate an electromagnetic wave.
Therefore, in the drive circuit disclosed in Patent Document 1, one capacitor is connected in parallel between the drain and the source of each of the FETs, to absorb the switching noise in the FET.
In this case, however, only the switching noise having a particular frequency component can be absorbed. Therefore, the switching noise having various frequency components cannot be sufficiently restrained. As a result, the radiation of a high-frequency electromagnetic wave cannot be sufficiently restrained.
This radiation of the high-frequency electromagnetic wave having various frequency components may exert an adverse electromagnetic effect on the other electronic equipment. Therefore, it is desired that the undesired radiation of the high-frequency electromagnetic wave over a wide band is sufficiently restrained.
An object of the present invention is to provide a drive circuit capable of sufficiently restraining the undesired radiation of a high-frequency electromagnetic wave over a wide band and a display device using the drive circuit.
(1)
According to an aspect of the present invention, a drive circuit for supplying a driving pulse to a capacitive load including a display element through a pulse supply path includes a first voltage source that supplies a first voltage to raise the driving pulse, a second voltage source that supplies a second voltage lower than the first voltage to lower the driving pulse, a first switching element having one end receiving the first voltage from the first voltage source, a second switching element having one end receiving the second voltage from the second voltage source, a first interconnection having one end connected to the other end of the first switching element and the other end connected to the pulse supply path, a second interconnection having one end connected to the other end of the second switching element and the other end connected to the pulse supply path, a first impedance control circuit connected in parallel with the first switching element between the one end and the other end of the first switching element, and a second impedance control circuit connected in parallel with the second switching element between the one end and the other end of the second switching element, in which the first and second switching elements operate to apply the driving pulse to the capacitive load in a sustain time period during which the display element is lighten, the first impedance control circuit includes a plurality of first capacitive elements connected in parallel with the first switching element, the second impedance control circuit includes a plurality of second capacitive elements connected in parallel with the second switching element, each of the plurality of first capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of first capacitive elements differ from one another, and each of the plurality of second capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of second capacitive elements differ from one another.
In the drive circuit, the first and second switching elements operate in the sustain time period, and the driving pulse is supplied to the capacitive load including the display element through the pulse supply path. In this case, the voltage of the driving pulse is raised by the first voltage supplied by the first voltage source, while being lowered by the second voltage supplied by the second voltage source. The first and second switching elements perform a switching operation, so that switching noises each having a plurality of frequency components are respectively generated.
Each of the plurality of first capacitive elements in the first impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the first capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of first capacitive elements differ, so that the respective self-resonance frequencies of the plurality of first capacitive elements differ. Thus, the impedance of the first impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the first switching element is absorbed in the first voltage source through the first impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of second capacitive elements in the second impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the second capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of second capacitive elements differ, so that the respective self-resonance frequencies of the plurality of second capacitive elements differ. Thus, the impedance of the second impedance-control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the second switching element is absorbed in the second voltage source through the second impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of a high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
(2)
The drive circuit may further include an inductance element having one end connected to the capacitive load through the pulse supply path, a recovering capacitive element for recovering charges from the capacitive load, first and second unidirectional conductive elements, and third and fourth switching elements, in which the first unidirectional conductive element and the third switching element may be connected in series between the other end of the inductance element and the recovering capacitive load so as to allow the supply of a current from the recovering capacitive element to the inductance element, and the second unidirectional conductive element and the fourth switching element may be connected in series between the other end of the inductance element and the recovering capacitive element so as to allow the supply of a current from the inductance element to the recovering capacitive element.
In this case, the current is supplied to the capacitive load from the recovering capacitive element through the first unidirectional conductive element, the third switching element, the inductance element, and the pulse supply path. Further, the current is supplied to the recovering capacitive element from the capacitive load through the pulse supply path, the inductance element, the second unidirectional conductive element, and the fourth switching element.
Thus, apart of the rising edge of the driving pulse supplied to the capacitive load including the display element occurs by supplying the current to the capacitive load from the recovering capacitive element, and a part of the falling edge of the driving pulse occurs by supplying the current to the recovering capacitive element from the capacitive load. Consequently, the power consumption can be reduced while sufficiently restraining the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load.
(3)
The drive circuit may further include a third impedance control circuit connected in parallel with the third switching element, and a fourth impedance control circuit connected in parallel with the fourth switching element, in which the third impedance control circuit may include a plurality of third capacitive elements connected in parallel with the third switching element, the fourth impedance control circuit may include a plurality of fourth capacitive elements connected in parallel with the fourth switching element, each of the plurality of third capacitive elements may include a capacitance component and an inductance component, and the values of the capacitance components in the plurality of third capacitive elements may differ from one another, and each of the plurality of fourth capacitive elements may include a capacitance component and an inductance component, and the values of the capacitance components in the plurality of fourth capacitive elements may differ from one another.
In this case, each of the plurality of third capacitive elements in the third impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the third capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of third capacitive elements differ, so that the respective self-resonance frequencies of the plurality of third capacitive elements differ. Thus, the impedance of the third impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the third switching element is absorbed in the recovering capacitive element through the third impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of fourth capacitive elements in the fourth impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the fourth capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of fourth capacitive elements differ, so that the respective self-resonance frequencies of the plurality of fourth capacitive elements differ. Thus, the impedance of the fourth impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the fourth switching element is absorbed in the recovering capacitive element through the fourth impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
(4)
The drive circuit may further include a third impedance control circuit connected in parallel with the first unidirectional conductive element, and a fourth impedance control circuit connected in parallel with the second unidirectional conductive element, in which the third impedance control circuit may include a plurality of third capacitive elements connected in parallel with the first unidirectional conductive element, the fourth impedance control circuit may include a plurality of fourth capacitive elements connected in parallel with the second unidirectional conductive element, each of the plurality of third capacitive elements may include a capacitance component and an inductance component, and the values of the capacitance components in the plurality of third capacitive elements may differ from one another, and each of the plurality of fourth capacitive elements may include a capacitance component and an inductance component, and the values of the capacitance components in the plurality of fourth capacitive elements may differ from one another.
In this case, each of the plurality of third capacitive elements in the third impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the third capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of third capacitive elements differ, so that the respective self-resonance frequencies of the plurality of third capacitive elements differ. Thus, the impedance of the third impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the first unidirectional conductive element is absorbed in the recovering capacitive element through the third impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of fourth capacitive elements in the fourth impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the fourth capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of fourth capacitive elements differ, so that the respective self-resonance frequencies of the plurality of fourth capacitive elements differ. Thus, the impedance of the fourth impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the second unidirectional conductive element is absorbed in the recovering capacitive element through the fourth impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
(5)
The plurality of first capacitive elements may include first to n-th first capacitive elements, the plurality of second capacitive elements may include first to n-th second capacitive elements, and n may be a natural number of not less than two, the n-th first capacitive element out of the first to n-th first capacitive elements may have the smallest capacitance value, the n-th second capacitive element out of the first to n-th second capacitive elements may have the smallest capacitance value, the first impedance control circuit may further include first to (n−1)-th first resistive elements respectively connected in series with the first to (n−1)-th first capacitive elements, and the second impedance control circuit may further include first to (n−1)-th second resistive elements respectively connected in series with the first to (n−1)-th second capacitive elements.
In this case, when anti-resonance occurs between the respective self-resonance frequencies of the first to n-th first capacitive elements, the level of the anti-resonance is reduced by the first to (n−1)-th first resistive elements. Thus, the impedance characteristics are inhibited from being degraded at the anti-resonance frequency.
Similarly, when anti-resonance occurs between the respective self-resonance frequencies of the first to n-th second capacitive elements, the level of the anti-resonance is reduced by the first to (n−1)-th second resistive elements. Thus, the impedance characteristics are inhibited from being degraded at the anti-resonance frequency.
Thus, the switching noise over a wide band is absorbed in the first and second voltage sources through the first and second impedance control circuits. As a result, the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load can be sufficiently restrained.
(6)
The plurality of first capacitive elements may include first to n-th first capacitive elements, the plurality of second capacitive elements may include first to n-th second capacitive elements, and n may be a natural number of not less than two, the n-th first capacitive element out of the first to n-th first capacitive elements may have the smallest capacitance value, the n-th first second capacitive element out of the first to n-th second capacitive elements may have the smallest capacitance value, the first impedance control circuit may further include first to (n−1)-th first beads cores respectively connected in series with the first to (n−1)-th first capacitive elements, and the second impedance control circuit may further include first to (n−1)-th second beads cores respectively connected in series with the first to (n−1)-th second capacitive elements.
In this case, when anti-resonance occurs between the respective self-resonance frequencies of the first to n-th first capacitive elements, the level of the anti-resonance is reduced by the first to (n−1)-th first beads cores. Thus, the impedance characteristics are inhibited from being degraded at the anti-resonance frequency. At this time, the impedance characteristics are not degraded in a frequency region lower than the self-resonance frequency of the n-th first capacitive element.
Similarly, when anti-resonance occurs between the respective self-resonance frequencies of the first to n-th second capacitive elements, the level of the anti-resonance is reduced by the first to (n−1)-th second beads cores. Thus, the impedance characteristics are inhibited from being degraded at the anti-resonance frequency. In this case, the impedance characteristics are not degraded in a frequency region lower than the self-resonance frequency of the n-th second capacitive element.
Thus, the switching noise over a wide band is absorbed in the first and second voltage sources through the first and second impedance control circuits. As a result, the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load can be sufficiently restrained.
(7)
Each of the plurality of first capacitive elements may be composed of a first stacked ceramic capacitor, and each of the plurality of second capacitive elements may be composed of a second stacked ceramic capacitor.
In this case, the plurality of first capacitive loads and the plurality of second capacitive loads can sufficiently self-resonate. Thus, the impedance of each of the first capacitive elements and the impedance of each of the second capacitive elements are sufficiently reduced at a particular frequency. As a result, the undesired radiation of the high-frequency electromagnetic wave over a wide band from the capacitive load can be more sufficiently restrained.
(8)
According to another aspect of the present invention, a drive circuit for supplying a driving pulse to a capacitive load including a display element through a pulse supply path includes a first voltage source that supplies a first voltage to raise the driving pulse, a second voltage source that supplies a second voltage lower than the first voltage to lower the driving pulse, first, second, third and fourth switching elements, an inductance element having one end connected to the capacitive load through the pulse supply path, a recovering capacitive element for recovering charges from the capacitive load, first and second unidirectional conductive elements, a first impedance control circuit connected in parallel with the third switching element, and a second impedance control circuit connected in parallel with the fourth switching element, in which the first switching element is connected between the first voltage source and the pulse supply path, the second switching element is connected between the second voltage source and the pulse supply path, the first and second switching elements operate to apply the driving pulse to the capacitive load in a sustain time period during which the display element is lighten, the first unidirectional conductive element and the third switching element are connected in series between the other end of the inductance element and the recovering capacitive load so as to allow the supply of a current from the recovering capacitive element to the inductance element, and the second unidirectional conductive element and the fourth switching element are connected in series between the other end of the inductance element and the recovering capacitive element so as to allow the supply of a current from the inductance element to the recovering capacitive element, the first impedance control circuit includes a plurality of first capacitive elements connected in parallel with the third switching element, the second impedance control circuit includes a plurality of second capacitive elements connected in parallel with the fourth switching element, each of the plurality of first capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of first capacitive elements differ from one another, and each of the plurality of second capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of second capacitive elements differ from one another.
In the drive circuit, the first and second switching elements operate in the sustain time period, and the driving pulse is supplied to the capacitive load including the display element through the pulse supply path. In this case, the voltage of the driving pulse is raised by the first voltage supplied by the first voltage source, while being lowered by the second voltage supplied by the second voltage source.
The current is supplied to the capacitive load from the recovering capacitive element through the first unidirectional conductive element, the third switching element, the inductance element, and the pulse supply path. Further, the current is supplied to the recovering capacitive element from the capacitive load through the pulse supply path, the inductance element, the second unidirectional conductive element, and the fourth switching element.
Thus, apart of the rising edge of the driving pulse supplied to the capacitive load including the display element occurs by supplying the current to the capacitive load from the recovering capacitive element, and a part of the falling edge of the driving pulse occurs by supplying the current to the recovering capacitive element from the capacitive load. Consequently, the power consumption can be reduced.
At this time, the third and fourth switching elements perform a switching operation, so that switching noises each having a plurality of frequency components are respectively generated.
In this case, each of the plurality of first capacitive elements in the first impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the first capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of first capacitive elements differ, so that the respective self-resonance frequencies of the plurality of first capacitive elements differ. Thus, the impedance of the first impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the third switching element is absorbed in the recovering capacitive element through the first impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of second capacitive elements in the second impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the second capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of second capacitive elements differ, so that the respective self-resonance frequencies of the plurality of second capacitive elements differ. Thus, the impedance of the second impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the fourth switching element is absorbed in the recovering capacitive element through the second impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of a high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
(9)
According to still another aspect of the present invention, a drive circuit for supplying a driving pulse to a capacitive load including a display element through a pulse supply path includes a first voltage source that supplies a first voltage to raise the driving pulse, a second voltage source that supplies a second voltage lower than the first voltage to lower the driving pulse, first, second, third and fourth switching elements, an inductance element having one end connected to the capacitive load through the pulse supply path, a recovering capacitive element for recovering charges from the capacitive load, first and second unidirectional conductive elements, a first impedance control circuit connected in parallel with the first unidirectional conductive element, and a second impedance control circuit connected in parallel with the second unidirectional conductive element, in which the first switching element is connected between the first voltage source and the pulse supply path, the second switching element is connected between the second voltage source and the pulse supply path, the first and second switching elements operate to apply the driving pulse to the capacitive load in a sustain time period during which the display element is lighten, the first unidirectional conductive element and the third switching element are connected in series between the other end of the inductance element and the recovering capacitive load so as to allow the supply of a current from the recovering capacitive element to the inductance element, the second unidirectional conductive element and the fourth switching element are connected in series between the other end of the inductance element and the recovering capacitive element so as to allow the supply of a current from the inductance element to the recovering capacitive element, the first impedance control circuit includes a plurality of first capacitive elements connected in parallel with the first unidirectional conductive element, the second impedance control circuit includes a plurality of second capacitive elements connected in parallel with the second unidirectional conductive element, each of the plurality of first capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of first capacitive elements differ from one another, and each of the plurality of second capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of second capacitive elements differ from one another.
In the drive circuit, the first and second switching elements operate in the sustain time period, and the driving pulse is supplied to the capacitive load including the display element through the pulse supply path. In this case, the voltage of the driving pulse is raised by the first voltage supplied by the first voltage source, while being lowered by the second voltage supplied by the second voltage source.
The current is supplied to the capacitive load from the recovering capacitive load through the first unidirectional conductive element, the third switching element, the inductance element, and the pulse supply path. Further, the current is supplied to the recovering capacitive element from the capacitive load through the pulse supply path, the inductance element, the second unidirectional conductive element, and the fourth switching element.
Thus, a part of the rising edge of the driving pulse supplied to the capacitive load including the display element occurs by supplying the current to the capacitive load from the recovering capacitive element, and a part of the falling edge of the driving pulse occurs by supplying the current to the recovering capacitive element from the capacitive load. Consequently, the power consumption can be reduced.
At this time, the first and second unidirectional conductive elements perform a switching operation, so that switching noises each having a plurality of frequency components are respectively generated.
In this case, each of the plurality of first capacitive elements in the first impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the first capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of first capacitive elements differ, so that the respective self-resonance frequencies of the plurality of first capacitive elements differ. Thus, the impedance of the first impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having a plurality of frequencies generated by the first unidirectional conductive element is absorbed in the recovering capacitive element through the first impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of second capacitive elements in the second impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the second capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of second capacitive elements differ, so that the respective self-resonance frequencies of the plurality of second capacitive elements differ. Thus, the impedance of the second impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having the plurality of frequencies generated by the second unidirectional conductive element is absorbed in the recovering capacitive element through the second impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of a high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
(10)
According to a further aspect of the present invention, a display device includes a display panel including a capacitive element composed of a plurality of display elements, and a drive circuit for supplying a driving pulse to the capacitive load through a pulse supply path, in which the drive circuit includes a first voltage source that supplies a first voltage to raise the driving pulse, a second voltage source that supplies a second voltage lower than the first voltage to lower the driving pulse, a first switching element having one end receiving the first voltage from the first voltage source, a second switching element having one end receiving the second voltage from the second voltage source, a first interconnection having one end connected to the other end of the first switching element and the other end connected to the pulse supply path, a second interconnection having one end connected to the other end of the second switching element and the other end connected to the pulse supply path, a first impedance control circuit connected in parallel with the first switching element between the one end and the other end of the first switching element, and a second impedance control circuit connected in parallel with the second switching element between the one end and the other end of the second switching element, the first and second switching elements operate to apply the driving pulse to the capacitive load in a sustain time period during which the display element is lighten, the first impedance control circuit includes a plurality of first capacitive elements connected in parallel with the first switching element, the second impedance control circuit includes a plurality of second capacitive elements connected in parallel with the second switching element, each of the plurality of first capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of first capacitive elements differ from one another, and each of the plurality of second capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in the plurality of second capacitive elements differ from one another.
In the display device, the first and second switching elements operate in the sustain time period, and the driving pulse is supplied to the capacitive load including the plurality of display elements in the display panel through the pulse supply path. In this case, the voltage of the driving pulse is raised by the first voltage supplied by the first voltage source, while being lowered by the second voltage supplied by the second voltage source. The first and second switching elements perform a switching operation, so that switching noises each having a plurality of frequency components are respectively generated.
Each of the plurality of first capacitive elements in the first impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the first capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of first capacitive elements differ, so that the respective self-resonance frequencies of the plurality of first capacitive elements differ. Thus, the impedance of the first impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having the plurality of frequencies generated by the first switching element is absorbed in the first voltage source through the first impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
Similarly, each of the plurality of second capacitive elements in the second impedance control circuit includes the capacitance component and the inductance component, so that it self-resonates at a particular frequency. Thus, the impedance of each of the second capacitive elements is reduced at a particular frequency. Further, the respective values of the capacitance components in the plurality of second capacitive elements differ, so that the respective self-resonance frequencies of the plurality of second capacitive elements differ. Thus, the impedance of the second impedance control circuit is reduced at a plurality of frequencies. Therefore, the switching noise having the plurality of frequencies generated by the second switching element is absorbed in the second voltage source through the second impedance control circuit, so that the effect of the switching noise on the capacitive load including the display element is reduced through the pulse supply path.
These results allow the undesired radiation of a high-frequency electromagnetic wave over a wide band from the capacitive load to be sufficiently restrained.
According to the present invention, a switching noise having a plurality of frequencies is reduced, which allows the undesired radiation of a high-frequency electromagnetic wave over a wide band from a capacitive load can be sufficiently restrained.
The embodiments of the present invention will be described in detail referring to the drawings. The embodiments below describe a sustain driver used for a plasma display device as an example of a drive circuit according to the present invention.
The plasma display device shown in
The PDP 1 includes a plurality of address electrodes (data electrodes) 11, a plurality of scan electrodes 12, and a plurality of sustain electrodes 13. The plurality of address electrodes 11 are arranged in a vertical direction on a screen, and the plurality of scan electrodes 12 and the plurality of sustain electrodes 13 are arranged in a horizontal direction on the screen. The plurality of sustain electrodes 13 are connected to one another. A discharge cell DC is formed at each of intersections of the address electrodes 11, the scan electrodes 12, and the sustain electrodes 13. Each of the discharge cells DC constitutes a pixel on the screen. In
The data driver 2 is connected to the plurality of address electrodes 11 in the PDP 1. The plurality of scan driver ICs 3a are connected to the scan driver 3. The plurality of scan electrodes 12 in the PDP 1 are respectively connected to the scan driver ICs 3a. The sustain driver 4 is connected to the plurality of sustain electrodes 13 in the PDP 1.
The data driver 2 applies write pulses to the corresponding address electrodes 11 in the PDP 1 in response to image data in a writing time period. The plurality of scan driver ICs 3a are driven by the scan driver 3, to respectively apply write pulses to the plurality of scan electrodes 12 in the PDP 1 in order while shifting shift pulses SH in a vertical scanning direction in the writing time period. Thus, address discharges are induced in the corresponding discharge cell DC.
The plurality of scan driver ICs 3a respectively apply periodical sustain pulses to the plurality of scan electrodes 12 in the PDP 1 in a sustain time period. On the other hand, the sustain driver 4 simultaneously applies a sustain pulse whose phase is shifted by 180 degrees from that of the sustain pulses applied to the scan electrodes 12 to the plurality of sustain electrodes 13 in the PDP 1. This causes sustain discharges to be induced in the corresponding discharge cell DC.
In an initialization and writing time period, initialization pulses (setup pulses) Pset are simultaneously applied, respectively, to the plurality of scan electrodes 12. Therefore, write pulses Pw are sequentially applied, respectively, to the plurality of scan electrodes 12. This causes address discharges to be induced in the corresponding discharge cell DC in the PDP 1.
In a sustain time period, sustain pulses Psc are then periodically applied, respectively, to the plurality of scan electrodes 12, and sustain pulses Psu are periodically applied, respectively, to the plurality of sustain electrodes 13. The phase of the sustain pulse Psu is shifted by 180 degrees from the phase of the sustain pulse Psc. This causes sustain discharges to be induced subsequently to the address discharges.
The sustain driver 4 shown in
The sustain driver 4 shown in
The transistor Q1 has its one end connected to a power supply terminal V1 and the other end connected to a node N1 through an interconnection Li1, and has its gate receiving a control signal S1. The transistor Q1 has a drain-source capacitance CP1 as a parasitic capacitance. An impedance control circuit 41 is connected in parallel with the transistor Q1 between the drain and the source of the transistor Q1. A power supply voltage Vsus is applied to the power supply terminal V1.
The transistor Q2 has its one end connected to the node N1 through an interconnection Li2 and the other end connected to a ground terminal, and has its gate receiving a control signal S2. The transistor Q2 has a drain-source capacitance CP2 as a parasitic capacitance. The impedance control circuit 42 is connected in parallel with the transistor Q2 between the drain and the source of the transistor Q2.
The node N1 is connected to 480 sustain electrodes 13, for example, through an interconnection Li0. In
The recovery capacitor Cr is connected between a node N3 and the ground terminal. The transistors Q3 and the diode D1 are connected in series between the node N3 and a node N2. The diode D2 and the transistor Q4 are connected in series between the node N2 and the node N3. A control signal S3 is inputted to the gate of the transistor Q3, and a control signal S4 is inputted to the gate of the transistor Q4. The recovery coil L is connected between the node N2 and the node N1.
The operation in the sustain time period of the sustain driver 4 configured as described above will be then described.
First, at the time t1, the control signal S2 enters a low level to turn the transistor Q2 off, and the control signals S3 enters a high level to turn the transistor Q3 on. At this time, the control signal S1 enters a low level to turn the transistor Q1 off, and the control signal S4 enters a low level to turn the transistor Q4 off. Consequently, the recovery capacitor Cr is connected to the recovery coil L through the transistor Q3 and the diode D1. A potential at the node N1 smoothly rises due to LC resonance caused by the recovery coil L and the panel capacitance Cp. At this time, charges in the recovery capacitor Cr are emitted into the panel capacitance Cp through the transistor Q3, the diode D1, and the recovery coil L.
Furthermore, a current flowing through the transistor Q3, the diode D1, and the recover coil L flows not only into the panel capacitance Cp but also into the drain-source capacitance CP1 of the transistor Q1 and the impedance control circuit 41 through the interconnection Li1 and into the drain-source capacitance CP2 of the transistor Q2 and the impedance control circuit 42 through the interconnection Li2.
Then, at the time t2, the control signal S1 enters a high level to turn the transistor Q1 on, and the control signal S3 enters a low level to turn the transistor Q3 off. Consequently, the node N1 is connected to the power supply terminal V1, so that the potential at the node N1 rapidly rises and is fixed to a power supply voltage Vsus. At this time, a switching noise having a plurality of frequency components is generated from the transistor Q1. The switching noise includes a frequency component of LC resonance caused by the drain-source capacitance CP1 of the transistor Q1 and an inductance component of the interconnection Li1 and the other plurality of frequency components.
At this time, the switching noise generated from the transistor Q1 is returned to the power supply terminal V1 through the capacitor CP1 and the impedance control circuit 41 and is returned to the ground terminal through the capacitor CP2 and the impedance control circuit 42. Thus, the effect of the switching noise on the sustain electrode 13 is reduced, so that undesired radiation is restrained. The respective operations of the impedance control circuits 41 and 42 will be described later.
Then, at the time t3, the control signal S1 enters a low level to turn the transistor Q1 off, and the control signal S4 enters a high level to turn the transistor Q4 on. Consequently, the recovery capacitor Cr is connected to the recovery coil L through the diode D2 and the transistor Q4. The potential at the node N1 gently falls due to LC resonance caused by the recovery coil L and the panel capacitance Cp. At this time, charges stored in the panel capacitance Cp are stored in the recovery capacitor Cr through the recovery coil L, the diode D2, and the transistor Q4, to recover the charges.
Then, at the time t4, the control signal S2 enters a high level to turn the transistor Q2 on, and the control signal S4 enters a low level to turn the transistor Q4 off. Consequently, the node N1 is connected to the ground terminal, so that the potential at the node N1 rapidly rises and is fixed to the ground potential. At this time, a switching noise having a plurality of frequency components is generated from the transistor Q2. The switching noise includes a frequency component of LC resonance caused by the drain-source capacitance CP2 of the transistor Q2 and an inductance component of the interconnection Li2 and the other plurality of frequency components.
At this time, the switching noise generated from the transistor Q2 is returned to the power supply terminal V1 through the capacitor CP1 and the impedance control circuit 41 and is returned to the ground terminal through the capacitor CP2 and the impedance control circuit 42. Thus, the effect of the switching noise on the sustain electrode 13 is reduced, so that undesired radiation is restrained. The respective operations of the impedance control circuits 41 and 42 will be described later.
The above-mentioned operation is repeatedly performed in the sustain time period. In this case, the switching noises in a wide band respectively generated from the transistors Q1 and Q2 are restrained by the functions of the impedance control circuits 41 and 42. As a result, the undesired radiation of an electromagnetic wave over a wide band is restrained.
In the present embodiment, any of the first to third configurations, described below, is used as the impedance control circuits 41 and 42.
As shown in
The impedance control circuit 42 includes n capacitors C21 and C2n. n is a natural number of not less than two. The capacitors C21 to C2n are connected in parallel with the transistor Q2. It is preferable that respective nodes between the capacitors C21 to C2n and the transistor Q2 are closer to the source and the drain of the transistor Q2. For example, it is preferable that the capacitors C21 to C2n and the transistor Q2 are connected to each other on the same circuit board. This allows the effect, descried later, to be more reliably obtained. The capacitors C21 to C2n respectively have different capacitance values. Here, the respective capacitance values of the capacitors C21 to C2n decrease in this order, and the capacitor C2n has the smallest capacitance value.
In the present embodiment, each of the capacitors C11 to C1n and C21 and C2n is composed of a stacked ceramic capacitor.
In the stacked ceramic capacitor, a dip (a minimal portion) Dp occurs in the impedance characteristics. The frequency of the dip Dp corresponds to a self-resonance frequency. The self-resonance frequency of the stacked ceramic capacitor differs depending on the capacitance value. On the other hand, no dip occurs in the impedance characteristics in the tantalum electrolytic capacitor and the aluminum electrolytic capacitor.
In the impedance control circuit 41 shown in
Similarly, in the impedance control circuit 42, the n capacitors C21 to C2n respectively having different capacitance values are connected in parallel with the transistor Q2. Therefore, the switching noise is absorbed in the ground terminal in the n different self-resonance frequency bands.
Since the transistors Q1 and Q2 respectively generate the switching noises, the capacitors C11 to C1n are arranged in the vicinity of the transistor Q1, and the capacitors C21 to C2n are arranged in the vicinity of the capacitors C21 to C2n transistor Q2 in order to reduce the effect of the interconnections Li1 and Li2. This allows the effect of the interconnections L11 and Li2 to be removed. Consequently, the switching noises respectively generated from the transistors Q1 and Q2 can be sufficiently absorbed, as compared with those in a case where the capacitors are inserted between the interconnection Li0 and the ground terminal shown in
Here, the respective functions of the impedance control circuits 41 and 42 shown in
In
In the stacked ceramic capacitor C10, when the area of a ceramic layer is constant, the value of the capacitance component C1 increases as the number of ceramic layers increases, so that the value of the inductance component L1 and the value of the resistance component R1 hardly change. Since the value of the resistance component R1 is low, a dip Dp1 occurs in the impedance characteristics, as shown in
Since the internal equivalent circuit of the stacked ceramic capacitor C10 is a series circuit in LCR (Inductance-Capacitance-Resistance), the self-resonance frequency exists. In the example shown in
On the other hand, in the tantalum electrolytic capacitor or the aluminum electrolytic capacitor, a tantalum sheet or an aluminum sheet is wound, so that a resistance component is large. Thus, no dip occurs in the impedance characteristics, as shown in
In order to thus generate sufficient self-resonance, it is preferable that a stacked ceramic capacitor having a definite dip in its impedance characteristics is used. Although the effect of the self-resonance in the tantalum electrolytic capacitor or the aluminum electrolytic capacitor is lower than that in the stacked ceramic capacitor, self-resonance can be generated.
In
In the impedance characteristics shown in
When the stacked ceramic capacitor C20 having a large capacitance value (0.68 μF) is individually used, the impedance characteristics in a low band can be improved, as compared with those in a case where the stacked ceramic capacitor C10 having a small capacitance component C1 (330 pH) is individually used. In a band higher than a self-resonance frequency of 0.68 μF, however, the impedance characteristics are degraded due to the effect of the inductance component L2 in the stacked ceramic capacitor C20.
As shown in
The impedance of the capacitance component C2 in the stacked ceramic capacitor C20 shown in
On the other hand, the value of the capacitance component C1 in the stacked ceramic capacitor C10 is lower than the value of the capacitance component C2 in the stacked ceramic capacitor C20. Therefore, the impedance of the capacitance component C1 is higher than the impedance of the capacitance component C2. Further, the impedance of the inductance component L2 in the stacked ceramic capacitor C20 increases when the frequency increases. On the other hand, the impedance of the inductance component L1 in the stacked ceramic capacitor C10 is lower than the impedance of the capacitance component C1 therein.
At a high frequency, therefore, an equivalent circuit of the parallel circuit of the two stacked ceramic capacitors C10 and C20 is an LC parallel resonance circuit shown in
In this case, the impedance of the LC parallel resonance circuit increases in a resonance portion, so that anti-resonance occurs, as shown in
In the impedance control circuits 41 and 42 shown in
Thus, the switching noises each having a plurality of frequency components generated from the transistors Q1 and Q2 are respectively restrained by the functions of the impedance control circuits 41 and 42. As a result, the undesired radiation of the electromagnetic wave over a wide band is sufficiently restrained.
The impedance control circuits 41 and 42 shown in
Similarly, resistive elements R21 to R2n−1 are respectively connected in series with capacitors C21 to C2n−1 in the impedance control circuit 42. The respective capacitance values of the capacitors C21 to C2n decrease in this order, and the capacitor C2n has the smallest capacitance value. No resistive element is connected to the capacitor C2n having the smallest capacitance value in the impedance control circuit 42. The respective resistance values of the resistive elements R21 to R2n−1 decrease in this order, and the resistive element R2n−1 has the smallest resistance value.
The respective configurations of the impedance control circuits 41 and 42 shown in
As described using
In
In
The resistive element R5 is thus inserted in series with the stacked ceramic capacitor C20 so that the impedance characteristics are improved over a wide band.
In the impedance control circuits 41 and 42 shown in
The impedance control circuits 41 and 42 shown in
Similarly, beads cores L21 to L2n−1 are respectively connected in series with capacitors C21 to C2n in the impedance control circuit 42. The respective capacitance values of the capacitors C11 to C1n decrease in this order, and the capacitor C1n has the smallest capacitance value. No bead score is connected to the capacitor C2n having the smallest capacitance value in the impedance control circuit 42.
The respective configurations of the impedance control circuits 41 and 42 shown in
In the example shown in
In
As shown in
In the impedance control circuit 41 shown in
In the impedance control circuits 41 and 42 shown in
In the sustain driver 4 according to the present embodiment, a bypass region for a plurality of frequency components is formed between the node N1 and the power supply terminal V1 and between the node N1 and the ground terminal by the impedance control circuits 41 and 42. Thus, the switching noises over a wide band respectively generated by the transistors Q1 and Q2 are absorbed in the power supply terminal V1 and the ground terminal through the impedance control circuits 41 and 42, so that the effect of the switching noises on the panel capacitance Cp is reduced. This allows the radiation of the high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
The sustain driver 4a shown in
As shown in
The transistor Q3 has a drain-source capacitance CP3 as a parasitic capacitance, and an impedance control circuit 43 is connected in parallel with the transistor Q3 between the drain and the source of the transistor Q3. The transistor Q4 has a drain-source capacitance CP4 as a parasitic capacitance, and an impedance control circuit 44 is connected in parallel with the transistor Q4 between the drain and the source of the transistor Q4.
The diode D1 has an anode-cathode capacitance CP5 as a parasitic capacitance. The diode D2 has an anode-cathode capacitance CP6 as a parasitic capacitance.
The configuration and the function of the impedance control circuit 43 are the same as the configuration and the function of the impedance control circuit 41 shown in
In the present embodiment, it is preferable that respective nodes between capacitors C11 to C1n in the impedance control circuit 43 and a transistor Q3 are closer to the source and the drain of the transistor Q3. For example, it is preferable that the capacitors C11 to C1n and the transistor Q3 are connected to each other on the same circuit board. This allows the effect, descried later, to be more reliably obtained.
Furthermore, it is preferable that respective nodes between capacitors C21 to C2n in the impedance control circuit 44 and a transistor Q4 are closer to the source and the drain of the transistor Q4. For example, it is preferable that the capacitors C21 to C2n and the transistor Q4 are connected to each other on the same circuit board. This allows the effect, descried later, to be more reliably obtained.
The operation in a sustain time period of the sustain driver 4a configured as described above will be then described while referring to
Since the basic operation of the sustain driver 4a shown in
First, when the transistor Q4 is in an OFF state and a rapid voltage change occurs between the drain and the source of the transistor Q4, high-frequency LC resonance is caused by the drain-source capacitance CP4 of the transistor Q4 and an inductance component of the interconnection Li4. Thus, a switching noise having a plurality of frequency components is generated. Specifically, at the time t1 and the time t2 shown in
At the time t1, a control signal S3 enters a high level to turn the transistor Q3 on. Thus, the switching noise having a plurality of frequency components is generated from the transistor Q3 the instant a potential at a node N2 rises from 0 V to a potential of approximately Vsus/2 at the node N3. The switching noise includes a frequency component of LC resonance caused by the drain-source capacitance CP3 of the transistor Q3 and an inductance component of the interconnection Li3 and the other plurality of frequency components.
At the time t2, a potential at a node N1 starts to fall from a peak voltage due to LC resonance caused by a recovery coil L and a panel capacitance Cp, so that the direction of a current flowing through the recovery coil L is reversed from a direction toward the node N1 to a direction toward the node N2. Thus, the diode D1 is rendered non-conductive, so that a current path is interrupted. As a result, the potential at the node N2 rapidly rises toward the potential at the node N1. At this time, high-frequency LC resonance is caused by a stray capacitance connected to the node N2 (e.g., the anode-cathode capacitance CP5 of the diode D1) and the recovery coil L, so that the potential at the node N2 rises while ringing. In this case, the switching noise having a plurality of frequency components is generated from the transistor Q4. The switching noise includes a frequency component of the LC resonance caused by the drain-source capacitance CP4 of the transistor Q4 and the inductance component of the interconnection Li4 and the other plurality of frequency components.
In the present embodiment, since the impedance control circuit 44 is connected in parallel with the transistor Q4, however, the switching noise over a wide band is absorbed in a ground terminal through the impedance control circuit 44 and a recovery capacitor Cr. Thus, the undesired radiation of an electromagnetic wave over a wide band is sufficiently restrained.
Then, when the transistor Q3 is in an OFF state and a rapid voltage change occurs between the drain and the source of the transistor Q3, the high-frequency LC resonance is caused by the drain-source capacitance CP3 of the transistor Q3 and the inductance component of the interconnection Li3. Thus, a switching noise having a plurality of frequency components is generated from the transistor Q3. Specifically, at the time t3 and the time t4 shown in
When a power recovery time period at the rise time of a sustain pulse Psu is terminated, a control signal S1 enters a high level to turn the transistor Q1 on. Thus, a power supply voltage Vsus of a power supply terminal V1 is applied to the node N2. From this state, at the time t3, a control signal S4 enters a high level to turn the transistor Q4 on. Thus, the switching noise having a plurality of frequency components is generated from the transistor Q4 the instant a potential at the node N2 falls from the power supply voltage Vsus to a potential of approximately Vsus/2 at the node N3.
When a power recovery time period at the rise time of the sustain pulse Psu is terminated at the time t4, the direction of a current flowing through the recovery coil L is reversed from a direction toward the node N2 to a direction toward the node N1. Thus, the diode D2 is rendered non-conductive, so that a current path is interrupted. As a result, the potential at the node N2 rapidly falls toward the potential at the node N1. At this time, high-frequency LC resonance is caused by a stray capacitance connected to the node N2 (e.g., the anode-cathode capacitance CP6 of the diode D2) and the recovery coil L, so that the potential at the node N2 falls while ring ing. In this case, the switching noise having a plurality of frequency components is generated from the transistor Q3.
In the present embodiment, since the impedance control circuit 43 is connected in parallel with the transistor Q3, however, the switching noise over a wide band is absorbed in the ground terminal through the impedance control circuit 43 and the recovery capacitor Cr. Thus, the undesired radiation of the electromagnetic wave over a wide band is sufficiently restrained.
In the sustain driver 4a according to the present embodiment, a bypass region for a plurality of frequency components is formed between the node N1 and the node N3 by the impedance control circuits 43 and 44. Thus, the switching noises over a wide band respectively generated by the transistors Q3 and Q4 are absorbed in the ground terminal through the impedance control circuits 43 and 44 and the recovery capacitor Cr, so that the effect of the switching noises on the panel capacitance Cp is reduced. This allows the radiation of the high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
The sustain driver 4b shown in
As shown in
The cathode of the diode D1 and the anode of the diode D2 are respectively connected to a node N2 through interconnections Li5 and Li6. The diode D1 has an anode-cathode capacitance CP5 as a parasitic capacitance, and the diode D2 has an anode-cathode capacitance CP6 as a parasitic capacitance. Note that transistors Q3 and Q4 respectively have parasitic capacitances CP3 and CP4, as in the second embodiment.
The configuration and the function of the impedance control circuit 45 are the same as the configuration and the function of the impedance control circuit 41 shown in
In the present embodiment, it is preferable that respective nodes between capacitors C11 to C1n in the impedance control circuit 45 and the diode D1 are closer to the anode and the cathode of the diode D1. For example, it is preferable that the capacitors C11 to C1n and the diode D1 are connected to each other on the same circuit board. This allows the effect, descried later, to be more reliably obtained.
Furthermore, it is preferable that respective nodes between capacitors C21 to C2n in the impedance control circuit 46 and the diode D2 are closer to the anode and the cathode of the diode D2. For example, it is preferable that the capacitors C21 to C2n and the diode D2 are connected to each other on the same circuit board. This allows the effect, descried later, to be more reliably obtained.
The operation in a sustain time period of the sustain driver 4b configured as described above will be then described while referring to
Since the basic operation of the sustain driver 4b shown in
First, when the diode D1 is in an OFF state and a rapid voltage change occurs between the anode and the cathode of the diode D1, a switching noise having a plurality of frequency components is generated from the diode D1. Specifically, at the time t2 shown in
At the time t1, a control signal S3 enters a high level to turn the transistor Q3 on. Thus, a potential at the node N2 is equal to a potential of approximately Vsus/2 at a node N3. In this state, at the time t2, a potential at a node N1 starts to fall from a peak voltage due to LC resonance caused by a recovery coil L and a panel capacitance Cp, so that the direction of a current flowing through the recovery coil L is reversed from a direction toward the node N1 to a direction toward the node N2. Thus, the diode D1 is rendered non-conductive, so that a current path is interrupted. As a result, the potential at the node N2 rapidly rises toward the potential at the node N1. At this time, the switching noise having a plurality of frequency components is generated from the diode D1. The switching noise includes a frequency component of LC resonance caused by the anode-cathode capacitance CP5 of the diode D1 and an inductance component of an interconnection Li5 and the other plurality of frequency components.
In the present embodiment, since the impedance control circuit 45 is connected in parallel with the diode D1, however, the switching noise having a plurality of frequency components generated from the diode D1 flows to the transistor Q3 through the impedance control circuit 45. At this time, the transistor Q3 is turned on. Consequently, the switching noise having a plurality of frequency components generated from the diode D1 is absorbed in a ground terminal through the impedance control circuit 45, the transistor Q3, and a recovery capacitor Cr. As a result, the undesired radiation of an electromagnetic wave over a wide band is sufficiently restrained. At this time, the recovery coil L exists. Therefore, the switching noise does not flow to the panel capacitance Cp and transistors Q1 and Q2.
Then, when the diode D2 is in an OFF state and a rapid voltage change occurs between the anode and the cathode of the diode D2, a switching noise having a plurality of frequency components is generated from the diode D2. Specifically, at the time t4 shown in
When a power recovery time period at the fall time of a sustain pulse Psu is terminated at the time t4, the direction of a current flowing through the recovery coil L is reversed from a direction toward the node N2 to a direction toward the node N1. Thus, the diode D2 is rendered non-conductive, so that a current path is interrupted. As a result, the potential at the node N2 rapidly falls toward the potential at the node N1. At this time, the switching noise having a plurality of frequency components is generated from the diode D2. The switching noise includes a frequency component of LC resonance caused by the anode-cathode capacitance CP6 of the diode D2 and an inductance component of an interconnection Li6 and the other plurality of frequency components.
In the present embodiment, since the impedance control circuit 46 is connected in parallel with the diode D2, however, the switching noise having a plurality of frequency components generated from the diode D2 flows to the transistor Q4 through the impedance control circuit 46. At this time, the transistor Q4 is turned on. Consequently, the switching noise having a plurality of frequency components generated from the diode D2 is absorbed in the ground terminal through the impedance control circuit 46, the transistor Q4, and the recovery capacitor Cr. As a result, the undesired radiation of the electromagnetic wave over a wide band is sufficiently restrained. At this time, the recovery coil L exists. Therefore, the switching noise does not flow to the panel capacitance Cp and the transistors Q1 and Q2.
In the sustain driver 4b according to the present embodiment, a bypass region for a plurality of frequency components is formed between the node N2 and the transistor Q3 and between the node N2 and the transistor Q4 by the impedance control circuits 45 and 46. Thus, the switching noises over a wide band respectively generated from the diodes D1 and D2 are absorbed in the ground terminal through the impedance control circuits 45 and 46 and the recovery capacitor Cr, so that the effect of the switching noises on the panel capacitance Cp is reduced. This allows the radiation of the high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
Impedance control circuits 43 and 44 shown in
In this case, switching noises over a wide band respectively generated by transistors Q1 and Q2 are absorbed in a power supply terminal V1 and a ground terminal through the impedance control circuits 41 and 42, and switching noises over a wide band respectively generated by the transistors Q3 and Q4 are absorbed in the ground terminal through the impedance control circuits 43 and 44 and a recovery capacitor Cr, so that the effect of the switching noises on a panel capacitance Cp is reduced. This allows the radiation of a high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
Impedance control circuits 45 and 46 shown in
In this case, switching noises over a wide band respectively generated by transistors Q1 and Q2 are absorbed in a power supply terminal V1 and a ground terminal through the impedance control circuits 41 and 42, and switching noises over a wide band respectively generated by the diodes D1 and D2 are absorbed in the ground terminal through the impedance control circuits 45 and 46 and a recovery capacitor Cr, so that the effect of the switching noises on a panel capacitance Cp is reduced. This allows the radiation of a high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
Impedance control circuits 43 and 44 shown in
In this case, switching noises over a wide band respectively generated by transistors Q1 and Q2 are absorbed in a power supply terminal V1 and a ground terminal through the impedance control circuits 41 and 42, and switching noises over a wide band respectively generated by the transistors Q3 and Q4 and the diodes D1 and D2 are absorbed in the ground terminal through the impedance control circuits 43, 44, 45, and 46 and a recovery capacitor Cr, so that the effect of the switching noises on a panel capacitance Cp is reduced. This allows the radiation of a high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
Impedance control circuits 45 and 46 shown in
In this case, switching noises over a wide band respectively generated by transistors Q3 and Q4 and diodes D1 and D2 are absorbed in a ground terminal through the impedance control circuits 43, 44, 45, and 46 and a recovery capacitor Cr, so that the effect of the switching noises on a panel capacitance Cp is reduced. This allows the radiation of a high-frequency electromagnetic wave over a wide band to be sufficiently restrained.
The drive circuit according to the present invention is not limited to the sustain driver. For example, the present invention is also applicable to a data driver serving as a drive circuit for driving an address electrode. Alternatively, it is also applicable to a scan driver 3 serving as a drive circuit for driving a scan electrode. The drive circuit according to the present invention is suitably used for drive circuits for a sustain electrode and a scan electrode.
The drive circuit according to the present invention is also applicable to drive circuits for PDPs of any types such as an AC type and a DC type.
The drive circuit according to the present invention is not limited to the PDP. The present invention is also similarly applicable to other devices for driving a capacitive load. The drive circuit according to the present invention is also applicable to other display devices such as a liquid crystal display and an electroluminescence display, for example.
The transistors Q1, Q2, Q3, and Q4 may be replaced with other switching elements such as a bipolar transistor.
The diodes D1 and D2 may be replaced with other uni-directional conductive elements such as a transistor.
As the capacitors C11 to C1n and the capacitors C21 to C2n, the stacked ceramic capacitor may be replaced with a capacitive element composed of other materials such as tantalum oxide or niobium oxide.
As described in the foregoing, as the capacitors C11 to C1n and the capacitors C21 to C2n, the stacked ceramic capacitor may be replaced with a tantalum electrolytic capacitor or an aluminum electrolytic capacitor.
In the following two paragraphs, non-limiting examples of correspondences between various elements recited in the claims below and those described above with respect to various preferred embodiments of the present invention are explained.
In the preferred embodiments described above, the discharge cell DC corresponds to a display element, the panel capacitance Cp corresponds to a capacitive load, the interconnection Li0 corresponds to a pulse supply path, and the PDP1 corresponds to a display panel.
The transistor Q1 corresponds to a first switching element, the transistor Q2 corresponds to a second switching element, the transistor Q3 corresponds to a third switching element, the transistor Q4 corresponds to a fourth switching element, the recovery coil L corresponds to an inductance element, the recovery capacitor Cr corresponds to a recovering capacitive element, the diode D1 corresponds to a unidirectional conductive element, and the diode D2 corresponds to a unidirectional conductive element.
The interconnection Li1 corresponds to a first interconnection, the interconnection Li2 corresponds to a second interconnection, the power supply terminal V1 corresponds to a first voltage source, the ground terminal corresponds to a second voltage source, the power supply voltage Vsus corresponds to a first voltage, and the ground potential corresponds to a second voltage.
Furthermore, the impedance control circuit 41 corresponds to a first impedance control circuit, the impedance control circuit 42 corresponds to a second impedance control circuit, the capacitors C11 to C1n correspond to a plurality of first capacitive elements or first to n-th first capacitive elements, the capacitors C21 to C2n correspond to a plurality of second capacitive elements or first to n-th second capacitive elements.
The resistive elements R11 to R1n−1 correspond to a plurality of first resistive elements or first to (n−1)-th first resistive elements, the resistive elements R21 to R2n−1 correspond to a plurality of second resistive elements or first to (n−1)-th second resistive elements, the beads cores L11 to L1n−1 correspond to a plurality of first beads cores or first to (n−1)-th first beads cores, and the beads cores L21 to L2n−1 correspond to a plurality of second beads cores or first to (n−1)-th second beads cores.
The impedance control circuit 43 corresponds to a first or third impedance control circuit, and the impedance control circuit 44 corresponds to a second or fourth impedance control circuit.
The impedance control circuit 45 corresponds to a first or third impedance control circuit, and the impedance control circuit 46 corresponds to a second or fourth impedance control circuit.
The present invention is applicable to various drive circuits for driving a capacitive load and various devices such as display devices having a capacitive load.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-123224 | Apr 2005 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2006/308046 | 4/17/2006 | WO | 00 | 10/19/2007 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2006/115095 | 11/2/2006 | WO | A |
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