Patent Application
20140159608
The present application relates to a ballast circuit for a light emitting diode (LED)-based lamp including power factor correction with protective isolation. The present invention also relates to lighting, and more specifically, to driver circuitry for solid state light source(s).
The development of high-brightness LEDs has led to use of such devices in various lighting fixtures. In general, an LED-based lamp operates in a fundamentally different way than an incandescent, or gas discharge lamp, and therefore may not be connectable to existing lighting fixtures designed for those types of lamps. A ballast circuit may be used, however, to allow use of an LED-based lamp as a retro-fit for existing lighting fixtures.
The ballast circuitry for an LED-based lamp generally converts an alternating current (AC) input, such as a 120V/60 Hz line input or input from a dimmer switch, to a stable direct current (DC) voltage used for driving the LED-based lamp. Such circuitry may incorporate a rectifier for receiving the AC input and a DC-DC converter circuit. The DC-DC converter circuit may receive an unregulated DC output from the rectifier and provide a stable, regulated DC output to the LED-based lamp.
A variety of DC-DC converter configurations are well-known in the art. Certain types of known DC-DC converter configurations, such as buck converters, boost converters, buck-boost converters, etc., are generally categorized as switching regulators. These devices include a switch, e.g. a transistor, which is selectively operated to allow energy to be stored in an energy storage device, e.g. an inductor, and then transferred to one or more filter capacitors. The filter capacitor(s) provide a relatively smooth DC output voltage to the load and provide essentially continuous energy to the load between energy storage cycles.
One issue with such switching regulator configurations is that there may be no protective isolation between the unregulated DC voltage and the regulated DC output voltage. In some configurations, the unregulated DC voltage may be 400 Volts or more. The unregulated DC voltage can be dangerous if inadvertently applied to the load.
To provide protective isolation, therefore, a transformer-based switching regulator, such as a known “flyback” converter, may be used. In a transformer-based switching regulator, the primary side of the transformer may be coupled to the unregulated DC voltage. The regulated DC output voltage is provided at the secondary side of the transformer, which is electrically isolated from the primary side of the transformer. The transformer may thus provide protective isolation of the DC output from the unregulated DC voltage.
Another issue with switching regulator configurations is that they involve a pulsed current draw from the AC power source in a manner that results in less than optimum power factor. The power factor of a system is defined as the ratio of the real power flowing to the load to the apparent power, and is a number between 0 and 1 (or expressed as a percentage, e.g. 0.5 pf=50% pf). Real power is the actual power drawn by the load. Apparent power is the product of the current and voltage applied to the load.
For systems with purely resistive loads, the voltage and current waveforms are in phase, changing polarity at the same instant in each cycle. Such systems have a power factor of 1.0, which is referred to as “unity power factor.” Where reactive loads are present, such as with loads including capacitors, inductors, or transformers, energy storage in the load results in a time difference between the current and voltage waveforms. This stored energy returns to the source and is not available to do work at the load. Systems with reactive loads often have less than unity power factor. A circuit with a low power factor will use higher currents to transfer a given quantity of real power than a circuit with a high power factor.
To provide improved power factor, some lamp ballast circuit configurations are provided with a power factor correction circuit. The power factor correction circuit may be used, for example, as a controller for controlling operation of the transistor switch in a DC-DC converter configuration such as a “flyback” converter. In such a configuration, a power factor controller may monitor the rectified AC voltage, the current drawn by the load, and the output voltage to the load, and provide an output control signal to the transistor to switch current to the load having a waveform that substantially matches and is in phase with the rectified AC voltage.
In conventional lamp ballast configurations including a transformer-based switching regulator and power factor controller circuits, such as those described above, complete isolation between the primary and secondary sides of the transformer has been sacrificed to provide a feedback to the power factor controller or, for example, to establish a common ground path for the circuit. This, however, increases the potential risk associated with inadvertent application of the unregulated DC voltage to the load. In addition, when such configurations are used with conventional phase-control dimming circuits, the transient response time associated with the power controller circuit may not be sufficient to establish acceptable dimming of the lamp without perceptible flicker.
Consistent with the present disclosure, therefore, there is provided an LED ballast circuit and system that converts AC input such as a 120V/60 Hz input into a current source for an LED-based light source. The circuit includes complete transformer isolation and may use a single integrated circuit power factor controller to produce a pulsating DC output current that is amplitude modulated by the power factor controller at, for example, 120 Hertz. The resulting input power factor may be set very close to unity. The total harmonic distortion at the input may be very low, and any conducted EMI may be mitigated by the variable frequency switching technique. Additionally, the size of the transformer may be relatively small because of the high frequency operation and the switching topology, and the controller bias network and feedback configuration may eliminate the need for large electrolytic capacitors, or multiple capacitors, for dimming applications. The circuit may thus provide a very high power factor, high efficiency and small size that will work with dimmer switches, such as a reverse phase FET dimmer, without flicker at small conduction angles.
A typical switching regulator configuration found in a solid state light source driver suffers from a variety of issues. One issue is that there may be no protective isolation between the unregulated DC voltage and the regulated DC output voltage. In some configurations, the unregulated DC voltage may be 400 Volts or more. The unregulated DC voltage may be dangerous (i.e., destructive), if inadvertently applied to the load. To provide protective isolation, therefore, a transformer-based switching regulator, such as a known “flyback” converter, may be used. In a transformer-based switching regulator, the primary side of the transformer may be coupled to the unregulated DC voltage. The regulated DC output voltage is provided at the secondary side of the transformer, which is electrically isolated from the primary side of the transformer. The transformer may thus provide protective isolation of the DC output from the unregulated DC voltage.
Another issue with a typical switching regulator configuration is that it involves a pulsed current draw from the AC power source in a manner that results in a less than optimum power factor. The power factor of a system is defined as the ratio of the real power flowing to the load to the apparent power, and is a number between 0 and 1 (or expressed as a percentage, e.g. 0.5 pf=50% pf). Real power is the actual power drawn by the load. Apparent power is the product of the current and voltage applied to the load. For systems with purely resistive loads, the voltage and current waveforms are in phase, changing polarity at the same instant in each cycle. Such systems have a power factor of 1.0, which is referred to as “unity power factor.” Where reactive loads are present, such as with loads including capacitors, inductors, or transformers, energy storage in the load results in a time difference between the current and voltage waveforms. This stored energy returns to the source and is not available to do work at the load. Systems with reactive loads often have less than unity power factor. A circuit with a low power factor will use higher currents to transfer a given quantity of real power than a circuit with a high power factor.
To provide improved power factor, some solid state light source driver circuit configurations are provided with a power factor controller circuit. The power factor controller circuit may be used, for example, as a controller for controlling operation of the transistor switch in a DC-DC converter configuration such as a flyback converter. In such a configuration, a power factor controller may monitor the rectified AC voltage, the current drawn by the load, and the output voltage to the load, and provide an output control signal to the transistor to switch current to the load having a waveform that substantially matches and is in phase with the rectified AC voltage.
Yet another issue with a typical switching regulator configuration is that it may introduce harmonic distortion in the form of ripples on the voltage signal returned to the AC power source. These ripples occur at harmonics of the AC line frequency. When these ripples are fed back into the power line, some of the ripples, especially those at third order harmonics of the AC line frequency, may build up voltage levels on the neutral line of power-company-owned three-phase transformers and may damage power-company-owned equipment. Reducing the total harmonic distortion (THD) is thus becoming increasingly important as solid state light sources are more widely used. Indeed, reducing THD and increasing power factor may be important in complying with the Energy Solutions LED Accelerator Program (LEDA), which sets product qualification requirements for certain solid state light source-based lamps.
Unfortunately, THD can be exacerbated in solid state light source that includes a dimming control circuit. The dimming control circuit may receive line voltage, e.g. from a 120 VAC/60 Hz source, and provide a modified output signal to the rectifier for the purpose of controlling the illumination level of the solid state light source. In some configurations, the dimming control circuit may be a circuit known as a “phase control” dimmer or a “phase-cut” dimmer. In a phase control dimmer, a fraction of the input voltage sine-wave is cut in each period of the waveform either at the leading or trailing edge of the waveform. During the cut-time interval or “dead time” when the voltage is cut, the output of the phase control dimmer may be substantially zero. The residual time interval where the voltage differs from zero is known as the “dimmer conduction time.” Both the dimmer conduction time and the dead time are variable, but the time period of the input voltage waveform is constant, e.g. 1/60 second in the United States. As used herein, the “dimmer setting” refers to the ratio of the dimmer conduction time to the time period of the input waveform. The dimmer setting of a phase control dimmer is controllable by a user. In some configurations, the dimmer setting may be varied from about 0.78 to about 0.25. During the dead time at the lowest dimmer setting of the dimmer, the supply voltage to the power factor controller circuit may diminish to a level below its nominal operating range. This may impact performance of the power factor controller circuit, and can lead to an increase in THD as well as reduced power factor.
Embodiments of the present invention therefore provide a solid state light source driver circuit and methods that convert AC input, such as a 120V/60 Hz input, into a current source for an solid state light source. The driver circuit includes overvoltage protection with optically isolated feedback from the output stage to the power factor controller. The driver circuit may use a single integrated circuit power factor controller to produce a pulsating DC output current that is amplitude modulated by the power factor controller at, for example, 120 hertz. The resulting input power factor may be set very close to unity. The total harmonic distortion at the input may be very low, and any conducted EMI may be mitigated by the variable frequency switching technique as well as the EMI filter components. The supply voltage circuit may eliminate the need for large electrolytic capacitors, or Zener diodes, for dimming applications. The circuit may thus provide a very high power factor, high efficiency, and small size that will work with dimmer switches, including both forward phase and reverse phase dimmers, without flicker in the solid state light source.
In an embodiment there is provided a ballast circuit to drive a light emitting diode (LED)-based light source. The ballast circuit includes a rectifier circuit configured to receive an AC input voltage and provide an unregulated DC voltage, and a transformer. The transformer has a primary winding coupled to the rectifier circuit, at least one secondary winding configured to be coupled to the LED-based light source, and a feedback winding, the secondary winding being electrically isolated from the primary winding and the feedback winding with no electrical path between the primary winding and the secondary winding or the feedback winding and the secondary winding. The ballast circuit also includes a switch, the switch being configured to close to couple a portion of the unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the LED-based light source. The ballast circuit also includes a power factor correction circuit configured to control the switch in response to a first signal representative of current through the primary winding, a second signal representative of current through the feedback winding, and a third signal representative of the unregulated DC voltage, with no feedback signal coupled from the secondary winding to the controller.
In a related embodiment, the ballast circuit may further include a switched bias circuit, the switched bias circuit including a bias circuit switch configured to close when the switch is open to provide a supply voltage to the power factor correction circuit. In a further related embodiment, the switched bias circuit may be coupled to the feedback winding, and the bias circuit switch may be configured to close in response to current through the feedback winding.
In another related embodiment, the ballast circuit may further include an over-voltage protection circuit coupled to the power factor correction circuit to disable the power factor controller circuit when a voltage at the transformer exceeds a predetermined level. In a further related embodiment, the over-voltage protection circuit may include a Zener diode coupled to the feedback winding, whereby a breakdown voltage of the Zener diode is exceeded when the voltage at the transformer exceeds the predetermined level thereby disabling the power factor controller circuit. In another further related embodiment, the over-voltage protection circuit may include an over-voltage protection switch configured to close when the voltage at the transformer exceeds the predetermined level thereby disabling the power factor controller circuit.
In still another related embodiment, the power factor correction circuit may include an integrated circuit power factor controller configured to receive the first signal, the second signal, and the third signal and to provide an output to control the switch. In yet another related embodiment, the AC input signal may be a 120V AC signal.
In another embodiment, there is provided an LED-based lamp assembly. The LED-based lamp assembly includes a lamp housing, a light source disposed within the lamp housing, and a ballast disposed within the lamp housing. The ballast includes: a rectifier circuit configured to receive an AC input voltage and provide an unregulated DC voltage; a transformer having a primary winding coupled to the rectifier circuit, at least one secondary winding coupled to the LED-based light source, and a feedback winding, the secondary winding being electrically isolated from the primary winding and the feedback winding with no electrical path between the primary winding and the secondary winding or the feedback winding and the secondary winding; a switch, the switch being configured to close to couple a portion of the unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the LED-based light source; and a power factor correction circuit configured to control the switch in response to a first signal representative of current through the primary winding, a second signal representative of current through the feedback winding and a third signal representative of the unregulated DC voltage, with no feedback signal coupled from the secondary winding to the controller.
In yet another embodiment, there is provided a method of driving an LED-based light source. The method includes: receiving an AC input signal, and converting the AC input signal into a regulated DC output using a ballast circuit. The ballast circuit includes: a transformer having a primary winding, a secondary winding and a feedback winding, the secondary winding being electrically isolated from the primary winding and the feedback winding with no electrical path between the primary winding and the secondary winding or the feedback winding and the secondary winding, and a power factor correction circuit receiving no feedback signal coupled from the secondary winding. The method also includes coupling the regulated DC output to the LED-based light source.
In an embodiment, there is provided a driver circuit for a light emitting diode (LED)-based light source. The driver circuit includes: a rectifier circuit configured to receive an AC input voltage and provide an unregulated DC voltage; a transformer having a primary winding coupled to the rectifier circuit, at least one secondary winding configured to be coupled to the LED-based light source, and a feedback winding; a switch, the switch being configured to close for coupling a portion of the unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the LED-based light source; a power factor controller circuit configured to provide an output signal to control the switch; and a supply voltage circuit coupled to the feedback winding and configured to provide a supply voltage to the power factor controller circuit at the high end of a nominal supply voltage operating range of the power factor controller circuit.
In a related embodiment, the supply voltage circuit may include: a first energy storage circuit coupled to the rectifier circuit to receive the unregulated DC voltage, wherein the first energy storage circuit may include a first energy storage element coupled to the power factor controller circuit to provide the supply voltage; and a second energy storage circuit coupled to the feedback winding, wherein the second energy storage circuit may include a second energy storage element; wherein current from the unregulated DC voltage may charge the first energy storage element and wherein current through the feedback winding may charge the second energy storage element and the first energy storage element.
In a further related embodiment, the first energy storage element may include a first capacitor and the second energy storage element may include a second capacitor. In a further related embodiment, the first capacitor and the second capacitor may be coupled in parallel.
In another related embodiment, the driver circuit may further include: an output; and an open circuit protection circuit coupled to the secondary winding and to the power factor controller circuit, the open circuit protection circuit configured to disable the power factor controller circuit when an open circuit occurs at the output. In a further related embodiment, the open circuit protection circuit may optically couple the secondary winding to the power factor controller circuit. In another further related embodiment, the open circuit protection circuit may include an optically isolated switch coupled to the power factor controller circuit and optically coupled to the secondary winding, the switch being configured to close when the open circuit occurs at the output.
In yet another related embodiment, the secondary winding may be capacitively coupled to the feedback winding, the capacitive coupling to provide electromagnetic interference (EMI) filtering.
In another embodiment, there is provided a lamp assembly. The lamp assembly includes: a lamp housing; an LED-based light source disposed within the lamp housing; and a driver disposed within the lamp housing. The driver includes: a rectifier circuit configured to receive an AC input voltage and provide an unregulated DC voltage; a transformer having a primary winding coupled to the rectifier circuit, at least one secondary winding configured to be coupled to the LED-based light source, and a feedback winding; a switch, the switch being configured to close for coupling a portion of the unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the LED-based light source; a power factor controller circuit configured to provide an output signal to control the switch; and a supply voltage circuit coupled to the feedback winding and configured to provide a supply voltage to the power factor controller circuit at the high end of a nominal supply voltage operating range of the power factor controller circuit.
In a related embodiment, the supply voltage circuit may include: a first energy storage circuit coupled to the rectifier circuit to receive the unregulated DC voltage, wherein the first energy storage circuit may include a first energy storage element coupled to the power factor controller circuit to provide the supply voltage; and a second energy storage circuit coupled to the feedback winding, wherein the second energy storage circuit may include a second energy storage element; wherein current from the unregulated DC voltage may charge the first energy storage element and wherein current through the feedback winding may charge the second energy storage element and the first energy storage element. In a further related embodiment, the first energy storage element may include a first capacitor and the second energy storage element may include a second capacitor. In a further related embodiment, the first capacitor and the second capacitor may be coupled in parallel.
In another related embodiment, the lamp assembly may further include: an output; and an open circuit protection circuit coupled to the secondary winding and to the power factor controller circuit, the open circuit protection circuit configured to disable the power factor controller circuit when an open circuit occurs at the output. In a further related embodiment, the open circuit protection circuit may optically couple the secondary winding to the power factor controller circuit. In another further related embodiment, the open circuit protection circuit may include an optically isolated switch coupled to the power factor controller circuit and optically coupled to the secondary winding, the switch being configured to close when the open circuit occurs at the output.
In yet another related embodiment, the secondary winding may be capacitively coupled to the feedback winding, the capacitive coupling to provide electromagnetic interference (EMI) filtering.
In another embodiment, there is provided a method of driving an LED-based light source. The method includes: receiving an AC input signal; converting the AC input signal into a regulated DC output; controlling a power factor of the regulated DC output using a power factor controller circuit; providing a supply voltage to the power factor controller circuit at the high end of a nominal supply voltage operating range of the power factor controller circuit; and coupling the regulated DC output to the LED-based light source.
In a related embodiment, converting may include: operating a switch to energize a transformer having a primary winding, at least one secondary winding, and a feedback winding, wherein the primary winding is coupled to the rectifier circuit and the at least one secondary winding is configured to be coupled to the LED-based light source; and controlling may include: controlling the switch; and the method may further include: coupling an open circuit protection circuit to the secondary winding and to the power factor controller circuit to disable the power factor controller circuit when the LED-based light source fails in an open state. In a further related embodiment, coupling an open circuit protection circuit may include optically coupling the secondary winding to the power factor controller circuit. In a further related embodiment, the method may further include capacitively coupling the secondary winding to the feedback winding.
In another embodiment, there is provided a driver circuit for a solid state light source. The driver circuit includes: an input stage comprising a rectifier circuit and a filter circuit, wherein the input stage is configured to receive an AC input voltage, to filter the received AC input voltage, and to rectify the received AC input voltage so as to provide a filtered unregulated DC voltage; a transformer having a primary winding coupled to the input stage, at least one secondary winding configured to be coupled to the solid state light source, and a feedback winding, the secondary winding being electrically isolated from the primary winding and the feedback winding with no electrical path between the primary winding and the secondary winding or the feedback winding and the secondary winding; a switch, the switch being configured to close to couple a portion of the filtered unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the solid state light source; and a power factor correction circuit configured to control the switch in response to a first signal representative of current through the primary winding, a second signal representative of current through the feedback winding, and a third signal representative of the filtered unregulated DC voltage, with no feedback signal coupled from the secondary winding to the power factor correction circuit.
In a related embodiment, the filter circuit may include a first filter stage, wherein the first filter stage may include a series combination of a capacitor and a resistor in parallel across an input on which the AC input voltage is received, a first combination of an inductor in parallel with a resistor on a high side of the AC input voltage, and a second combination of an inductor in parallel with a resistor on a low side of the AC input voltage. In a further related embodiment, the filter circuit may be configured to reduce input capacitance at the input stage and to dampen an LC value associated with the input stage. In another further related embodiment, the filter circuit may further include a second filter stage, wherein the second filter stage comprises a first filter capacitor, a second filter capacitor, and an inductor. In a further related embodiment, the first filter stage may be configured to filter the AC input voltage and the second filter stage may be configured to filter the unregulated DC voltage provided by the rectifier circuit from the filtered AC input voltage.
In another related embodiment, the driver circuit may further include a protection circuit coupled between the feedback winding of the transformer and the power factor correction circuit to disable the power factor correction circuit when an open circuit condition exists. In a further related embodiment, the protection circuit may include a Zener diode.
In still another related embodiment, the driver circuit may further include an energy transfer circuit coupled between the primary winding of the transformer and the power factor correction circuit to transfer energy away from the switch to the power factor controller circuit. In a further related embodiment, the energy transfer circuit may include a resistor in parallel with a capacitor.
In another embodiment, there is provided a lamp assembly. The lamp assembly includes: a lamp housing; a solid state light source disposed within the lamp housing; and a driver circuit for the solid state light source, the driver circuit including: an input stage comprising a rectifier circuit and a filter circuit, wherein the input stage is configured to receive an AC input voltage, to filter the received AC input voltage, and to rectify the received AC input voltage so as to provide a filtered unregulated DC voltage; a transformer having a primary winding coupled to the input stage, at least one secondary winding configured to be coupled to the solid state light source, and a feedback winding, the secondary winding being electrically isolated from the primary winding and the feedback winding with no electrical path between the primary winding and the secondary winding or the feedback winding and the secondary winding; a switch, the switch being configured to close to couple a portion of the filtered unregulated DC voltage across the primary winding and the switch being configured to open to transfer energy from the primary winding to the secondary winding to provide a DC output voltage to drive the solid state light source; and a power factor correction circuit configured to control the switch in response to a first signal representative of current through the primary winding, a second signal representative of current through the feedback winding, and a third signal representative of the filtered unregulated DC voltage, with no feedback signal coupled from the secondary winding to the power factor correction circuit.
In a related embodiment, the filter circuit may include a first filter stage, wherein the first filter stage may include a series combination of a capacitor and a resistor in parallel across an input on which the AC input voltage is received, a first combination of an inductor in parallel with a resistor on a high side of the AC input voltage, and a second combination of an inductor in parallel with a resistor on a low side of the AC input voltage. In a further related embodiment, the filter circuit may be configured to reduce input capacitance at the input stage and to dampen an LC value associated with the input stage. In another further related embodiment, the filter circuit may further include a second filter stage, wherein the second filter stage comprises a first filter capacitor, a second filter capacitor, and an inductor. In a further related embodiment, the first filter stage may be configured to filter the AC input voltage and the second filter stage may be configured to filter the unregulated DC voltage provided by the rectifier circuit from the filtered AC input voltage.
In another related embodiment, the driver circuit may further include a protection circuit coupled between the feedback winding of the transformer and the power factor correction circuit to disable the power factor correction circuit when an open circuit condition exists. In a further related embodiment, the protection circuit may include a Zener diode.
In still another related embodiment, the driver circuit may further include an energy transfer circuit coupled between the primary winding of the transformer and the power factor correction circuit to transfer energy away from the switch to the power factor controller circuit. In a further related embodiment, the energy transfer circuit may include a resistor in parallel with a capacitor.
The foregoing and other objects, features and advantages disclosed herein will be apparent from the following description of particular embodiments disclosed herein, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles disclosed herein.
The LED ballast circuit 102 may convert the AC input voltage ACin to a regulated DC output voltage DCout with a high power factor, high efficiency, small size and protective isolation. The LED ballast circuit 102 and the LED-based light source 106 may thus be provided within a single lamp housing 108, such as within the housing of a parabolic aluminized reflector (PAR) lamp, to provide a LED-based lamp assembly 110 consistent with the present disclosure. The LED-based lamp assembly 110 provides a convenient retro-fit for existing lighting fixtures configured to energize PAR lamps including non-LED based light sources, e.g. fluorescent or gas-discharge sources. An LED-based lamp assembly 110 consistent with the present disclosure may be inserted directly into such a lighting fixture to operate on the AC input thereto, and may operate with a known dimmer circuit. A lamp including an LED-based light source 106 may provide long life and low power consumption compared to those including non-LED-based light sources.
In general, the AC input voltage ACin may be coupled to the rectifier circuit 202, either directly or through a dimmer circuit 104. The rectifier circuit 202 may be configured to rectify ACin to provide an unregulated DC output voltage, i.e. a DC output voltage that follows instantaneous variations in the AC input voltage. A variety of rectifier circuit configurations are well-known in the art. In one embodiment, for example, the rectifier circuit 202 may include a known bridge rectifier.
The output of the rectifier 202 may be coupled to the primary winding 206 of the transformer through the switch 212 under the control of the power factor controller circuit 216. The switch 212 may be a known transistor switch, as is commonly used in known switching regulator configurations. In general, when the switch 212 is “closed”, the primary winding 206 of the transformer 204 is coupled to the output of the rectifier 202 and the energy is stored in transformer windings. When the switch is “open”, the energy stored in the secondary winding 208 is coupled to the output stage 214. The output stage 214 may include a capacitor that is charged by the energy from the secondary winding 208 and discharges through the LED-based light source 106 to drive the light source.
The power factor controller circuit 216 may include a known power factor controller (not shown) configured to provide an output to the switch 212 for controlling the switch 212 in response to a signal representative of current through the primary winding 206, a second signal representative of current through the feedback winding 210, and a third signal representative of the unregulated DC voltage, with no feedback signal coupled from the secondary winding 208 to the controller. The output from the power controller may control the switch so that the current to the LED-based light source 106 has a waveform that substantially matches and is in phase with the output of the rectifier 202, thereby providing high power factor.
Known power factor controllers useful in an LED ballast configuration consistent with the present disclosure include known integrated circuit power factor correction controllers, such as model number L6561 and L6562 controllers presently available from ST Microelectronics of Sunnyvale, Calif. The L6561 and L6563 controllers may, for example, be employed as a controller in a “flyback” DC-DC converter implementation. Details of this and related alternative applications of the L6561 controller are discussed in ST Microelectronics Application Note AN1060, “Flyback Converters with the L6561 PFC Controller,” by C. Adragna and G. Garravarik, January 2003, and ST Microelectronics Application Note AN1059, “Design Equations of High-Power-Factor Flyback Converters based on the L6561,” by Claudio Adragna, September 2003, each of which is available at http://www.st.com and incorporated herein by reference. Specifically, Application Notes AN1059 and AN1060 discuss one exemplary configuration for an L6561-based flyback converter (High-PF flyback configuration) that operates in transition mode and exploits the ability of the L6561 controller to perform power factor correction, thereby providing a high power factor single switching stage DC-DC converter. Differences between the L6561 and L6562 controllers are discussed in ST Microelectronics Application Note AN1757, “Switching from the L6561 to the L6562,” by Luca Salati, April 2004, also available at http://www.st.com and incorporated herein by reference. For purposes of the present disclosure, these two controllers may be discussed as having similar functionality.
In a ballast 102 consistent with the present disclosure, the secondary winding 208 of the transformer is not electrically coupled in any way to the primary 206 or feedback winding 210, e.g. there is no common ground electrical path for the windings and there is no feedback path coupled from the secondary winding 208 to the power factor controller circuit 216 or any other element on primary winding side of the ballast. The power factor controller operates using signals coupled thereto from the output of the rectifier 202, and the primary 206 and feedback windings 210, but no feedback signal is coupled, e.g. electrically or optically, from the secondary winding 208 to the controller. This provides complete protective isolation for the high voltages on the primary winding side of the transformer and the secondary side of the transformer. In addition, by not requiring feedback from the secondary winding 208, the overall size and complexity of the ballast is reduced compared to configurations wherein, for example, optically isolated feedback is provided from the secondary winding 208 to the controller.
As is known, the supply voltage for operating a power factor controller may be self-supplied in the ballast configuration to ensure a regulated, stable supply to the circuit during operation. In a ballast configuration consistent with the present disclosure including the optional switched bias circuit 220, the switched bias circuit 220 may establish a supply voltage to the controller with low transient response time and low power dissipation. In the illustrated embodiment, the switched bias circuit 220 is coupled between the feedback winding 210 and the power factor correction circuit 216. In an embodiment including a L6561 or L6562 power controller, for example, the switched bias circuit may be coupled to the Vcc input of the power factor controller and may include a transistor switch that turns on when the switch 212 is opened to use energy transferred from the feedback winding 210 for providing a voltage supply to the power factor controller. Such a configuration provides rapid transient response that may be particularly useful when the system is implemented with a dimmer circuit 104, such as a phased controlled dimmer circuit.
The optional over-voltage protection circuit 218 may be provided to shut down or prohibit operation of the power factor controller circuit 216 upon the occurrence of an over-voltage condition. For example, if the LED-based load 106 ceases conducting current from the secondary winding 208, e.g. if the load is not connected or malfunctions, a dangerous over-voltage condition on the terminals of the transformer 204 may arise. In the illustrated embodiment, the over-voltage protection circuit 218 is coupled between the feedback winding 210 and the power factor correction circuit 216. In an embodiment including a L6561 or L6562 power controller for example, the over-voltage protection circuit 218 may be coupled to the INV or ZCD input of the power factor controller for shutting the controller down if an over-voltage condition exists.
The optional switched bias circuit 220 and over-voltage protection circuit 218 are described herein as being useful in connection with a ballast wherein the secondary winding is completely isolated from the primary and feedback windings and no feedback is coupled from the secondary winding to the power factor controller. Those of ordinary skill in the art will recognize, however, that these circuits 218, 220 may be provided in a wide variety of ballast configurations. For example, these circuits may be included in a ballast configuration including different transformer or feedback configuration.
In operation, the AC input to the circuit ACin is coupled to the rectifier circuit 202a, which includes a known bridge rectifier. The rectifier full-wave rectifies the AC input to provide a rectified unregulated DC voltage DCin. The output of the rectifier DCin is connected to L1 and C1, which filter noise generated in the circuit.
The primary winding 206a of the transformer 204a is coupled between the output of the rectifier circuit 202a and the drain of Q1 so that when Q1 is conducting, i.e. the switch is closed, current flows from the output of the rectifier circuit 202a through the primary winding 206a to energize the primary winding 206a, but when Q1 is not conducting, i.e. the switch is open, essentially no current flows through the primary winding 206a. In general, when the switch Q1 is closed, the windings of the transformer 204a are energized, and when the switch Q1 opens, the polarity of the voltage across the secondary winding 208a and the feedback winding 210a reverses to forward bias diodes D3 and D5. When diode D3 is forward biased, energy from the secondary winding 208a charges capacitor C4, which is configured to discharge through the load when the switch Q1 is open.
In general, the power factor controller U1 uses a voltage representative of the output of the rectifier circuit 202a (i.e., DCin) as a reference to control the level at which the controller U1 switches the switch Q1 on and off using a gate drive GD output coupled to the gate of Q1 through R1. This feature allows for a very high power factor ballast. The switching frequency is determined by feedback from the primary winding 206a and the feedback winding 210a.
In particular, a portion of DCin is coupled to the multiplier input MULT of the controller U1 to provide a signal to the controller U1 representative of the unregulated DC voltage DCin. The MULT input is coupled between R2 and the parallel combination of R3 and C5. Selection of R3 and C5 allows for a tradeoff between ripple and power factor correction in the output voltage DCout established by the controller U1. The source of Q1 is coupled to the current sense C5 input of the controller U1 and to ground through R6. The current through R6 thus provides a signal to the controller U1 representative of the current through the primary winding 206a. The feedback winding 210a of the transformer 204a is coupled through R8 to the zero current detection input ZCD of the controller U1 to provide a signal to the controller U1 representative of the current through the feedback winding 210a. In response to the MULT, ZCD and CS inputs, the controller U1 provides a variable frequency gate drive GD output to Q1 for driving the load with a high power factor.
Bias voltage is supplied to the power controller supply voltage input Vcc through R10, which is coupled to Vcc through the switched bias circuit 220a. When there is no starting pulse at the gate of Q1, no current is provided from the rectifier output to energize the transformer windings 206a, 208a, 210a. Once the voltage on Vcc reaches its minimum value, the gate drive output GD of the controller U1 provides a starting pulse to the gate of Q1 through R1 to close the switch Q1 so that at least a portion of the rectifier output is provided across the primary winding 206a to energize the transformer windings 206a, 208a, 210a.
The drain current in Q1 begins to ramp up at a rate determined by the primary inductances of the transformer 204a. This current produces a voltage across R6, which is representative of the current through the primary winding 206a. This current is fed into the current sense CS input of the controller U1. The controller U1 compares this voltage to the voltage on the multiplier input MULT and the voltage on inverting input INV, which is set by R2, R3, and the parallel combination of R4 and C3 coupled in series with R5. When the voltage conditions are met according to the switching characteristics set by the controller U1, the drive to Q1 is removed. This causes the voltage across the primary winding 206a and the secondary winding 208a of the transformer 204a to reverse. The energy stored in the transformer 204a is then transferred to the output via D3. During this same time interval, the transformer 204a provides a voltage on the feedback winding 210a that forward biases D5 to provide current to the switched bias circuit 220a.
In the illustrated embodiment, the switched bias circuit 220a includes bias circuit switch Q2, R7, R9, and Zener diode D6. R9 and D6 are coupled to the gate of Q2, R7 is coupled to the source of Q2, and the drain of Q2 is coupled to R10, C6, and the Vcc input of the controller U1. D5 is coupled to R9 and R7. When D5 is forward biased, a current is established through R9 that turns Q2 on once the gate signal reaches the threshold voltage of Q2. Q2 charges C6, which provides supply voltage to the Vcc input. Q2 switches on quickly to provide supply voltage to Vcc with low power dissipation. After all the energy is removed from the transformer, the voltage on the feedback winding drops to zero. This negative transition on the zero current detection input ZCD of the controller U1 instructs it to start a new cycle. After several cycles, the bias voltage on Vcc reaches its normal operating level determined by the Zener diode D6.
The over-voltage protection circuit 218a in the illustrated embodiment includes Zener diode D7. When D5 is forward biased by the feedback winding 210a, if the voltage across the feedback winding 210a exceeds a predetermined acceptable level, the breakdown voltage of D7 is exceeded and voltages are established at the inverting input INV and COMP input by R5, R4, and C3 that will shut down the controller U1 to open Q1. The over-voltage protection circuit 218a thus disables the current supply to the transformer 204a to provide protection against dangerous voltages occurring in the circuit due, for example, to disconnection or malfunction of the load.
The over-voltage protection circuit 218b in
A ballast circuit consistent with the present disclosure may be configured for operation with a variety of input voltages based on appropriate selection of various circuit components thereof. Table 1 below identifies one example of circuit components useful in configuring the embodiment illustrated in
In the exemplary embodiment illustrated in
Embodiments described herein also provide circuits and methods for implementing a solid state light source driver. The driver may be used in combination with one or more solid state light sources in any type of configuration, such as but not limited to a lamp, lamp assembly, fixture, system, and the like. The solid state light source may be, but is not limited to, one or more light emitting diodes (LEDs), organic light emitting diodes (OLEDs), polymer light emitting diodes (PLEDs), and the like. Though embodiments may be, and in some cases are, described herein with reference to LEDs, any type of solid state light source and/or sources may be used without departing from the scope of the invention. The driver includes a power factor controller circuit and a supply voltage circuit configured to provide a supply voltage to the power factor controller circuit, such that the supply voltage is maintained within the high end of a nominal supply voltage operating range of the power factor controller circuit. Providing a supply voltage at the high end of a nominal supply voltage operating range of the power factor controller circuit allows for the use of small, non-electrolytic, capacitors in the supply voltage circuit, while still providing sufficient energy storage to allow for operation of the power factor controller circuit in conjunction with a dimmer circuit. This may result in a reduced cost and size of the driver, while still maintaining a low THD and high power factor.
Embodiments of a solid state light source driver as described herein may also, or alternatively, include an open circuit protection circuit for disabling the power factor controller circuit when an open circuit occurs in the load. The open circuit protection circuit provides protection against dangerous and potentially damaging voltages at the circuit output. Protection against electromagnetic interference (EMI) may also be provided in a driver according to embodiments described herein.
Turning now to
The LED driver circuit 102a may convert the AC input voltage ACin to a regulated DC output voltage DCout with a high power factor, low THD, high efficiency, small size, and protective isolation. The LED driver circuit 102a and the LED-based light source 106a may thus be provided within an LED-based lamp assembly 110a according to embodiments described herein. The LED-based lamp assembly 110a may provide a convenient retro-fit for existing lighting fixtures configured to energize lamps including non-LED based light sources, e.g. fluorescent or gas-discharge sources. An LED-based lamp assembly 110a according to embodiments described herein may be inserted directly into such a lighting fixture to operate on the AC input thereto, and may operate with a known dimmer circuit including forward phase control and reverse phase control dimmer circuits. A lamp including an LED-based light source 106a may provide long life and low power consumption compared to those including non-LED-based light sources.
In general, the AC input voltage ACin may be coupled to the EMI filter circuit 222c or the rectifier circuit 202c, either directly or, for example, through a dimmer circuit such as the dimmer circuit 104a shown in
The rectifier circuit 202c may be configured to rectify ACin to provide an unregulated DC output voltage, i.e. a DC output voltage that follows instantaneous variations in the AC input voltage. A variety of rectifier circuit configurations are well-known in the art. In some embodiments, for example, the rectifier circuit 202c may include a known bridge rectifier. The output of the rectifier circuit 202c may be coupled to the primary winding 206c of the transformer 204c through the switch 212c under the control of the power factor controller circuit 216c. The switch 212c may be a known transistor switch, as is commonly used in known switching regulator configurations. In general, when the switch 212c is “closed,” the primary winding 206c of the transformer 204c is coupled to the output of the rectifier circuit 202c and the energy is stored in the windings of the transformer 204c. When the switch is “open,” the energy stored in the secondary winding 208c is coupled to the output stage 214c. The output stage 214c may include a capacitor that is charged by the energy from the secondary winding 208c and discharges through the LED-based light source 106a to drive the light source.
The power factor controller circuit 216c may include a known power factor controller configured to provide an output to the switch for controlling the switch in response to a first signal representative of current through the feedback winding 210c and a second signal representative of current through the primary winding 206c. The power factor controller circuit 216c may also respond to a signal provided by the optional open circuit protection circuit that is representative of voltage across the secondary winding 208c. The output from the power factor controller may control the switch so that the current to the LED-based light source 106a has a waveform that substantially matches and is in phase with the output of the rectifier circuit 202c, thereby providing high power factor. Known power factor controllers useful in an LED driver configuration, such as any embodiment described herein, include known integrated circuit power factor correction controllers, such as model number L6561 and L6562 controllers presently available from ST Microelectronics of Sunnyvale, Calif. The L6561 and L6562 controllers may, for example, be employed as a controller in a flyback DC-DC converter implementation. Details of this and related alternative applications of the L6561 controller are discussed in ST Microelectronics Application Note AN1060, “Flyback Converters with the L6561 PFC Controller,” by C. Adragna and G. Garravarik, January 2003, and ST Microelectronics Application Note AN1059, “Design Equations of High-Power-Factor Flyback Converters based on the L6561,” by Claudio Adragna, September 2003, each of which is available at http://www.st.com and is incorporated herein by reference. Differences between the L6561 and L6562 controllers are discussed in ST Microelectronics Application Note AN1757, “Switching from the L6561 to the L6562,” by Luca Salati, April 2004, also available at http://www.st.com and incorporated herein by reference. For purposes of the present disclosure, these two controllers may be discussed as having similar functionality.
In the embodiment shown in
In some embodiments, the supply voltage circuit 220c may establish a DC supply voltage Vsupply to the power factor controller circuit 216c. In the illustrated embodiment, the supply voltage circuit 220c is coupled between the unregulated DC voltage, the feedback winding 210c, and the power factor controller circuit 216c. The supply voltage circuit 220c may be coupled to the power supply input (e.g. the Vcc in the L6561 or L6561) of the power factor controller circuit 216c and may provide the DC supply voltage Vsupply to the power factor controller circuit 216c at the high end of a nominal supply voltage operating range of the power factor controller circuit 216c. In particular, a power factor controller circuit 216c has power supply input operational range between a nominal low operating voltage Vlow and a nominal high operating voltage Vhigh. The nominal low operating voltage Vlow is the voltage below which the power factor controller circuit 216c stops providing pulsed output to the switch 212c and the nominal high operating voltage Vhigh is a voltage above which damage to the power factor controller circuit 216c may occur. As used herein, use of the term “nominal” or “nominally” when referring to an amount means a designated or theoretical amount that may vary from the actual amount. The values of the nominal low operating voltage Vlow and the nominal high Vhigh operating voltage may be determined empirically, or, in the case of an integrated circuit power factor controller circuit 216c, through use of manufacturer specifications. For an integrated circuit power factor controller, such as the L6561 or L6562 power factor controller, for example, the manufacturer sets the nominal high operating voltage Vhigh. The nominal low operating voltage Vlow for an integrated circuit power factor controller circuit 216c is also typically specified by the manufacture as the nominal voltage at which the power factor controller circuit 216c will turn off or stop providing an output after it has been operational. In the specific example of a L6562 power factor controller circuit 216c, in the manufacturer data sheet the manufacturer identifies the nominal high operating voltage Vhigh as 22 VDC and the nominal low operating voltage Vlow (at which the controller turns off) as 9.5 VDC.
The voltage reference circuit 220c may be configured to provide a voltage supply input Vsupply to the power supply input of the power factor controller circuit 216c, such that Vsupply is between the nominal high operating voltage Vhigh and the average of the nominal high operating voltage Vhigh and the nominal low Vlow operating voltage:
V
high
>V
supply≧(Vlow+Vhigh)/2
This places the value of Vsupply at the high end of the nominal supply voltage operating range of the power factor controller circuit 216c. In the specific example of the L6562 power factor controller circuit having a Vhigh of 22 VDC and a Vlow of 9.5 VDC, Vsupply would be less than 22 VDC but greater than or equal to 15.75 VDC. When a dimmer, such as the dimmer circuit 104a shown in
The supply voltage circuit 220c and the open circuit protection circuit 218c are described herein as being useful in connection with a solid state light source driver circuit wherein the secondary winding 208c is electrically isolated from the primary winding 206c but may be capacitively coupled to the feedback winding 210c and feedback may be optically coupled from the secondary winding 208c to the power factor controller circuit 216c. Those of ordinary skill in the art will recognize, however, that these circuits 218c, 220c may be provided in a wide variety of driver configurations. For example, these circuits may be included in a driver configuration including different transformer or feedback configurations.
The supply voltage circuit 220c provides a supply voltage at the high end of the nominal supply voltage operating range of the power factor controller circuit 216c. Thus, the supply voltage circuit 220c may include capacitors of reduced capacitance value while still maintaining sufficient energy storage capability. This is possible because the energy storage of a capacitor is proportional to CV2, where C is the value of capacitance and V is the voltage across the capacitor. Such a configuration may be particularly useful when the system is implemented with a dimmer, such as but not limited to a phased controlled dimmer circuit, so that the supply voltage circuit 220c can maintain adequate voltage supply to the power factor controller circuit 216c during dimming, and thus avoid flicker in the LED-based light source 106a. The ability to reduce capacitor size is also advantageous since larger capacitors (e.g., electrolytic capacitors) are expensive, prone to failure, and require increased time to charge, which may delay the turn-on time of the LED-based light source 106a. The supply voltage circuit 220c may preferably be implemented without the use of Zener diodes to regulate the supply voltage of the power factor controller circuit 216c since the reduced capacitor sizes of embodiments may not have enough energy storage to avoid flicker in the LED-based light source 106a when the Zener diodes reach cut-off voltage.
In operation, the AC input to the circuit ACin is coupled to the rectifier circuit 202c through the surge protection circuit 224c and the EMI filter 222d. The surge protection circuit 224c includes a fuse U3 and a metal oxide varistor (MOV) which protect the LED driver circuit 102 from input voltage surges. The EMI filter 222d, including inductors L1 and L2, filters EMI noise generated in the circuit. The rectifier circuit 202c includes a known bridge rectifier. The rectifier circuit 202c rectifies the AC input to provide a rectified unregulated DC voltage DCin. The output of the rectifier DCin is coupled to an inductor L3 and a capacitor C1 of an EMI filter 222e, which further filters EMI noise generated in the circuit. A third EMI filter 222f includes a capacitor C2, which couples the feedback winding ground to the secondary winding ground for additional EMI noise filtering. The values of the inductors L1, L2, and L3, and the capacitors C1, C2 and C7 may be chosen to adjust the phase angle between the input voltage and input current to achieve low THD.
The primary winding 206c of the transformer 204c is coupled between the output of the rectifier circuit 202c and the drain of the switch Q1212c so that when the switch Q1212c is conducting, i.e. the switch Q1212c is closed, current flows from the output of the rectifier circuit 202c through the primary winding 206c to energize the primary winding 206c, but when the switch Q1212c is not conducting, i.e. the switch Q1212c is open, essentially no current flows through the primary winding 206c. In general, when the switch Q1212c is closed, the windings of the transformer 204c are energized, and when the switch Q1212c opens, the polarity of the voltage across the secondary winding 208c and the feedback winding 210c reverses to forward bias diodes D4 and D5. When the diode D4 is forward biased, energy from the secondary winding 208c charges a capacitor C4, which is configured to discharge through the load when the switch Q1212c is open.
In general, the power factor controller U1 uses a voltage representative of the output of the rectifier circuit 202c DCin as a reference to control the level at which the power factor controller circuit 216c switches the switch Q1212c on and off using the gate drive GD output coupled to the gate of the switch Q1212c through a resistor R1. This feature allows a very high power factor driver. The switching frequency is determined by feedback from the primary 206c winding and the feedback winding 210c. In particular, a portion of the DCin voltage is coupled to a multiplier input MULT of the power factor controller circuit 216c to provide a signal to the power factor controller U1 representative of the unregulated DC voltage DCin. The MULT input is coupled between resistors R2 and R3. Selection of the value of the resistor R3 allows for a tradeoff between ripple and power factor correction in the output voltage DCout established by the power factor controller U1. The source of the switch Q1212c is coupled to a current sense CS input of the power factor controller U1 and to a ground through a resistor R6. The current through the resistor R6 thus provides a signal to the power factor controller U1 representative of the current through the primary winding 206c. The feedback winding 210c of the transformer 204c is coupled through a resistor R7 to a ZCD input of the power factor controller U1 to provide a signal to the power factor controller U1 representative of the current through the feedback winding 210c. In response to the MULT, ZCD and CS inputs, the power factor controller U1 provides a variable frequency gate drive GD output to the switch Q1212c for driving the load with a high power factor.
Supply voltage is supplied to the power factor controller U1 supply voltage input Vcc through the supply voltage circuit 220c. When there is no starting pulse at the gate of the switch Q1212c, no current is provided from the rectifier circuit 202c output to energize the windings of the transformer 204c. Once the voltage on Vcc reaches its minimum value, the gate drive output GD of the power factor controller U1 provides a starting pulse to the gate of the switch Q1212c through the resistor R1 to close the switch Q1212c so that at least a portion of the output of the rectifier circuit 202c is provided across the primary winding 206c to energize the windings of the transformer 204c. The drain current in the switch Q1212c begins to ramp up at a rate determined by the primary inductances of the transformer 204c. This current produces a voltage across the resistor R6, which is representative of the current through the primary winding 206c. This current is fed into the current sense CS input of the power factor controller U1. The power factor controller U1 compares this voltage to the voltage on the multiplier input MULT, which is set by the resistor R2 and R3, and the voltage on an inverting input INV, which is set by resistors R4 and R12, to limit the current through the switch Q1212c. When the voltage conditions are met according to the switching characteristics set by the power factor controller U1, the drive to the switch Q1212c is removed. This causes the voltage across the primary winding 206c and the secondary winding 208c of the transformer 204c to reverse. The energy stored in the transformer 204c is then transferred to the output via the diode D4. The capacitor C4 reduces voltage swing on the output and provides noise reduction to the open circuit protection circuit 218c. During this same time interval, the transformer 204c provides a voltage on the feedback winding 210c that forward biases the diode D5 to provide current to the supply voltage circuit 220c.
In
After all the energy is removed from the transformer 204c, the voltage on the feedback winding 210c drops to zero. This negative transition on the zero current detection input ZCD of the power factor controller U1 instructs it to start a new cycle. After several cycles, the supply voltage output of the supply voltage circuit 220c reaches an operating level determined by the charge on the capacitors C6 and C9, which remains high enough to power the power factor controller U1 including time periods when the LED-based driver circuit 102a is operated by a dimmer, even during the dead time associated with the lowest dimmer setting.
The open circuit protection circuit 218c includes resistors R9 and R7, and a Zener diode D7. The open circuit protection circuit 218c is coupled to the power factor controller U1 by the optical isolation coupling 224c, which in
A driver circuit according to embodiments described herein may be configured for operation with a variety of input voltages based on appropriate selection of various circuit components thereof. Table 2 below identifies one example of circuit components useful in configuring the embodiment illustrated in
In the methods 1000 and 1100 shown in
Embodiments shown and described herein in relation to
The power factor controller circuit 216e may include a known power factor controller (not shown) configured to provide an output to the switch 212e for controlling the switch 212e in response to a signal representative of current through the primary winding 206e, a second signal representative of current through the feedback winding 210e, and a third signal representative of the unregulated DC voltage, with no feedback signal coupled from the secondary winding 208e to the controller. The output from the power controller may control the switch so that the current to the LED-based light source 106 has a waveform that substantially matches and is in phase with the output of the rectifier 202e, thereby providing high power factor. As in
The optional protection circuit 218e, located between the feedback winding 210e and the power factor controller circuit 216e, is provided to shut down or prohibit operation of the power factor controller circuit 216e upon the occurrence of an open circuit condition. In some embodiments, the optional protection circuit 218e is a Zener diode, which is coupled to an INV port of an L6561 or L6562 power factor controller circuit and, via a resistor, to a Vcc port of the same. In some embodiments, an optional energy transfer circuit 219e is coupled between the primary winding 206e of the transformer 204e and the power factor controller circuit 216e. The energy transfer circuit 219e helps to transfer energy away from the switch 212e and to the power factor controller circuit 216e, improving efficiency in the driver circuit 102b.
On the secondary side of the driver circuit 102b, the output stage 214e includes a diode D1 connected to the secondary winding 208e and in series with a capacitor C4, which is also connected to the secondary winding 208e. A resistor R13 is in parallel with the capacitor C4, which also places it in parallel with the output, at which the output voltage DCout is provided to a load (e.g., one or more solid state light sources). A capacitor C2 is connected in series between the capacitor C4 and ground. The capacitor C2 is used to pass noise on the output circuit to ground, which improves conducted and radiated EMI margins of the driver circuit 102b. The capacitor C4 reduces the ripple current in the load (i.e., the one or more solid state light source(s)) connected to the output stage 214e, while the resistor R13 keeps the voltage within bounds during an open circuit situation.
A driver circuit according to embodiments described herein may be configured for operation with a variety of input voltages based on appropriate selection of various circuit components thereof. Table 3 below identifies one example of circuit components useful in configuring the embodiment illustrated in
The methods and systems described herein are not limited to a particular hardware or software configuration, and may find applicability in many computing or processing environments. The methods and systems may be implemented in hardware or software, or a combination of hardware and software. The methods and systems may be implemented in one or more computer programs, where a computer program may be understood to include one or more processor executable instructions. The computer program(s) may execute on one or more programmable processors, and may be stored on one or more storage medium readable by the processor (including volatile and non-volatile memory and/or storage elements), one or more input devices, and/or one or more output devices. The processor thus may access one or more input devices to obtain input data, and may access one or more output devices to communicate output data. The input and/or output devices may include one or more of the following: Random Access Memory (RAM), Redundant Array of Independent Disks (RAID), floppy drive, CD, DVD, magnetic disk, internal hard drive, external hard drive, memory stick, or other storage device capable of being accessed by a processor as provided herein, where such aforementioned examples are not exhaustive, and are for illustration and not limitation.
The computer program(s) may be implemented using one or more high level procedural or object-oriented programming languages to communicate with a computer system; however, the program(s) may be implemented in assembly or machine language, if desired. The language may be compiled or interpreted.
As provided herein, the processor(s) may thus be embedded in one or more devices that may be operated independently or together in a networked environment, where the network may include, for example, a Local Area Network (LAN), wide area network (WAN), and/or may include an intranet and/or the internet and/or another network. The network(s) may be wired or wireless or a combination thereof and may use one or more communications protocols to facilitate communications between the different processors. The processors may be configured for distributed processing and may utilize, in some embodiments, a client-server model as needed. Accordingly, the methods and systems may utilize multiple processors and/or processor devices, and the processor instructions may be divided amongst such single- or multiple-processor/devices.
The device(s) or computer systems that integrate with the processor(s) may include, for example, a personal computer(s), workstation(s) (e.g., Sun, HP), personal digital assistant(s) (PDA(s)), handheld device(s) such as cellular telephone(s) or smart cellphone(s), laptop(s), handheld computer(s), or another device(s) capable of being integrated with a processor(s) that may operate as provided herein. Accordingly, the devices provided herein are not exhaustive and are provided for illustration and not limitation.
References to “a microprocessor” and “a processor”, or “the microprocessor” and “the processor,” may be understood to include one or more microprocessors that may communicate in a stand-alone and/or a distributed environment(s), and may thus be configured to communicate via wired or wireless communications with other processors, where such one or more processor may be configured to operate on one or more processor-controlled devices that may be similar or different devices. Use of such “microprocessor” or “processor” terminology may thus also be understood to include a central processing unit, an arithmetic logic unit, an application-specific integrated circuit (IC), and/or a task engine, with such examples provided for illustration and not limitation.
Furthermore, references to memory, unless otherwise specified, may include one or more processor-readable and accessible memory elements and/or components that may be internal to the processor-controlled device, external to the processor-controlled device, and/or may be accessed via a wired or wireless network using a variety of communications protocols, and unless otherwise specified, may be arranged to include a combination of external and internal memory devices, where such memory may be contiguous and/or partitioned based on the application. Accordingly, references to a database may be understood to include one or more memory associations, where such references may include commercially available database products (e.g., SQL, Informix, Oracle) and also proprietary databases, and may also include other structures for associating memory such as links, queues, graphs, trees, with such structures provided for illustration and not limitation.
References to a network, unless provided otherwise, may include one or more intranets and/or the internet. References herein to microprocessor instructions or microprocessor-executable instructions, in accordance with the above, may be understood to include programmable hardware.
Unless otherwise stated, use of the word “substantially” may be construed to include a precise relationship, condition, arrangement, orientation, and/or other characteristic, and deviations thereof as understood by one of ordinary skill in the art, to the extent that such deviations do not materially affect the disclosed methods and systems.
Throughout the entirety of the present disclosure, use of the articles “a” or “an” to modify a noun may be understood to be used for convenience and to include one, or more than one, of the modified noun, unless otherwise specifically stated.
Elements, components, modules, and/or parts thereof that are described and/or otherwise portrayed through the figures to communicate with, be associated with, and/or be based on, something else, may be understood to so communicate, be associated with, and or be based on in a direct and/or indirect manner, unless otherwise stipulated herein.
Although the methods and systems have been described relative to a specific embodiment thereof, they are not so limited. Obviously many modifications and variations may become apparent in light of the above teachings. Many additional changes in the details, materials, and arrangement of parts, herein described and illustrated, may be made by those skilled in the art.
The present application is a continuation-in-part of U.S. patent application Ser. No. 13/776,604, filed Feb. 25, 2013 and entitled “BALLAST CIRCUIT FOR LED-BASED LAMP INCLUDING POWER FACTOR CORRECTION WITH PROTECTIVE ISOLATION”, which is continuation of, and claims priority of, U.S. patent application Ser. No. 12/616,301, filed Nov. 11, 2009 and entitled “BALLAST CIRCUIT FOR LED-BASED LAMP INCLUDING POWER FACTOR CORRECTION WITH PROTECTIVE ISOLATION”, now U.S. Pat. No. 8,384,295. The present application is also a continuation-in-part of U.S. patent application Ser. No. 13/222,465, filed Aug. 31, 2011 and entitled “DRIVER CIRCUIT FOR DIMMABLE SOLID STATE LIGHT SOURCE”. The present application also claims priority of U.S. Provisional Patent Application No. 61/814,330, filed Apr. 21, 2013 and entitled “ELECTRONIC DRIVER AND COOLING THEREOF”. The entire contents of all of these are hereby incorporated by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61814330 | Apr 2013 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 12616301 | Nov 2009 | US |
| Child | 13776604 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13776604 | Feb 2013 | US |
| Child | 14088336 | US | |
| Parent | 13222465 | Aug 2011 | US |
| Child | 12616301 | US |
