1. Field
Embodiments of the invention relate to the field of optics and more specifically, but not exclusively, to driving a laser using an electrical link driver.
2. Background Information
Optical signals may be used to send data between devices. A data signal is used to modulate a laser output for transmission over an optical fiber. In today's systems, a laser is driven by a laser driver customized for that particular laser.
Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
In the following description, numerous specific details are set forth to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that embodiments of the invention can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring understanding of this description.
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Turning to
In one embodiment, optical link 108 includes one or more optical fibers. In one embodiment, an optical fiber may be integrated with transmitter 101 leaving a pigtail that may be connected to an optical fiber. In another embodiment, transmitter 101 includes a connection port for receiving an optical fiber. In yet another embodiment, transmitter 101 may be part of a transceiver for sending and receiving optical signals along an optical link.
Electrical link driver 102 includes a driver used to drive a point-to-point link that transmits data using electrical signals. In a point-to-point topology, a source is interconnected with a destination using a link. Devices in a point-to-point link have at dedicated connection to each other. Multiple devices do not cooperatively share a transmission path, as in a bus configuration. Embodiments of electrical link driver 201 include a Peripheral Component Interconnect Express (hereafter referred to as “PCIe”) driver, a Serial Advanced Technology Attachment (SATA) driver, or the like. Details regarding PCIe and SATA will be discussed below.
Embodiments of laser 104 include a semiconductor laser diode, such as a Vertical Cavity Surface Emitting Laser (VCSEL), a Fabry Perot (FP) laser, a Distributed Feedback (DFB) laser, a Light Emitting Diode (LED), a Resonant Cavity LED (RCLED), or the like. In semiconductor laser diodes, coherent optical output may be generated when the laser current is maintained above a threshold value. Typically, when a laser diode is used in fast switching applications, the laser diode may be biased slightly above the threshold to avoid turn-on delay. A bias current is used to keep the laser diode above its threshold level and into the laser's linear operating region. In one embodiment, the laser output is modulated by switching the laser output power level between a high value and a low value. These high and low optical output levels may be interpreted as logical 1's and 0's by the receiving device.
In one embodiment, the point-to-point link driven by electrical link driver 102 uses differential signaling to send data between the ends of the link. Differential signaling involves differential drivers and receivers at each end of the point-to-point link. A differential signal uses the difference in voltage between two conductors to transmit logical 1's and 0's. A differential signal includes a voltage on a positive terminal D+ and a negative terminal D−. The differential voltage may be defined as the difference of the positive voltage and the negative voltage. For example, a positive voltage difference between a D+ terminal and a D− terminal may indicate a logical ‘1’, while a negative difference may indicate a logical ‘0.’ No voltage difference between a pair of signals may indicate the point-to-point link is in an off state.
In the embodiment of
It will also be appreciated that embodiments of the invention may use a standardized “off the shelf” electrical link driver to drive a laser instead of a customized laser driver. In one embodiment, electrical links coming off of a motherboard where a copper cable is normally used may be replaced by an optical fiber using embodiments described herein.
Bypassing the use of a laser driver provides power savings to a system because of no need to provide power to a laser driver as well as an electrical link driver. Optical links are superior to metal conductors because of lighter weight, reduced electromagnetic interference, and longer cable length capabilities. Further, without a laser driver, costs associated with fabrication and testing of transmitter 101 are reduced.
In one embodiment, electrical link driver 102 may include a SATA driver. Embodiments herein having a SATA driver may be substantially in compliance with the SATA specification (Serial ATA: High Speed Serialized AT Attachment, Revision 1.0a, Jan. 7, 2003). SATA uses a first serial path to transmit data, and a second serial path to return acknowledgements to the sender. Each signal path uses a 2-wire differential signaling pair resulting in 4 signal lines per channel. SATA may transmit data at 1.5 Gigabits per second or faster. In accordance with the SATA specification, the voltage swing of a SATA link is approximately 0.125 Volts (V) about the common-mode voltage with a minimum common-mode voltage of about 0.25 V.
Turning to
Referring to
A Central Processing Unit (CPU) 206 and memory 208 are coupled to MCH 202. Embodiments of CPU 206 and memory 208 are discussed below in conjunction with
ICH 204 may include support for a SATA interface 212, a Universal Serial Bus (USB) 216, and a Low Pin Count (LPC) bus 218.
ICH 104 may also include PCIe ports 220-1 to 220-4. While the embodiment shown in
Each port 220 is coupled to a device via PCIe links 224. In the embodiment of
Devices 228, 230, and 232 and switch 234 may be coupled to ICH 204 using expansion card connections or cable connections. Embodiments of the present invention may be used with links 224. Embodiments of devices 228, 230, and 232 include internal devices and external devices.
Turning to
Link 270 supports at least 1 lane. Each lane represents a set of differential signaling pairs, one pair for transmitting and one pair for receiving resulting in a total of 4 signals. For example, a x1 link includes 1 lane, and a x4 link includes 4 lanes. The width of link 270 may be aggregated using multiple lanes to increase the bandwidth of the connection between device 250 and device 260. In one embodiment, link 270 may include a x1, x2, x4, x16, or x32 link. In one embodiment, a single lane in one direction has a rate of 2.5 Gigabits per second. Through aggregation of lanes, a x32 link may transmit 10 Gigabytes per second (GB/sec) in each direction.
Information between devices is communicated using packets. To send a packet, the packet is started at the Transaction Layer and passed down to the Physical Layer. The packet is received at the Physical Layer of the receiving device and passed up to the Transaction Layer. The packet data is extracted from the packet at the receiving device.
Referring to
Turning to
A Direct Current (DC) current source 308 is coupled to an AC block 310 which in turn is coupled to anode 314. DC current source 308 provides a bias current for VCSEL 312. The optical output of VCSEL 312 is optically coupled to an optical link 330. Embodiments of optical link 330 include an optical fiber, or other types of waveguides, such as a polymer waveguide.
A cathode 316 of VCSEL 312 is coupled to ground 322. Ground 322 is also coupled to a termination resistor 318. In one embodiment, resistor 318 has a resistance of 50 Ohms. Resistor 318 is coupled to an AC coupling capacitor 320 which in turn is coupled to negative terminal 304B of PCIe driver 304.
In an alternative embodiment, VCSEL 312 is situated such that anode 314 is coupled to termination resistor 318 and cathode 316 is coupled to AC coupling capacitor 306.
PCIe driver 304 provides the modulation current to VCSEL 312. In the embodiment of
AC coupling capacitor 306 is used to isolate the DC voltage levels of PCIe driver 304 and the VCSEL 312. In one embodiment, the forward voltage of VCSEL 312 is greater than the allowable common mode voltage of PCIe driver 304. In one embodiment, the forward voltage of VCSEL 312 is approximately 2.0 V±10% while the PCIe driver outputs a 1.0 V signal.
Further, the PCIe specification calls out AC coupling at transmitters of each lane of a link. The PCIe specification denotes an AC coupling capacitance between 75 nanoFarads (nF) and 200 nF. AC coupling capacitor 306 also brings embodiments of the invention within compliance with the PCIe specification. Alternative embodiments of the invention may use DC coupling between an electrical link driver and a laser.
DC current source 308 may provide bias current for VCSEL 314. In one embodiment, DC current source 308 may include circuitry packaged with the PCIe driver 304 either on the same chip as PCIe driver 304 or on a separate chip. In another embodiment, DC current source 308 may include a chip packaged separately from PCIe driver 304.
In one embodiment, AC block 310 may shield the modulation signal of terminal 304A from any parasitics that are associated with DC current source 308 and any related connections of DC current source 308. For example, DC current source 308 may have a lot of parasitic capacitance, so it is desirable to isolate DC current source 308 from the modulation signal. In another example, DC current source 308 is isolated from the modulation signal because variations of the DC voltage of the DC current source 308 may affect the DC current delivered.
As described above, negative output 304B of PCIe driver 304 is coupled to ground 322 through AC coupling capacitor 320 and termination resistor 318. Termination resistor 318 gives PCIe driver 304 a balanced load along with VCSEL 312. In one embodiment, AC coupling capacitor 320 leaves the common mode output of PCIe driver 304 undisturbed.
Turning to
Continuing to a block 404, a bias current is generated. In one embodiment, the generating the bias current includes isolating a bias current source from the modulation current.
Proceeding to a block 406, the laser is driven using the modulation current and the bias current. In one embodiment, driving the laser includes providing the electric link driver a balanced load. In the embodiment of
Referring to
Test device 506 is coupled to VCSEL 508. An optical fiber 510 couples the optical output of VCSEL 508 to Optical-Electrical (O-E) converter 512. O-E converter 512 is coupled to a Bessel Thompson (BT) filter 514 that in turn is coupled to a scope 516.
The test conditions shown in
Computer system 600 includes a processor 602 and a memory 604 coupled to a chipset 606. Storage 612, Non-Volatile Storage (NVS) 605, and network interface (I/F) 614, and Input/Output (I/O) device 618 may also be coupled to chipset 606. Embodiments of computer system 600 include, but are not limited to, a desktop computer, a notebook computer, a server, a personal digital assistant, a network workstation, or the like. In one embodiment, computer system 600 includes processor 602 coupled to memory 604, processor 602 to execute instructions stored in memory 604.
Processor 602 may include, but is not limited to, an Intel Corporation x86, Pentium®, Celeron®, or Itanium® family processor, or the like. In one embodiment, computer system 600 may include multiple processors. In another embodiment, processor 602 may include two or more processor cores.
Memory 604 may include, but is not limited to, Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Synchronized Dynamic Random Access Memory (SDRAM), Rambus Dynamic Random Access Memory (RDRAM), or the like. In one embodiment, memory 604 may include one or more memory units that do not have to be refreshed.
Chipset 606 may include a memory controller, such as a Memory Controller Hub (MCH), an input/output controller, such as an Input/Output Controller Hub (ICH), or the like. In an alternative embodiment, a memory controller for memory 604 may reside in the same chip as processor 602. Chipset 606 may also include system clock support, power management support, audio support, graphics support, or the like. In one embodiment, chipset 606 is coupled to a board that includes sockets for processor 602 and memory 604.
Components of computer system 600 may be connected by various interconnects. In one embodiment, an interconnect may be point-to-point between two components, while in other embodiments, an interconnect may connect more than two components. Such interconnects may include a Peripheral Component Interconnect (PCI), such as PCI Express, a System Management bus (SMBUS), a Low Pin Count (LPC) bus, a Serial Peripheral Interface (SPI) bus, an Accelerated Graphics Port (AGP) interface, or the like. I/O device 618 may include a keyboard, a mouse, a display, a printer, a scanner, or the like. Embodiments of a display may include a Cathode-Ray-Tube (CRT) display, a Liquid Crystal Display (LCD), a plasma display, or the like.
Computer system 600 may interface to external systems through network interface 614. Network interface 614 may include, but is not limited to, a modem, a Network Interface Card (NIC), or other interfaces for coupling a computer system to other computer systems. A carrier wave signal 623 may be received/transmitted by network interface 614. In the embodiment illustrated in
The computer system 600 also includes non-volatile storage 605 on which firmware and/or data may be stored. Non-volatile storage devices include, but are not limited to, Read-Only Memory (ROM), Flash memory, Erasable Programmable Read Only Memory (EPROM), Electronically Erasable Programmable Read Only Memory (EEPROM), Non-Volatile Random Access Memory (NVRAM), or the like. Storage 612 includes, but is not limited to, a magnetic hard disk drive, a magnetic tape drive, an optical disk drive, or the like. It is appreciated that instructions executable by processor 602 may reside in storage 612, memory 604, non-volatile storage 605, or may be transmitted or received via network interface 614.
Embodiments of computer system 600 may include an electrical link driver to drive a laser as described herein. For example, in
In another example, an optical link 617 may connect chipset 606 to an external device 619. Embodiments of external device 619 include an external magnetic hard disk drive, an external optical drive, a display, a webcam, a scanner, or the like. One or both transmission ends of optical link 617 may include an electrical link driver to drive an associated laser in accordance with embodiments herein.
It will be appreciated that in one embodiment, computer system 600 may execute Operating System (OS) software. For example, one embodiment of the present invention utilizes Microsoft Windows® as the operating system for computer system 600. Other operating systems that may be used with computer system 600 include, but are not limited to, the Apple Macintosh operating system, the Linux operating system, the Unix operating system, or the like.
Various operations of embodiments of the present invention are described herein. The order in which some or all of the operations are described should not be construed as to imply that these operations are necessarily order dependent. Alternative ordering will be appreciated by one skilled in the art having the benefit of this description. Further, it will be understood that not all operations are necessarily present in each embodiment of the invention.
The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the embodiments to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible, as those skilled in the relevant art will recognize. These modifications can be made to embodiments of the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification. Rather, the following claims are to be construed in accordance with established doctrines of claim interpretation.