1. Technical Field
The present disclosure relates to a driving assistant system and method.
2. Description of Related Art
For safety while driving of automotive vehicles, a small camera is mounted on a vehicle and directed to a specific direction to take an image not directly viewed by a driver's eye. The taken image is displayed on a monitor of the vehicle. However, the camera can not take images surrounding each side of the vehicle and blind spots still exist.
Therefore, there is room for improvement within the art.
Many aspects of the embodiments can be better understood with references to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
The disclosure is illustrated by way of example and not by way of limitation. In the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”
The AD converting module 20 comprises a first AD converter ADC1connected to the first camera 11, a second AD converter ADC2 connected to the second camera 12, a third AD converter ADC3 connected to the third camera 13, and a fourth AD converter ADC4 connected to the fourth camera 14. The filter module 30 comprises a first filter connected to the first AD converter ADC1, a second filter connected to the second AD converter ADC2, a third filter connected to the third AD converter ADC3, and a fourth filter connected to the fourth AD converter ADC4. An output terminal of each of the first filter, the second filter, the third filter, and the fourth filter is connected to the FPGA 40. The D/A converting module 70 is connected to the FPGA 40. The monitor 80 is connected to the D/A converting module 80.
In one embodiment, each of the first A/D converter ADC1, the second A/D converter ADC2, the third A/D converter ADC3, and the fourth A/D converter ADC4 is a TVP5150 chip. Each of the first filter, the second filter, the third filter, and the fourth filter is a MDIN221 chip.
Each of the plurality of cameras comprises a fish-eye lens to capture a fish-eye image around the vehicle 100. The fish-eye image comprises analog picture signals which carry information of the fish-eye image. The A/D converting module 20 converts analog picture signals to digital picture signals correspondingly. The digital picture signals is filtered by the filter module 30 and sent to the FPGA 40. The FPGA 40 converts the digital picture signals indicative of the fish-eye image into converted digital picture signals indicative of a plane image. Thus, the fish-eye image can be converted to the plane image. The FPGA 40 combines the converted digital picture signals coming from the plurality of cameras to get a panorama image which provides a 360° view around the vehicle 100. The combined digital picture signals are converted to analog picture signals by the D/A converting module 70 and sent to the monitor 80. The monitor 80 displays the panorama image.
In block S01, each of the plurality of cameras takes a fish-eye image at its mounting position.
In block S02, each of the plurality of cameras sends analog picture signals indicative of the fish-eye image to the A/D converting module 20. In particularly, analog picture signals coming from the first camera 11 are sent to the first AD converter ADC1.Analog picture signals coming from the second camera 12 are sent to the second AD converter ADC2. Analog picture signals coming from the third camera 13 are sent to the third AD converter ADC3. Analog picture signals coming from the fourth camera 14 are sent to the fourth AD converter ADC4.
In block S03, the A/D converting module 20 converts the analog picture signals to digital picture signals. In particularly, the first AD converter ADC1 converts the analog pictures signals coming from the first camera 11 to digital picture signals. The second AD converter ADC2 converts the analog pictures signals coming from the second camera 12 to digital picture signals. The third AD converter ADC3 converts the analog pictures signals coming from the third camera 13 to digital picture signals. The fourth AD converter ADC4 converts the analog pictures signals coming from the fourth camera 14 to digital picture signals.
In block S04, the filter module 30 filters the digital picture signals. In particularly, the first filter filters the digital picture signals coming from the first AD converter ADC1. The second filter filters the digital picture signals coming from the second AD converter ADC2. The third filter filters the digital picture signals coming from the third AD converter ADC3. The fourth filter filters the digital picture signals coming from the fourth AD converter ADC∝4.
In block S05, the filter module 30 sends the filtered digital picture signals to the FPGA 40.
In block S06, the FPGA 40 stores the filtered digital picture signals to the first SRAM 51, the second SRAM 52, the third SRAM 53, and the fourth SRAM 54. In particularly, the filtered digital picture signals coming from the first filter is stored in the first SRAM 51. The filtered digital picture signals coming from the second filter is stored in the second SRAM 52. The filtered digital picture signals coming from the third filter is stored in the third SRAM 53. The filtered digital picture signals coming from the fourth filter is stored in the fourth SRAM 54.
In block S07, the FPGA 40 converts the filtered digital picture signals coming from each filter into converted digital picture signals indicative of a plane image. Thus, the fish-eye image captured by each of the plurality of cameras can be converter to the plane image.
In block S08, the FPGA 40 combines the converted digital picture signals coming from the plurality of cameras to get a panorama image which provides a 360° view around the vehicle. The fish-eye images capture by the plurality of cameras have overlapping areas. In this combining step, the FPGA 40 takes average data of the overlapping areas.
In block S09, the FPGA 40 sends combined digital picture signals indicative of the panorama image to the D/A converting module 70.
In block S10, the D/A converting module 70 converts the combined digital picture signals to combined analog picture signals and sends the combined analog picture signals to the monitor 80.
In block S11, the monitor 80 displays the panorama image.
While the present disclosure has been illustrated by the description of embodiments thereof, and while the preferred embodiments have been described in considerable detail, it is not intended to restrict or in any way limit the scope of the appended claims to such details. Additional advantages and modifications within the spirit and scope of the present disclosure will readily appear to those skilled in the art. Therefore, the present disclosure is not limited to the specific details and illustrative examples shown and described.
Depending on the embodiment, certain of the steps of methods described may be removed, others may be added, and the sequence of steps may be altered. It is also to be understood that the description and the claims drawn to a method may include some indication in reference to certain steps. However, any indication used is only to be viewed for identification purposes and not as a suggestion as to an order for the steps.
Number | Date | Country | Kind |
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2012105617723 | Dec 2012 | CN | national |
This application are related to co-pending application entitled, “DRIVING ASSISTANT SYSTEM AND METHOD”, filed on ***, application No. ***, (Atty. Docket No. US48635), and “DRIVING ASSISTANT SYSTEM AND METHOD”, filed on ***, application No. ***, (Atty. Docket No. US48637).