Embodiments of the present disclosure relate, but not limited, to the technical field of display driving, and particularly to a driving circuit and a driving method thereof, and a display panel.
In recent years, flexible Organic Light-Emitting Diode (OLED) display panel has been developed rapidly from curved display screen to foldable display screen, from bending within 90° to 180° folding, and from 5.5 inches gradually to 8 inches. An enlarged display screen inevitably requires a higher driving capability of an Integrated Circuit (IC), or is driven by multiple ICs. The improvement of the driving capability of the IC may increase the power consumption and result in the poor endurance of the display panel. It is needed to reduce the power consumption of a display panel to improve the endurance of the display panel.
The below is a summary about the subject matter described in the present disclosure in detail. The summary is not intended to limit the scope of protection of the claims.
According to a first aspect, an embodiment of the present disclosure provides a driving circuit, which includes: a first shift register group, including multiple stages of shift register circuits, where the shift register circuit of each stage includes a first gate input terminal and a gate output terminal, and the first gate input terminals of the shift register circuits of the second stage to the last stage are connected with the gate output terminals of the shift register circuits of the immediately previous stages; a second shift register group, including multiple stages of shift register circuits, where the shift register circuit of each stage includes a second gate input terminal and a gate output terminal, and the second gate input terminals of the shift register circuits of the second stage to the last stage are connected with the gate output terminals of the shift register circuits of the immediately previous stages; and a control module, including a first Gate Start Voltage (GSTV) signal output terminal and a second GSTV signal output terminal. The first GSTV signal output terminal is connected with the first gate input terminal of the shift register circuit of the first stage in the first shift register group. The second GSTV signal output terminal is connected with the second gate input terminal of the shift register circuit of the first stage in the second shift register group. The control module is arranged to output a first turn-on signal or a first turn-off signal to the first GSTV signal output terminal, and is further arranged to output the first turn-on signal or the first turn-off signal to the second GSTV signal output terminal.
In an exemplary embodiment, the first turn-off signal includes a high-impedance state.
In an exemplary embodiment, in the first shift register group, the shift register circuit of each stage further includes a first enable input terminal and an enable output terminal, and the first enable input terminals of the shift register circuits of the second stage to the last stage are connected with the enable output terminals of the shift register circuits of the immediately previous stages.
In the second shift register group, the shift register circuit of each stage further includes a second enable input terminal and an enable output terminal, and the second enable input terminals of the shift register circuits of the second stage to the last stage are connected with the enable output terminals of the shift register circuits of the immediately previous stages.
The control module further includes a first Emission Start Voltage (ESTV) signal output terminal and a second ESTV signal output terminal. The first ESTV signal output terminal is connected with the first enable input terminal of the shift register circuit of the first stage in the first shift register group. The second ESTV signal output terminal is connected with the second enable input terminal of the shift register circuit of the first stage in the second shift register group. The control module is arranged to output a second turn-on signal or a second turn-off signal to the first ESTV signal output terminal, and is further arranged to output the second turn-on signal or the second turn-off signal to the second ESTV signal output terminal.
In an exemplary embodiment, the second turn-off signal includes the high-impedance state.
In an exemplary embodiment, the shift register circuit further includes a first signal terminal, a second signal terminal, a third signal terminal, and a fourth signal terminal. The first signal terminal is connected with a first clock signal line. The second signal terminal is connected with a second clock signal line. The third signal terminal is connected with a third clock signal line. The fourth signal terminal is connected with a fourth clock signal line. The first clock signal and the second clock signal have the same period and opposite states. The third clock signal and the fourth clock signal have the same period and opposite states.
In an exemplary embodiment, the driving circuit further includes a first detection unit and second detection unit that are connected with the control module. The control module is arranged to output the first turn-on signal or the first turn-off signal to the first GSTV signal output terminal according to a detection signal of the first detection unit and output the first turn-on signal or the first turn-off signal to the second GSTV signal output terminal according to a detection signal of the second detection unit.
In an exemplary embodiment, the driving circuit further includes a first detection unit and second detection unit that are connected with the control module. The control module is arranged to output the second turn-on signal or the second turn-off signal to the first ESTV signal output terminal according to a detection signal of the first detection unit and output the second turn-on signal or the second turn-off signal to the second ESTV signal output terminal according to a detection signal of the second detection unit.
In an exemplary embodiment, the driving circuit further includes: a third shift register group, including multiple stages of shift register circuits. The shift register circuit of each stage includes a third gate input terminal, a gate output terminal, a third enable input terminal, and an enable output terminal. The third gate input terminals of the shift register circuits of the second stage to the last stage are connected with the gate output terminals of the shift register circuits of the immediately previous stages. The third enable input terminals of the shift register circuits of the second stage to the last stage are connected with the enable output terminals of the shift register circuits of the immediately previous stages.
The control module further includes a third GSTV signal output terminal and a third ESTV signal output terminal. The third GSTV signal output terminal is connected with the third gate input terminal of the shift register circuit of the first stage in the third shift register group. The third ESTV signal output terminal is connected with the third enable input terminal of the shift register circuit of the first stage in the third shift register group. The control module is arranged to output the first turn-on signal or the first turn-off signal to the third GSTV signal output terminal to turn on or off the gate output terminal of the third shift register group, and is further arranged to output the second turn-on signal or the second turn-off signal to the third ESTV signal output terminal to turn on or off the enable output terminal of the third shift register group.
According to a second aspect, an embodiment of the present disclosure also provides a display panel, which is a foldable display panel and includes a display region and a border region at a periphery of the display region. The display region is folded to form a first display sub-region and a second display sub-region. The display panel includes the abovementioned driving circuit. Each of the first display sub-region and the second display sub-region includes multiple gate lines. The gate output terminals of the multiple stages of shift register circuits in the first shift register group are connected with the multiple gate lines of the first display sub-region in one-to-one correspondence. The gate output terminals of the multiple stages of shift register circuits in the second shift register group are connected with the multiple gate lines of the second display sub-region in one-to-one correspondence.
In an exemplary embodiment, the display panel is folded to further form a third display sub-region. The third display sub-region includes multiple gate lines. The driving circuit further includes a third shift register group. Gate output terminals of multiple stages of shift register circuits in the third shift register group are connected with the multiple gate lines of the third display sub-region in one-to-one correspondence.
In an exemplary embodiment, the driving circuit further includes a first detection unit and a second detection unit. The first detection unit is arranged to detect a folding state of the first display sub-region. The second detection unit is arranged to detect a folding state of the second display sub-region.
According to a third aspect, an embodiment of the present disclosure also provides a driving method of a driving circuit, applied to the abovementioned driving circuit and including the following operations.
A detection signal of a first detection unit is received, and a first turn-off signal is output to a first GSTV signal output terminal when the detection signal of the first detection unit is a folding signal.
A detection signal of a second detection unit is received, and a first turn-on signal is output to a second GSTV signal output terminal when the detection signal of the second detection unit is an unfolding signal.
In an exemplary embodiment, the driving method further includes the following operations.
A second turn-off signal is output to a first ESTV signal output terminal when the detection signal of the first detection unit is a folding signal.
A second turn-on signal is output to a second ESTV signal output terminal when the detection signal of the second detection unit is an unfolding signal.
After the drawings and the detailed descriptions are read and understood, the other aspects may be comprehended.
The drawings provide an understanding of the technical solutions of the present disclosure, form a part of the specification, and are used to explain, together with the embodiments of the present disclosure, the technical solutions of the present disclosure and not intended to form limits to the technical solutions of the present disclosure.
Multiple embodiments are described in the present disclosure. However, the description is exemplary and unrestrictive. Moreover, those of ordinary skill in the art may obtain more embodiments and implementation solutions in the scope of the embodiments described in the present disclosure. Although many possible feature combinations are shown in the drawings and discussed in specific implementation modes, the disclosed features may also be combined in many other manners. Unless specifically restricted, any feature or element of any embodiment may be combined with any other feature or element in any other embodiment for use, or may take the place of any other feature or element in any other embodiment.
The present disclosure includes and conceives combinations of features and elements well known to those of ordinary skill in the art. The embodiments, features, and elements that have been disclosed in the present disclosure may be combined with any conventional features or elements to form unique solutions defined by the claims. Any feature or element of any embodiment may be combined with a feature or element from another solution to form another unique solution defined by the claims. Therefore, any feature shown and/or discussed in the present disclosure may be implemented independently or in any appropriate combination. Therefore, no other limits are made to the embodiments, besides limits made by the appended claims and equivalent replacements thereof. In addition, various modifications and variations may be made within the scope of protection of the appended claims.
In addition, a method and/or a process may already be presented as a specific step sequence in the specification when a representative embodiment is described. However, the method or the process should not be limited to the steps of the specific sequence on the premise that the method or the process is independent of the specific sequence of the steps. As understood by those of ordinary skill in the art, other step sequences are possible. Therefore, the specific sequence of the steps described in the specification should not be explained as a limit to the claims. Moreover, execution of the steps of the method and/or the process in the claims for the method and/or the process should not be limited to the written sequence, and it can be understood by those skilled in the art that these sequences may be changed and still fall within the spirit and scope of the embodiments of the present disclosure.
Unless otherwise defined, technical terms or scientific terms used in the embodiments of the present disclosure should have the same meanings as commonly understood by those of ordinary skill in the art that the present disclosure belongs to. Ordinal numerals “first”, “second”, “third”, etc., used in the embodiments of the present disclosure do not represent any sequence, number, or importance, and are set not to form limits in number but only to avoid the confusion of composition elements. “Include”, “contain”, or a similar term means that an element or object appearing before the term covers an element or object and equivalent thereof listed after the term and does not exclude other elements or objects. “Connect”, “mutually connected”, or similar terms are not limited to physical or mechanical connection but may include electrical connection, either direct or indirect.
It can be understood by those skilled in the art that transistor adopted in all the embodiments of the present disclosure may be a thin-film transistor, or a field-effect transistor, or another device with the same characteristic. The thin-film transistor used in the embodiments of the present disclosure may be an oxide semiconductor transistor. A source and drain of the transistor used here are symmetric, so the drain and the source may be interchanged. In the embodiments of the present disclosure, the gate of the transistor is called a control electrode. For distinguishing the two electrodes, except the gate, of the transistor, one electrode is called a first electrode, while the other electrode is called a second electrode. The first electrode may be the source or the drain, and the second electrode may be the drain or the source.
Two main aspects are considered for reduction of the power consumption of an IC: one is a power supply manner for the IC, and the other is a driving manner for a display panel. Some IC products may be powered by two to four lines, and the power consumption is different when different power supply manners are adopted to turn on the picture. The driving manner for the display panel may be matched with the IC to reduce the power consumption, and particularly for a foldable screen, the power consumption is improved more remarkably.
As shown in
A single GSTV/ESTV signal is adopted in multiple display sub-regions to drive the whole screen in the driving circuit shown in
The driving circuit includes a first shift register group, a second shift register group, and a control module 50. The first shift register group includes multiple stages of shift register circuits 40. The shift register circuit 40 of each stage includes a first gate input terminal INPUT1 and a gate output terminal GOUT. The first gate input terminals INPUT1 of the shift register circuits of the second stage to the last stage are connected with the gate output terminals GOUT of the shift register circuits of the immediately previous stages.
The second shift register group includes multiple stages of shift register circuits 40. The shift register circuit of each stage includes a second gate input terminal INPUT1 and a gate output terminal GOUT. The second gate input terminals INPUT1 of the shift register circuits of the second stage to the last stage are connected with the gate output terminals GOUT of the shift register circuits of the immediately previous stages.
The control module includes a first GSTV signal output terminal GSTV1 and a second GSTV signal output terminal GSTV2. The first GSTV signal output terminal GSTV1 is connected with the first gate input terminal of the shift register circuit of the first stage in the first shift register group. The second GSTV signal output terminal GSTV2 is connected with the second gate input terminal of the shift register circuit of the first stage in the second shift register group. The control module is arranged to output a first turn-on signal or a first turn-off signal to the first GSTV signal output terminal GSTV1 to turn on or off the gate output terminal GOUT of the shift register circuit in the first shift register group, and is further arranged to output the first turn-on signal or the first turn-off signal to the second GSTV signal output terminal GSTV2 to turn on or off the gate output terminal GOUT of the shift register circuit in the second shift register group.
The driving circuit of the embodiment of the present disclosure may be applied to a foldable display panel. The display panel may be folded to form a first display sub-region and a second display sub-region. The first shift register group is arranged to drive the first display sub-region. The second shift register group is arranged to drive the second display sub-region.
It can be understood by those skilled in the art that, in a gate driving circuit, when a GSTV signal is an initial gate driving signal (i.e., a signal including a pulse in time of a frame of image), the gate driving circuit may be turned on and output a gate driving signal at a gate output terminal. In the embodiment of the present disclosure, the control module includes the first GSTV signal output terminal GSTV1 and the second GSTV signal output terminal GSTV2. The first GSTV signal output terminal GSTV1 is connected with the first gate input terminal of the shift register circuit of the first stage in the first shift register group. The second GSTV signal output terminal GSTV2 is connected with the second gate input terminal of the shift register circuit of the first stage in the second shift register group. The control module is arranged to output a first turn-on signal or a first turn-off signal to the first GSTV signal output terminal GSTV1 to turn on or off the gate output terminal GOUT of the shift register circuit in the first shift register group. The control module is further arranged to output the first turn-on signal or the first turn-off signal to the second GSTV signal output terminal GSTV2 to turn on or off the gate output terminal GOUT of the shift register circuit in the second shift register group. When the driving circuit is applied to the foldable display panel, each display sub-region corresponds to a single GSTV signal output terminal, and the control module may separately control the displaying of each display sub-region. When a display sub-region is in a folded state and not required to display anything, the control module may output the first turn-off signal to the GSTV signal output terminal corresponding to the display sub-region, thereby turning off a gate output terminal of a shift register circuit in a shift register corresponding to the display sub-region to stop the gate output terminal from outputting any gate driving signal and display a black picture in the display sub-region. The black picture is no more displayed by black screen refreshing in the display sub-region in the folded state, so that power wastes are avoided, the power consumption of the driving circuit is reduced, and the endurance of the display panel is improved.
In an exemplary embodiment, as shown in
In an exemplary embodiment, the first turn-off signal may include a high-impedance state. The first turn-on signal may be an initial gate driving signal (i.e., a signal including a pulse in time of a frame of image). When the first display sub-region is in a folded state and the second display sub-region is in an unfolded state, the control module may input the first turn-off signal to the first GSTV signal output terminal GSTV1 to turn off the gate output terminal GOUT of the shift register circuit in the first shift register group to stop the gate output terminal GOUT from outputting any gate driving signal and stop displaying in the first display sub-region. The control module may input the first turn-on signal to the second GSTV signal output terminal GSTV2 to turn on the gate output terminal GOUT of the shift register circuit in the second shift register group to enable the gate output terminal GOUT to normally output a gate driving signal and implement displaying in the second display sub-region.
It can be understood by those skilled in the art that an output of a digital circuit has three states: a high level, a low level, and a high-impedance state. The high-impedance state is a common state in a digital circuit. The high-impedance state is neither a high level nor a low level. If the high-impedance state is further input to a next-stage circuit, the next-stage may not be affected, just as there is no connection. The high-impedance state may be a high level or a low level if measured by a voltmeter. The high-impedance state is the most power-saving output manner, and reduces the power consumption of the display panel.
In an exemplary embodiment, in the first shift register group, the shift register circuit of each stage further includes a first enable input terminal INPUT2 and an enable output terminal EOUT, and the first enable input terminals INPUT2 of the shift register circuits of the second stage to the last stage are connected with the enable output terminals EOUT of the shift register circuits of the immediately previous stages. In the second shift register group, the shift register circuit of each stage further includes a second enable input terminal INPUT2 and an enable output terminal EOUT, and the second enable input terminals INPUT2 of the shift register circuits of the second stage to the last stage are connected with the enable output terminals EOUT of the shift register circuits of the immediately previous stages. The control module further includes a first ESTV signal output terminal ESTV1. The first ESTV signal output terminal ESTV1 is connected with the first enable input terminal INPUT2 of the shift register circuit of the first stage in the first shift register group. The first enable input terminal INPUT2 of the shift register circuit of the first stage in the second shift register group is connected with the enable output terminal EOUT of the shift register circuit of the last stage in the first shift register group. The control module is arranged to output a second turn-on signal or a second turn-off signal to the first ESTV signal output terminal ESTV1.
In an exemplary embodiment, as shown in
The control module further includes a first ESTV signal output terminal ESTV1 and a second ESTV signal output terminal ESTV2. The first ESTV signal output terminal ESTV1 is connected with the first enable input terminal INPUT2 of the shift register circuit of the first stage in the first shift register group. The second ESTV signal output terminal ESTV2 is connected with the second enable input terminal INPUT2 of the shift register circuit of the first stage in the second shift register group. The control module is arranged to output a second turn-on signal or a second turn-off signal to the first ESTV signal output terminal ESTV1 to turn on or off the enable output terminal EOUT of the shift register circuit in the first shift register group. The control module is arranged to output the second turn-on signal or the second turn-off signal to the second ESTV signal output terminal ESTV2 to turn on or off the enable output terminal EOUT of the shift register circuit in the second shift register group.
It can be understood by those skilled in the art that, in an enable driving circuit, when an ESTV signal is an initial enable driving signal (i.e., a signal including a pulse in time of a frame of image), the enable driving circuit may be turned on and output an enable driving signal at an enable output terminal. In the embodiment of the present disclosure, when the driving circuit is applied to the foldable display panel, each display sub-region corresponds to a single ESTV signal output terminal, and the control module may separately control the enable driving of each display sub-region. When a display sub-region is in a folded state and does not need enable driving, the control module may output the second turn-off signal to the ESTV signal output terminal corresponding to the display sub-region, thereby turning off an enable output terminal of a shift register circuit in a shift register corresponding to the display sub-region to stop the enable output terminal from outputting any enable driving signal. As such, the power consumption is reduced, and the endurance of the display panel is improved.
In an exemplary embodiment, as shown in
In an exemplary embodiment, the second turn-off signal may include a high-impedance state. The second turn-on signal may be an initial enable driving signal (i.e., a signal including a pulse in time of a frame of image). When the first display sub-region is in a folded state and the second display sub-region is in an unfolded state, the control module may input the first turn-off signal to the first ESTV signal output terminal ESTV1 to turn off the enable output terminal EOUT of the shift register circuit in the first shift register group to stop the enable output terminal EOUT from outputting any enable driving signal. The control module may input the first turn-on signal to the second ESTV signal output terminal ESTV2 to turn on the enable output terminal EOUT of the shift register circuit in the second shift register group to enable the enable output terminal EOUT to normally output an enable driving signal.
In an exemplary embodiment, as shown in
The control module further includes a third GSTV signal output terminal GSTV3. The third GSTV signal output terminal GSTV3 is connected with the third gate input terminal INPUT1 of the shift register circuit of the first stage in the third shift register group. The control module is arranged to output the first turn-on signal or the first turn-off signal to the third GSTV signal output terminal GSTV3 to turn on or off the gate output terminal GOUT of the third shift register group.
The control module further includes a third ESTV signal output terminal ESTV3. The third ESTV signal output terminal ESTV1 is connected with the third enable input terminal INPUT2 of the shift register circuit of the first stage in the third shift register group. The control module is further arranged to output the second turn-on signal or the second turn-off signal to the third ESTV signal output terminal ESTV3 to turn on or off the enable output terminal EOUT of the third shift register group.
The control module 50 is in an integrated circuit 300. The shift register group may be arranged in the border region 200 corresponding to the display region. For example, the first shift register group may be in a border region on a left side or right side of the first display sub-region 10, the second shift register group may be in a border region on a left side or right side of the second display sub-region 20, and the third shift register group may be in a border region on a left side or right side of the third display sub-region 30.
In an exemplary embodiment, as shown in
Types of the first memory capacitor C1 and the second memory capacitor C2 may be selected according to a practical circuit. For example, they may be Metal Oxide Semiconductor (MOS) capacitors, metalized capacitors, or double-polysilicon capacitors. No special limits are made thereto in the present exemplary embodiment.
In the abovementioned embodiment, all the transistors are P-type thin film transistors. However, it is easy for those skilled in the art to obtain a gate driving unit of which all transistors are N-type thin film transistors according to the shift register unit provided in the present disclosure. In an exemplary implementation mode of the present disclosure, all the transistors may be N-type thin film transistors. Since all the transistors are N-type thin film transistors, turn-on signals of the transistors are all high levels, and turn-off signals of the transistors are all low-level signals.
Types of the third memory capacitor to the fifth memory capacitor (C3 to C5) may be selected according to a practical circuit. For example, they may be MOS capacitors, metalized capacitors, or double-polysilicon capacitors. No special limits are made thereto in the present exemplary embodiment.
In the abovementioned embodiment, all the transistors are P-type thin film transistors. However, it is easy for those skilled in the art to obtain an enable driving unit of which all transistors are N-type thin film transistors according to the enable driving unit provided in the present disclosure. In an exemplary implementation mode of the present disclosure, all the transistors may be N-type thin film transistors. Since all the transistors are N-type thin film transistors, turn-on signals of the transistors are all high levels, and turn-off signals of the transistors are all low-level signals.
It can be understood by those skilled in the art that the transistor adopted in all the embodiments of the present disclosure may be a thin-film transistor, or a field-effect transistor, or another device with the same characteristic. The thin film transistor may be an oxide semiconductor thin film transistor, a low temperature polysilicon thin film transistor, an amorphous silicon thin film transistor, or a microcrystalline silicon thin film transistor. The thin film transistor may select a bottom-gate thin film transistor or a top-gate thin film transistor as long as a switch function may be realized.
Schematic signal state diagrams of gate output terminals GOUT and enable output terminals EOUT of multiple shift register groups of the driving circuit of the embodiment of the present disclosure in different folding states of the display panel will be illustrated below taking the foldable display panel shown in
It can be understood by those skilled in the art that, for a foldable display panel, a display sub-region in a folded state does not display any image, namely the folded state is a non-display state, and a display sub-region in a non-folded state (i.e., an unfolded state) displays an image, namely the non-folded state is a display state, or the unfolded state is the display state.
As shown in
In the second display sub-region, as shown in
In the third display sub-region, as shown in
As shown in
In the second display sub-region, as shown in
In the third display sub-region, as shown in
As shown in
In the second display sub-region, as shown in
In the third display sub-region, as shown in
The control module 50 may further be arranged to output the second turn-on signal or the second turn-off signal to the first ESTV signal output terminal ESTV1 according to the detection signal of the first detection unit 61. The control module is arranged to output the second turn-on signal or the second turn-off signal to the second ESTV signal output terminal ESTV2 according to the detection signal of the second detection unit.
In an exemplary embodiment, as shown in
When the driving circuit is applied to the display panel shown in
When the control module receives a folding signal from the first detection unit 61, the control module outputs the first turn-off signal to the first GSTV signal output terminal GSTV1 and outputs the second turn-off signal to the first ESTV signal output terminal ESTV1, and no image is displayed in the first display sub-region. When the control module receives an unfolding signal from the first detection unit 61, the control module outputs the first turn-on signal to the first GSTV signal output terminal GSTV1 and outputs the second turn-on signal to the first ESTV signal output terminal ESTV1, and an image is displayed in the first display sub-region.
When the control module receives a folding signal from the second detection unit 62, the control module outputs the first turn-off signal to the second GSTV signal output terminal GSTV2 and outputs the second turn-off signal to the second ESTV signal output terminal ESTV2, and no image is displayed in the second display sub-region. When the control module receives an unfolding signal from the second detection unit 62, the control module outputs the first turn-on signal to the second GSTV signal output terminal GSTV2 and outputs the second turn-on signal to the second ESTV signal output terminal ESTV2, and an image is displayed in the second display sub-region.
When the control module receives a folding signal from the third detection unit 63, the control module outputs the first turn-off signal to the third GSTV signal output terminal GSTV3 and outputs the second turn-off signal to the third ESTV signal output terminal ESTV3, and no image is displayed in the third display sub-region. When the control module receives an unfolding signal from the third detection unit 62, the control module outputs the first turn-on signal to the third GSTV signal output terminal GSTV3 and outputs the third turn-on signal to the second ESTV signal output terminal ESTV3, and an image is displayed in the third display sub-region.
An embodiment of the present disclosure also provides a display panel. The display panel is a foldable display panel. As shown in
The first display sub-region 10 may include multiple gate lines. Gate output terminals of multiple stages of shift register circuits of a first shift register group are connected with the multiple gate lines of the first display sub-region 10 in one-to-one correspondence.
The first display sub-region 10 may include multiple enable lines. Enable output terminals of the multiple stages of shift register circuits of the first shift register group are connected with the multiple enable lines of the first display sub-region 10 in one-to-one correspondence.
The second display sub-region 20 may include multiple gate lines. Gate output terminals of multiple stages of shift register circuits of a second shift register group are connected with the multiple gate lines of the second display sub-region 20 in one-to-one correspondence.
The second display sub-region 20 may include multiple enable lines. Enable output terminals of the multiple stages of shift register circuits of the second shift register group are connected with the multiple enable lines of the second display sub-region 20 in one-to-one correspondence.
The third display sub-region 30 may include multiple gate lines. Gate output terminals of multiple stages of shift register circuits of a third shift register group are connected with the multiple gate lines of the third display sub-region 30 in one-to-one correspondence.
The third display sub-region 30 may include multiple enable lines. Enable output terminals of the multiple stages of shift register circuits of the third shift register group are connected with the multiple enable lines of the third display sub-region 30 in one-to-one correspondence.
A first detection unit corresponds to the first display sub-region, and is arranged to detect a folding state of the first display sub-region.
A second detection unit corresponds to the second display sub-region, and is arranged to detect a folding state of the second display sub-region.
A third detection unit corresponds to the third display sub-region, and is arranged to detect a folding state of the third display sub-region.
The correspondences of the driving circuit and the foldable display panel when the foldable display panel includes two display sub-regions and three display sub-regions are introduced in the above embodiment. It can be understood by those skilled in the art that, when the foldable display panel is folded to form more display sub-regions, the driving circuit may be arranged to include shift register groups, detection units, GSTV signal output terminals, and ESTV signal output terminals in numbers corresponding to the number of the display sub-regions, thereby controlling each display sub-region respectively.
A detection signal of a first detection unit is received, and a first turn-off signal to a first GSTV signal output terminal when the detection signal of the first detection unit is a folding signal.
A detection signal of a second detection unit is received, and a first turn-on signal is output to a second GSTV signal output terminal when the detection signal of the second detection unit is an unfolding signal.
In an exemplary embodiment, the driving method further includes the following operations.
A second turn-off signal is output to a first ESTV signal output terminal when the detection signal of the first detection unit is a folding signal.
A second turn-on signal is output to a second ESTV signal output terminal when the detection signal of the second detection unit is an unfolding signal.
The technical solution of the driving method of the present disclosure will be described below with the driving circuit shown in
A detection signal of the first detection unit is received, and when the detection signal of the first detection unit is a folding signal, a first turn-off signal is output to the first GSTV signal output terminal, and a second turn-off signal is output to the first ESTV signal terminal. The step may include that: the control module 50 receives a detection signal of the first detection unit 61, and when the detection signal of the first detection unit 61 is a folding signal, the control module 50 outputs the first turn-off signal to the first GSTV signal output terminal GSTV1 to turn off the gate output terminal of the shift register circuit in the first shift register group to ensure no output at the gate output terminal; and the control module 50 outputs the second turn-off signal to the first ESTV signal output terminal ESTV1 to turn off the enable output terminal of the shift register circuit in the first shift register group to ensure no output at the enable output terminal, as shown in
A detection signal of the second detection unit is received, and when the detection signal of the second detection unit is a folding signal, a first turn-on signal is output to the second GSTV signal output terminal, and a second turn-on signal is output to the second ESTV signal terminal. The step may include that: the control module 50 receives a detection signal of the second detection unit 62, and when the detection signal of the second detection unit 62 is an unfolding signal, the control module 50 outputs the first turn-on signal to the second GSTV signal output terminal GSTV2 to turn on the gate output terminal of the shift register circuit in the second shift register group to enable the gate output terminal to output a gate driving signal; and the control module 50 outputs the second turn-on signal to the second ESTV signal output terminal ESTV2 to turn on the enable output terminal of the shift register circuit in the second shift register group to enable the enable output terminal to output an enable signal, as shown in
A detection signal of the third detection unit is received, and when the detection signal of the third detection unit is an unfolding signal, the first turn-on signal is output to the third GSTV signal output terminal, and the second turn-on signal is output to the third ESTV signal terminal. The step may include that: the control module 50 receives a detection signal of the third detection unit 63, and when the detection signal of the second detection unit 63 is an unfolding signal, the control module 50 outputs the first turn-on signal to the third GSTV signal output terminal GSTV3 to turn on the gate output terminal of the shift register circuit in the third shift register group to enable the gate output terminal to output a gate driving signal; and the control module 50 outputs the second turn-on signal to the third ESTV signal output terminal ESTV3 to turn on the enable output terminal of the shift register circuit in the third shift register group to enable the enable output terminal to output an enable signal, as shown in
It can be understood by those skilled in the art that the foldable display panel provided in the present disclosure may be any foldable product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, or a navigator.
Although the implementation modes of the present disclosure are disclosed above, the contents are only implementation modes adopted to easily understand the present disclosure and not intended to limit the present disclosure. Those skilled in the art may make any modifications and variations to implementation forms and details without departing from the spirit and scope disclosed by the present disclosure. However, the patent protection scope of the present disclosure should also be subject to the scope defined by the appended claims.
Number | Date | Country | Kind |
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202010339941.3 | Apr 2020 | CN | national |
The present application is a U.S. National Phase Entry of International Application No. PCT/CN2021/076888 having an international filing date of Feb. 19, 2021, which claims priority to Chinese patent application No. 202010339941.3, filed to CNIPA on Apr. 26, 2020, and entitled “A Driving Circuit and Driving Method Thereof, and Display Panel”. The entire contents of the above-identified applications are hereby incorporated by reference.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2021/076888 | 2/19/2021 | WO |