Driving circuit for current programmed organic light-emitting diode displays

Abstract

A load driving circuit for a load having a parasitic capacitance associated therewith is provided. The load being current programmed. The driving circuit has a data line having a voltage controlling the load, a feedback loop having a lowpass filter for monitoring the voltage of the data line; and a current source for providing a current to the data line; the current source being controlled by a signal line and an output from the lowpass filter.

Description

FIELD OF INVENTION

The present invention relates to methods and apparatus for driving a current line with a parasitic capacitance. In particular, the present invention relates to methods and apparatus for driving organic light-emitting diode (OLED) displays that are current programmed.

BACKGROUND OF THE INVENTION

Maturing of Flat Panel Display (FPD) technologies has provided larger and lower cost laptop monitors, small area/low power panels for cell phones and other portable devices, HDTV and widescreen formats for home television, and high reliability daylight readable displays for “glass cockpits” for aircraft.

Emerging technologies such as organic LEDs (OLED) promise to deliver higher quality emissive flat displays, allowing the removal of the backlight. When compared to LCDs, a thinner form-factor with almost perfect viewing angle and much faster response speed would be provided by OLEDs. Thus the intrinsic characteristics of OLEDs give visual and form factor advantages over LCDs.

A typical array structure of an active matrix organic light-emitting diode (AMOLED) is shown in FIG. 1. The display 100 includes an array of pixels 102 that are arranged in rows and columns. The pixels 102 are connected to the data line 106 via a select transistor 104. The transistor 104 is a thin film transistor (TFT). The data line 106 is driven by a current source 108. The overlap capacitance of the transistors 104 connected to data line 106 and the line capacitance of the data line 106 itself leads to a high parasitic capacitance.

The basic OLED structure for a given pixel 102 consists of a stack of thin organic layers between a transparent anode and a metallic cathode. The organic layers include a hole-injection layer, a hole-transport layer, an emissive layer, and an electron transport layer. When an appropriate voltage is applied to the structure the injected positive and negative charges combine in the emissive layer to product light. OLEDs are therefore self-emissive displays and thus do not require a backlight as is required by LCDs. Also the charge combination process causes very little time delay providing for a fast response time.

OLED displays are current-controlled display devices. LCDs, on the other hand, are voltage-controlled. Current programming provides the OLED with a current that is independent of the characteristics of any other components such as thin film transistors (TFT) or the OLED itself, and compensates for V_t shift, spatial mismatch, and OLED degradation. However, the parasitic capacitance contributed from the line and select transistors connected to the line results in a large settling time. The settling time is a function of the initial line voltage and threshold voltage of the drive TFT. Although, the settling time can be improved partially by pre-charging, the improvement is not sufficient for medium and large area displays.

The parasitic capacitance of the drive transistor and the data line to which it is connected is schematically shown in FIG. 2. In particular FIG. 2 schematically shows the equivalent circuit for a current programmed pixel 202, having a current source 203 and a transistor 204, during a programming cycle. Capacitance C_P 210 and resistance R_P 208 are the parasitic components while capacitance C_S 206 is the capacitance of the storage capacitor. If C_S 206<<C_P 210 and R_P 208 is small, the timing constant, or settling time, of the circuit shown in FIG. 2 is: $\begin{array}{cc}\tau \propto 2\frac{C_p}{\sqrt{i*\beta }}& \left(1\right)\end{array}$

where β is the coefficient in current-voltage (I-V) characteristics of the transistor 204 given by I_ds=β (V_gs−V_th)². Here, I_ds is the drain-source current, V_gs the gate-source voltage, and V_th the threshold voltage.

If the capacitance C_p 210 is a large capacitance, around 40 pf, and β is small for the transistor 204, which is fabricated with amorphous silicon (a-Si), τ is of the order of millisecond. However, the timing budget of the programming cycle is less than 100 μs for large area displays. Since the efficiency of the OLED has been increased, the amount of current required to achieve the maximum brightness is very small; therefore, τ, which is also a function of current, increases dramatically.

This parasitic capacitance thus contributes to a high settling time for current programmed pixels, limiting the timing budget of the programming cycle. This can cause considerable error due to imperfect settling. In order to remove this error, a simple and fast solution for driving the current programmed pixels that is suitable for applications in OLED displays is needed.

United States patent application No. 20040095297A1 to Libsch et al. describes a programming method in which the programming current is controlled by a current sensor. A schematic diagram of the circuit of FIG. 1 of Libsch et al. is shown in FIG. 3. During the programming cycle a current sensor 302 monitors the voltage across resistor R 304 through the feedback 308. The current sensor 302 controls the programming current. After the pixel settles, the current flowing through the resistor R 304 and the OLED 306 is the same as wanted current. Because of the use of feedback 308, this driving method has a fast settling time. However, the drawback of this circuit is that it has a high power consumption resulting from resistor R 304. The resistor R 304 should quite large such that the circuit is able to sense a low current level accurately. Therefore, the power dissipated in resistor R 304 is considerable. The other drawback of this circuit is that it suffers from mismatch. The spatial mismatch changes the value of resistor R 304 causing non-uniformity in the display. It also has the addition feedback 308.

U.S. Pat. No. 6,433,488 to Bu discloses an OLED driver circuit that implements a current comparator in a feedback loop. The circuit presented in FIG. 2 of Bu is schematically presented in FIG. 4. In a programming cycle, SCAN is high so the transistor T2402 is off and the transistor T4404 is on. Therefore, the current flows through the transistor T3406, the OLED 408, and the transistor T1410. A current comparator 412 defines the reference voltage 414 based on comparison result of the pixel current, via feedback line 416, and reference current 418. After the pixel settles, the pixel current 416 is the same as reference current 418. This circuit provides a fast settling time for the pixel because of the use of feedback. However, the circuit has a high power compensation because of the two transistors (T1410 and T2402) in the path of current during the driving cycle, further this method uses four transistors and extra feedback line 416.

Therefore there is a need for a circuit that improves the settling time of the current driven circuit that does not encounter the high power consumption of the known circuits.

SUMMARY OF THE INVENTION

The present invention relates to a circuit for driving an OLED pixel. The invention further relates to a circuit that enables the use of current programmed pixel circuits in large area displays by improving the settling time.

It is an object of the invention to obviate or mitigate at least one shortcoming of circuits for improving time sensitivity of the prior art.

In accordance with one aspect of the invention a load driving circuit for a load having a parasitic capacitance associated therewith and being current programmed is provided. The driving circuit having a data line having a voltage controlling the load, a feedback loop having a lowpass filter for monitoring the voltage of the data line, and a current source for providing a current to the data line; the current source being controlled by a signal line and an output from the lowpass filter.

In accordance with another aspect of the invention a driving circuit for a light emitting diode that is current programmed and having a parasitic capacitance is provided. The driving circuit having a data line controlling the light emitting diode, a low pass filter monitoring the voltage of the data line, and a current source for providing a current to the data line; the current source being controlled by a signal line and an output from the lowpass filter.

In accordance with another aspect of the invention a driving circuit for a light emitting diode that is current programmed and having a parasitic capacitance is provided. The driving circuit comprising a data line controlling the light emitting diode, a feedback loop comprising, an analogue to digital converter, and a controller running an algorithm that provides low pass filter functionality to the feedback loop, and a current source for providing a current to the data line; the current source receiving input from a digital to analogue converter that receives input from the controller.

In accordance with another aspect of the invention a method of driving a light emitting diode in a display, the light emitting diode having a parasitic capacitance and being current programmed is provided. The method comprising the steps of providing a current to the light emitting diode, the current being provided by a current source, monitoring a voltage of a data line providing the current to the light emitting diode with a low pass filter, and mixing the voltage and a data line signal to form an input, providing the input to the current source.

This summary of the invention does not necessarily describe all features of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other features of the invention will become more apparent from the following description in which reference is made to the appended drawings wherein:

FIG. 1 presents a schematic diagram of a pixel array according of the prior art;

FIG. 2 presents a schematic diagram of parasitics associated with a pixel of an OLED based display of the prior art;

FIG. 3 presents a schematic diagram of pixel programming circuit of the prior art;

FIG. 4 presents a schematic diagram of another pixel programming circuit of the prior art;

FIG. 5 presents a schematic diagram of a display drive circuit having a feedback circuit in accordance with an embodiment of the invention;

FIG. 6 presents a schematic diagram of a display drive circuit having a feedback circuit in accordance with another embodiment of the invention;

FIG. 7 presents a schematic diagram of a display drive circuit having a bandpass filter in accordance with another embodiment of the invention;

FIG. 8 a presents a schematic diagram of a bandpass filter in accordance with another embodiment of the invention;

FIG. 8 b presents a schematic diagram of a bandpass filter in accordance with another embodiment of the invention;

FIG. 9 presents curves of settling time in accordance with another embodiment of the invention.

FIG. 10 a presents calculated noise when a high-pass filter is used in accordance with an embodiment of the invention; and

FIG. 10 b presents calculated noise when a low-pass filter is used in accordance with an embodiment of the invention.

DETAILED DESCRIPTION

As outlined in the discussion of FIG. 2 the settling of the time of the current can be larger than that allowed because of the parasitic capacitance. Embodiments of the invention consider the use of a feedback circuit to provide positive feedback to a current source. This feedback allows for an improvement in the settling time of the current allowing current driven displays to have the necessary response times.

A basic feedback circuit according to one embodiment of the invention is shown in FIG. 5. A display drive circuit 502 is used to drive a light-emitting pixel 503. The drive circuit 502 includes a voltage controlled current source (VCCS) 506 and a feedback loop. Within this feedback loop is a filter 504 and a voltage adder 512. The current source 506 is controlled by V_DATA 508 and the output of the filter 504, which monitors the voltage of data line 510. The current source 506, filter 504, and voltage adder 512 are part of the display driver 502 that can be implemented as a separate chip using CMOS technology or as part of a display using on-display TFT technology.

In another embodiment of the invention, shown in FIG. 6, the filter is implemented as a differentiator 602. If the parasitic resistances R_P 604 are small enough and the VCCS 606 is a linear current source, the timing constant for the circuit shown in FIG. 6 is: $\begin{array}{cc}\tau \propto 2\frac{\left(C_p-K\right)}{\sqrt{i*\beta }}& \left(3\right)\end{array}$

Here ‘i’ is the current related to V_DATA 608. K is the coefficient of the differentiator 602 and should be selected close to the parasitic capacitance C_P 610 in order to achieve the desirable results. However, a reasonable difference between K and C_P has no significant effect on the settling time.

The circuit of FIG. 6 can remove the effect of parasitic capacitance 610 and as a result can be used for fast programming of current programmed pixel 612, which is a general schematic that represent functionality of current programmed pixels. It will be apparent to one of skill in the art that the circuit of FIG. 6 can be used with any current-programmed pixel circuits.

A filter circuit according to the currently preferred embodiment is shown in FIG. 7. In this embodiment the display drive circuit 702 uses a bandpass (BP) filter 704 for the feedback function. The drive circuit 702 drives the pixel 703 and manages the effect of parasitic capacitance C_P 706 through the use of positive feedback. At the beginning of the programming cycle, the voltage of the line 708 changes rapidly, and so the VCCS 710 pumps more current into current line 708. As the voltage of the current line 708 settles, the current supplied by the current source 710 goes to a programming current. Also, the band-pass filter 704 mitigates high-frequency noise of the current line 708, which would otherwise influence the output current of the current source 710.

FIG. 8 a presents further detail of the bandpass filter used in display drive circuit 702. A simple filter circuit has been used such that the circuit fits within the pixel pitch of approximately 100 μm. The bandpass filter of FIG. 8A is generally indicated as 803 is implemented as a one-pole lowpass Butterworth filter and a differentiator. In the circuit of FIG. 8a a current conveyer type II (CCII) is used for realization of the driver. The Z terminal 808 is connected directly to the Y terminal 806. Therefore, the voltage of node X 804 follows the voltage of the Z terminal 808 due to a feedback between the Y terminal 806 and the X terminal 804. Also, the capacitor C_PL 810 acts as a low pass filter and mitigates any high frequency noise. The capacitor C_F 812, on the other hand, differentiates the voltage at the X terminal 804, which is equal to the voltage of the line and converts it to a current. The current mirror duplicates this current and adds it to the programming current.

Another implementation of the lowpass filter that uses a digital implementation is presented in FIG. 8b. In this Figure the drive circuit 819 is used to drive pixel 825. The voltage of the line 820 is read back by an ADC 822. The controller 824 block runs an algorithm and changes the current of the current source 826 using the DAC 828. An important aspect of the algorithm run by the controller 824 is the calculation of the difference between the current sample V[n] and the previous sample V[n−1]. With a consideration to this difference the algorithm adjusts the current provided by the current source 826 to speed up the programming.

An analysis of the settling time associated with the circuit of FIG. 8a is shown in FIG. 9. A MATLAB™ model was used to investigate the characteristics of the new current source. To simplify the analysis, the cut-off frequency of the LP filter is considered to be high. Thus, the overdrive voltage of T1 can be written as: $\begin{array}{cc}{I}_P=\left(C_P-C_F\right)\frac{d}{dt}V-V^2& \left(3\right)\end{array}$ where, V is the overdrive voltage of T1, and C_F the gain of differentiator. It is evident that C_F can compensate for the parasitic capacitance.

In FIG. 9 the settling time of the current source 702 that implements a LP filter is less than 40 μs whereas it is 400 μs for the conventional case i.e. the current is provided by the current source with no feedback. It is also evident that increasing the cut-off frequency of the low pass filter makes the driver more sensitive to the noise of the current line. There is however an increase in the speed as the cut-off frequency increases.

FIG. 10 a presents a graph of pixel current over time during the programming cycle when a differentiator or high-pass filter is used. The noise of the line is fed back to the current through the differentiator. This causes the noise to be amplified. Moreover, it can make the driver unstable since the differentiator is highly sensitive to high frequency signals. As is apparent from this graph the noise of the line is amplified and destroys the signal. FIG. 10b presents a graph of pixel current over time during the programming cycle when a low-pass filter is used. The reduced noise is readily apparent when FIG. 10b is compared to FIG. 10a.

The present invention has been described with regard to one or more embodiments. However, it will be apparent to persons skilled in the art that a number of variations and modifications can be made without departing from the scope of the invention as defined in the claims.

Claims

1. A load driving circuit for a load having a parasitic capacitance associated therewith and being current programmed, the driving circuit comprising: a data line having a voltage controlling the load; a feedback loop having a lowpass filter for monitoring the voltage of the data line; and a current source for providing a current to the data line; the current source being controlled by a signal line and an output from the lowpass filter.

2. The load driving circuit according with claim 1 wherein the lowpass filter comprises a so-called Butterworth filter and a differentiator.

3. The load driving circuit according to claim 1 wherein the current source is a voltage controlled current source (VCCS).

4. A driving circuit for a light emitting diode that is current programmed and having a parasitic capacitance, the driving circuit comprising: a data line controlling the light emitting diode; a low pass filter monitoring the voltage of the data line; and a current source for providing a current to the data line; the current source being controlled by a signal line and an output from the lowpass filter.

5. The driving circuit according with claim 4 wherein the lowpass filter comprises a so called Butterworth filter and a differentiator.

6. The driving circuit according to claim 4 wherein the current source is a voltage controlled current source (VCCS).

7. The driving circuit according to claim 4 wherein the light emitting diode is an organic light emitting diode.

8. The driving circuit according to claim 4, wherein an illumination of the light emitting diode is responsive to the current provided by the data line.

9. The driving circuit according to claim 4, wherein the light emitting diode is controlled by a thin film transistor.

10. A driving circuit for a light emitting diode that is current programmed and having a parasitic capacitance, the driving circuit comprising: a data line controlling the light emitting diode; a feedback loop comprising: an analogue to digital converter; and a controller running an algorithm that provides low pass filter functionality to the feedback loop; and a current source for providing a current to the data line; the current source receiving input from a digital to analogue converter that receives input from the controller.

11. The driving circuit according to claim 10 wherein the current source is a voltage controlled current source (VCCS).

12. The driving circuit according to claim 10 wherein the light emitting diode is an organic light emitting diode.

13. A display having an array of pixels each including an organic light emitting diode wherein the diode is driven by a driving circuit according to claim 4.

14. A display having an array of pixels each including an organic light emitting diode wherein the diode is driven by a driving circuit according to claim 10.

15. A method of driving a light emitting diode in a display, the light emitting diode having a parasitic capacitance and being current programmed, the method comprising the steps of: providing a current to the light emitting diode, the current being provided by a current source; monitoring a voltage of a data line providing the current to the light emitting diode with a low pass filter; and mixing the voltage and a data line signal to form an input; providing the input to the current source.

16. The method according to claim 15, wherein the current source is a voltage controlled current source (VCCS).

17. The method according to claim 15, wherein the light emitting diode is an organic light emitting diode.