1. Field of the Invention
This invention relates to a driving circuit for reducing noise of the ceramic capacitors in a plasma display, and more particularly to a driving circuit by changing the amount of the ceramic capacitors and the location thereof to reduce noise of the ceramic capacitors.
2. Description of the Related Art
In recent years, the flat panel display (FPD) has been extensively applied in the electric products such as PDAs (Personal Digital Assistant), mobile phones, and laptops and even the big size display used for the home theaters. The liquid crystal display (LCD) is the mainstream in the FPD market nowadays. However, in the large-size display field, the LCD has limitation with the manufactured process and big size of glass substrate. Therefore, the traditional cathode ray tube (CRT) display still occupies the large-size of display market. However, as the display size of the CRT is getting larger, the weight and the size of CRT are also being increased. Therefore, the plasma display panel (PDP) has advantages with light, thin, and large size, and being expected to become the desired product the large size TV.
AC plasma display panels (PDPs) generate the majority of their emitted light by employed ultraviolet light discharged from plasma generated by a gas discharge driven by high-frequency high-voltage electrode movement to excite visible light emitting phosphors. Hence, in the driving circuits of PDP, ceramic capacitors are largely used for providing the driving voltage for the driving circuit. As shown in the
It is the primary object of the present invention to provide a driving circuit for reducing noise of a ceramic capacitor, which comprises an even number of ceramic capacitors disposed in reverse sequentially so as to reduce the noise.
According to an embodiment of the present invention, a driving circuit for reducing noise of a ceramic capacitor and driving a plasma display, the driving circuit comprises a circuit board, a first switch, a second switch, a first capacitor set, a second capacitor set, and a control switch. The first switch is located on the circuit board and coupled to the second switch at a connecting point. The connecting point is connecting to the plasma display. The first capacitor set is coupled to the first switch and provides a first driving voltage to turn on the first switch. The second capacitor set is coupled to the second switch and provides a second driving voltage turn on the second switch. The control switch controls the first switch and the second switch to carry out a charged and discharged operation. Moreover, the first and the second capacitor sets both comprise an even number of ceramic capacitors subsequently disposed in reverse.
Matched with corresponding drawings, the preferable embodiments of the invention are presented as following and hope they will benefit your esteemed reviewing committee members in reviewing this patent application favorably.
As shown in
In the preferred embodiment of the present invention, the first capacitor set 13 includes an even number of ceramic capacitors that are the first ceramic capacitor C1, the second ceramic capacitor C2, the third ceramic capacitor C3, and the fourth ceramic capacitor C4 connected each other in parallel. The capacitance of the first capacitor set is exactly equal to the sum of the capacitances of the first ceramic capacitor C1, the second ceramic capacitor C2, the third ceramic capacitor C3, and the fourth ceramic capacitor C4. Although there are only four ceramic capacitors showing in the figure, it should be not limited in the four, and the amount of the ceramic capacitor is determined basing on the capacitance required by the circuit. The first, the second, the third, and the fourth ceramic capacitors C1, C2, C3, C4 all have a first terminal 1 and a second terminal 2, and are located in reverse sequentially. In other words, the first terminal 1 of the second ceramic capacitor C2 is located opposite to that of the first ceramic capacitor C1, and the first terminal 1 of the fourth ceramic capacitor C4 is located opposite to that of the third capacitor C3. In addition, a first running wire 81 is provided to connect all the first terminals of the first, the second, the third, and the fourth ceramic capacitors (C1, C2, C3, C4), and a second running wire 82 is provided to connect all the second terminals of ceramic capacitors C1, C2, C3, and C4 thus forming the first capacitor set 13 having the first, the second, the third, and the fourth ceramic capacitors located in reverse sequentially.
When turning on the first switch 11, the first, the second, the third, and the fourth ceramic capacitors (C1, C2, C3, C4) can provide the first driving voltage during a discharged period so as to electrify an interface capacitor (not shown in the figure) of the first switch 11 thus making the interface capacitor of the first switch 11 accumulate sufficient voltage to turn on the first switch 11. At this time, the electric current direction of C1 is the first direction 91 so that the electric current direction of C2 will be the second direction 92, and the electric current direction of C3 is the first direction 91 so that the electric current direction of C4 will be the second direction 92. Moreover, the located mode of these ceramic capacitors can neutralize the mechanical vibration due to the discharging of the ceramic C1, C2, C3, and C4. When the control switch 15 electrifying the first, the second, the third, and the fourth ceramic capacitor, the electric current direction of C1 will be the second direction 92 so that the electric current direction of C2 will be the first direction 91, and electric current direction of C3 will be the second direction 92 so that electric current direction of C4 will be the first direction 91. And also the mechanical vibration due to the electrifying of the ceramic C1, C2, C3, and C4 can be neutralized.
In addition, the second capacitor set 14 includes an even number of ceramic capacitors that are the fifth ceramic capacitor C5, the sixth ceramic capacitor C6, the seventh ceramic capacitor C7, and the eighth ceramic capacitor C8 connected each other in parallel. The capacitance of the second capacitor set is exactly equal to the sum of the capacitances of the fifth ceramic capacitor C5, the sixth ceramic capacitor C6, the seventh ceramic capacitor C7, and the eighth ceramic capacitor C8. The fifth, the sixth, the seventh, and the eighth ceramic capacitors C5, C6, C7, C8 all have a first terminal 1 and a second terminal 2, and are located in reverse sequentially. In other words, the first terminal 1 of the sixth ceramic capacitor C6 is located opposite to that of the fifth ceramic capacitor C5, the first terminal 1 of the seventh ceramic capacitor C7 is located opposite to that of the sixth ceramic capacitor C6, and the first terminal 1 of the eighth ceramic capacitor C8 is located opposite to that of the seventh capacitor C7. In addition, a third running wire 83 is provided to connect all the first terminals of the fifth, the sixth, the seventh, and the eighth ceramic capacitors (C5, C6, C7, C8), and a fourth running wire 84 is provided to connect all the second terminals of ceramic capacitors C5, C6, C7, and C8 thus forming the second capacitor set 14 having the fifth, the sixth, the seventh, and the eighth ceramic capacitors located in reverse sequentially.
When turning on the second switch 12, the fifth, the sixth, the seventh, and the eighth ceramic capacitors (C5, C6, C7, C8) can provide the second driving voltage during a discharged period so as to electrify an interface capacitor (not shown in the figure) of the second switch 12 thus making the interface capacitor of the second switch 12 accumulate sufficient voltage to turn on the second switch 12. At this time, the electric current direction of C5 is the first direction 91 so that the electric current direction of C6 will be the second direction 92, and the electric current direction of C7 is the first direction 91 so that the electric current direction of C8 will be the second direction 92. In the second capacitor set 14, the located mode of these ceramic capacitors can neutralize each other the mechanical vibration due to the discharging of the ceramic C5, C6, C7, and C8. When the control switch 15 electrifying the fifth, the sixth, the seventh, and the eighth ceramic capacitor, the electric current direction of C5 will be the second direction 92 so that the electric current direction of C6 will be the first direction 91, and electric current direction of C7 will be the second direction 92 so that electric current direction of C8 will be the first direction 91. And also the mechanical vibration due to the electrifying of the ceramic C1, C2, C3, and C4 can be neutralized each other. The noise and mechanical vibration due to high-frequency charged and discharged operations of the ceramic capacitors can be eliminated by the above mentioned circuit.
While the preferred embodiment of the invention has been set forth for the purpose of disclosure, modifications of the disclosed embodiment of the invention as well as other embodiments thereof may occur to those skilled in the art. Accordingly, the appended claims are intended to cover all embodiments which do not depart from the spirit and scope of the invention.
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6066860 | Katayama et al. | May 2000 | A |
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Number | Date | Country | |
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20060273991 A1 | Dec 2006 | US |