The present invention generally relates to liquid crystal display devices and more particularly to the driving of an active-matrix liquid crystal display device in which representation of images is achieved by applying a driving voltage to a liquid crystal layer via a thin-film transistor (TFT).
Liquid crystal display devices have various advantageous features such as compact size, light weight, low power consumption, and the like. Thus, liquid crystal display devices are used extensively in portable information processing apparatuses such as lap-top computers or palm-top computers. Further, liquid crystal display devises are used also in desktop computers in these days.
A typical liquid crystal display device includes a liquid crystal layer confined between a pair of glass substrates and achieves representation of images by inducing a change in the orientation of liquid crystal molecules in the liquid crystal layer by applying a driving voltage to the liquid crystal layer. Such a change in the orientation of the liquid crystal molecules causes a change in the optical property of the liquid crystal layer.
In the case of using such a liquid crystal display device in a high-resolution color representation apparatus, there is a need of driving the individual pixels or liquid crystal cells defined in the liquid crystal layer at a high speed. In order to meet this requirement, it is generally practiced to provide a thin-film transistor in correspondence to each of the pixels in the liquid crystal layer and to drive the liquid crystal cells by way of such thin-film transistors.
Referring to
As represented in the plan view of
It should be noted that the data bus lines D1 and D2 are covered by another insulation film 13 as represented in the cross-sectional view of
Further, there is provided a rectangular pixel electrode of a transparent conductor such as ITO on the insulation film 13 in correspondence to the drain region of each of the thin-film transistors. For example, the drain region of the thin-film transistor 111 is connected to a transparent pixel electrode P1 provided on the insulation film 13 via a contact hole formed in the insulation film 13. As can be seen from
Further, each of the transparent pixel electrodes P1 and P2 is covered by a molecular alignment film 14, wherein the molecular alignment film 14, contacting directly with the liquid crystal layer 10C, induces an alignment of the liquid crystal molecules in the liquid crystal layer 10C in a predetermined direction.
The opposing substrate 10B, on the other hand, carries a color filter CF in correspondence to the foregoing transparent pixel electrode P1 or P2, and a transparent opposing electrode 15 of ITO, and the like, is provided uniformly on the substrate 10B. It should be noted that the transparent opposing electrode 15 is covered by another molecular alignment film 16, and the molecular alignment film 16 induces an alignment of the liquid crystal molecules in the liquid crystal layer 10C in a desired direction. Further, the substrate 10B carries thereon an opaque mask BM in correspondence to a gap between a color filter CF and an adjacent color filter CF.
Referring to
It should be noted that the foregoing D.C. voltage source for supplying the common voltage VCs is provided as an independent unit independent from the driving circuit used for driving the data bus line D1 or D2. The D.C. voltage source provides a voltage of ΔVc as the foregoing common voltage VCs, wherein the common voltage VCs thus set is slightly offset from the central voltage Vc of the bipolar driving pulse signal. It should be noted that the liquid crystal panel 10 of
In the liquid crystal panel 10 driven as such, it should be noted that the optimum common voltage VCs changes slightly between the black representation mode and the white representation mode. More specifically, the optimum common voltage VCs coincides substantially with the central voltage Vc of the bipolar driving pulse signal (ΔVc=0) in the black representation mode, while the optimum common voltage deviates from the central voltage Vc (ΔVc≠0) in the half-tone or white representation mode. As the common voltage VCs is applied uniformly to the opposing electrode 15, it is difficult to change the common voltage adaptively depending on the content of the image to be represented. Thus, it has been practiced to fix the common voltage VCs to the optimum voltage at the time of the half-tone representation mode.
Meanwhile, the inventor of the present invention has noticed, in a liquid crystal panel using a low voltage liquid crystal for the liquid crystal layer 10C, that there appears a noticeable flicker in the represented images along the edge part of the auxiliary electrode Cs. In the investigation that constitutes the foundation of the present invention, the inventor has studied this phenomenon and discovered that the flicker is caused as a result of variation of the disclination which is induced in the liquid crystal layer 10C in the region including the data bus line D1 or D2 and the auxiliary electrode Cs by a strong lateral electric field.
Referring to
In the state of
Further, the inventor of the present invention has discovered that there occurs a flow of the liquid molecules in the liquid crystal layer 10C in the rubbing direction of the molecular alignment film when the value of the common voltage VCs of the auxiliary electrode Cs is deviated from the central voltage of the bipolar driving pulse signal. When such a flow occurs in the liquid crystal layer 10C, there occurs an increase in the thickness of the liquid crystal layer 10C in correspondence to the part where the liquid crystal molecules are accumulated. When there occurs such a change in the thickness of the liquid crystal layer 10C, the optical property of the liquid crystal panel 10 is modulated also.
Further, in the case a low-voltage liquid crystal is used for the liquid crystal layer 10C, there tends to occur a sticking of images as a result of the accumulation of impurity ions associated with the flow of the liquid crystal molecules. It should be noted that such a low-voltage liquid crystal, characterized by a low driving voltage, is particularly vulnerable to contamination.
Accordingly, it is a general object of the present invention to provide a novel and useful driving method of a liquid crystal display device wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a method of driving a liquid crystal display device, said liquid crystal display device comprising: a first substrate; a second substrate opposing said first substrate with a gap therebetween; a liquid crystal layer confined in said gap; a thin-film transistor formed on said first substrate; a conductor pattern formed on said first substrate in electrical connection with said thin-film transistor, said conductor pattern supplying an alternate-current driving voltage signal to said thin-film transistor; a pixel electrode provided on said first substrate in electrical connection to said thin-film transistor; an auxiliary electrode formed on said first substrate in the vicinity of said conductor pattern so as to form an auxiliary capacitance with said pixel electrode, said auxiliary electrode being disposed so as to induce a lateral electric field between said auxiliary electrode and said conductor pattern; and an opposing electrode formed on said second substrate;
said method comprising the step of:
applying to said auxiliary electrode a common voltage substantially equal to a central voltage of said alternate-current driving voltage signal.
Other objects and further features of the present invention will become apparent from the following detailed description when read in conjunction with the attached drawings.
[First Embodiment]
Referring to
The liquid crystal display device 20 of
In the present invention, the inventor has discovered that the formation of the disclination becomes substantially the same in the state in which a driving voltage pulse of +5V is applied to the selected data bus line D1-Dm and in the state in which a driving voltage pulse of −5V is applied to the selected data bus line D1-Dm, by setting the common voltage VCs supplied from the common voltage source 23, to be equal to the central voltage (0V) of the bipolar driving voltage pulse signal. As a result, although the leakage of the light itself is not eliminated, the flicker of the leakage light is successfully eliminated. Further, it was discovered that, by setting the voltage VCs as set forth above, the sticking of images caused as a result of the flow of the liquid crystal molecules in the liquid crystal layer 11C, is also suppressed successfully.
Referring to
Further, as a result of the reduced disclination formation in the liquid crystal layer 10C caused by the foregoing setting of the common voltage VCs, the flow of the liquid crystal molecules is also reduced. As a result, the problem of thickness increase in the liquid crystal layer 10C and associated problem of local accumulation of the impurity ions in the liquid crystal layer 10C are effectively reduced. Thus, the present invention reduces the sticking of images in the liquid crystal display device 20 of
DF=(Bp−Bn)/Bp×100(Bp>Bn),
where Bp represents the leakage of light during the positive frame interval in which a positive drive voltage pulse of +5V is applied, while Bn represents the leakage of light during the negative frame interval in which a negative drive voltage pulse of −5V is applied. Further,
Referring to
In
From the foregoing, it is preferable to set the common voltage VCs in the region B in which the deviation ΔVC with respect to the amplitude center of the bipolar driving pulse voltage signal is less than about 50% of the maximum voltage amplitude for the black representation mode, more preferably in the region A in which the deviation ΔVC is less than about 10%. In the region B, it should be noted that the liquid crystal molecules in the liquid crystal layer 10C moves over a distance of 80 μm or less during the interval of 24 hours.
It should be noted that the foregoing result is not only pertinent to the liquid crystal panel of the 12-inch size but is applicable also to general liquid crystal panels having a diagonal size of 10-13 inches.
[Second Embodiment]
In the foregoing embodiment, it was assumed that the drive voltage pulse signal supplied to the data bus lines D1-Dm is a bipolar voltage pulse having a central voltage of 0V. The present invention, however, is never limited to such a particular driving signal but is applicable to the case in which the driving voltage pulse signal includes a D.C. voltage offset as represented in FIG. 8.
Referring to
In the driving process noted above, it should be noted that the optimum common voltage VCs may be different in the black representation mode and in the white representation mode. In the example of
In view of the fact that the common voltage VCs is applied to the entirety of the liquid crystal panel, it is difficult to change the optimum common voltage VCs adaptively depending on the gradation level to be represented. In the present invention, therefore, the optimum common voltage VCs is optimized for the black representation mode in which the flow of the liquid crystal molecules in the liquid crystal layer 10C appears most significantly.
In the description heretofore, the present invention is described with reference to the so-called H-type Cs liquid crystal panel represented in
Further, the present invention is not limited to the embodiments described heretofore, but various variations and modifications may be made without departing from the scope of the invention.
Number | Date | Country | Kind |
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10-374813 | Dec 1998 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
5185601 | Takeda et al. | Feb 1993 | A |
5426447 | Lee | Jun 1995 | A |
5483263 | Bird et al. | Jan 1996 | A |
5610736 | Asai | Mar 1997 | A |
5614730 | Nakazawa et al. | Mar 1997 | A |
5828356 | Stoller | Oct 1998 | A |
5936598 | Hayama et al. | Aug 1999 | A |
5943106 | Sukenori et al. | Aug 1999 | A |
6005646 | Nakamura et al. | Dec 1999 | A |
6064460 | Ohta et al. | May 2000 | A |
6476901 | Fujioka et al. | Nov 2002 | B2 |
6504594 | Ohe et al. | Jan 2003 | B2 |
6507045 | Gu et al. | Jan 2003 | B2 |
Number | Date | Country | |
---|---|---|---|
20030071774 A1 | Apr 2003 | US |