Driving system for driving AC motor

BACKGROUND OF THE INVENTION

The present invention relates to an AC motor driving system for driving a multi-phase AC motor using a plurality of inverters, and more particularly, to a controller for controlling the inverters.

Generally, a motor driving system is comprised of a power converter and a controller for controlling the power converter. For realizing a large capacity motor driving system, it is necessary to increase the capacity of the power converter. One method of realizing a large capacity motor drive involves driving a set of plural power converters in parallel and supplying the sum of output power of the respective converters to an AC motor.

For operating a set of converters in parallel, there are two alternative methods. In one method, each converter is connected to a motor through a reactor or an interphase reactor. In the other method, a multi-winding motor is used such that one converter is connected to a set of windings of the multi-winding motor. The respective converters are electrically coupled in the former case, and magnetically coupled in the latter case. Due to the existence of such coupling, an unwanted circular current flows between the converters through this coupling if a voltage difference is caused by variations in switching characteristics (for example, a turn-off characteristic) of switching elements which form parts of the respective converters. This circular current is also called “inter-inverter cross current” or simply “cross current.” In the following description, the designation “cross current” will only be used.

A control method for effectively suppressing the cross current is described, for example, in JP-A-3-253293. The described method controls a current adjuster for controlling output currents of power converters such that a control gain for the sum of output currents of the respective power converters is able to differ from a control gain for an unbalanced current of each converter, i.e., a cross current. In this way, a control response to the cross current can be set independently of a control response to the sum of the output currents of the respective converters. Advantageously, the cross current can be suppressed with an appropriate control gain, and reactors with smaller inductance may be employed in consequence.

However, the characteristics and configuration of the control described in the foregoing prior art may be detailed as follows. [1] When the control gain for the sum of output currents is completely independent of the control gain for the cross current, the control configuration is complicated. [2] When there is a certain restriction between the control gain for the sum of output currents and the control gain for the cross current (for example, the latter can take only one half of the former), the control configuration is simplified.

Stated another way, with the control configuration described in the prior art, when an attempt is made to set the control gain for the sum of output currents independently of the control gain for the cross current, the control configuration inevitably becomes complicated. Therefore, if a microcomputer or a digital processor is used to execute the control, a longer time will be required for the processing. This results in a larger time delay and a reduction in stability margin, thereby giving rise to a problem in that the control gain cannot be increased and control response characteristics and disturbance suppression characteristics of the control system are degraded. Taking a motor driving system for an elevator as an example, a degraded disturbance suppression characteristic would cause increased high harmonic components in an inverter output current which act as torque ripple of a motor and bring about vibrations while the elevator is running.

Further, as another problem encountered when the control gain for the sum of output currents is set independently of the control gain for the cross current, the prior art control configuration suffers from difficulties in promptly switching to an individual inverter operation mode due to the complicated control configuration. For example, when one of two inverters operated in parallel fails, it is necessary to promptly switch the motor driving system to a mode in which the failed inverter is stopped, and the operation is continued with the remaining inverter. However, since the complicated control configuration described in the prior art results in a long time required for changing to the individual inverter operation mode, even the normal inverter is likely to end up in a failure due to an overcurrent or the like. In other words, the prior art control configuration is disadvantageous in that it is susceptible to a failure which has occurred in the system.

However, if the control configuration is simplified in order to avoid the two problems, a restriction imposed to the control gain for the sum of output currents and the control gain for the cross current would give rise to grave problems in that smaller reactors cannot be employed, the maximum output is reduced, and the power factor and efficiency are degraded.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a motor driving system in a simple control configuration which is based on the control principles that allow a control gain for the sum of output currents to be set independently of a control gain for a cross current. It should be noted that the sum of output currents is equal to a motor current, so that an expression “a control gain for a motor current can be set independently of a control gain for a cross current” is used in the following description.

To achieve the above object, in a control processing system for deriving a control instruction for each of a plurality of power converters, the control processing system comprises a plurality of current compensation units connected in parallel. Each of the plurality of current compensation units makes compensation to reduce a deviation of detected output current values of the plurality of current converters from current instruction values to be outputted from the power converters to zero. Also, a control instruction is generated for the power converter by summing outputs of the parallel current compensation units associated therewith.

With the configuration of the control processing system as described above, a control for motor currents can be performed independently of a control for cross currents in principle provided that compensation gains of the current compensation units satisfy certain conditions. Further, because of a simple control configuration, even when the control is implemented by a microcomputer or a digital processor, the processing will not take a long time, so that a control gain can be increased. Also, by stopping some of the plurality of parallel current compensation units, a prompt switching to an individual inverter operation mode can be achieved.

According to the present invention, when a plurality of inverters are operated in sets in parallel configuration to drive one motor, a control processing system associated with each of the inverters is comprised of a plurality of parallel current compensators divided into local compensators and remote compensators. With this configuration, it is possible to independently carry out suppression of cross currents flowing between the inverters through electric coupling or magnetic coupling and appropriate control for motor currents. Additionally, since the control configuration is simple as compared with the prior art control configuration having similar effects, assuming that the control processing systems are implemented by a microcomputer or a digital processor, a processing time can be reduced, i.e., a time delay is reduced, thus leading to a larger stability margin of the control system, and a higher compensation gains of the compensators, as compared with the prior art. This results in improved instruction response characteristics and disturbance suppression characteristics of the control system, and further suppression of torque ripple occurring in the motor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1

is a diagram illustrating the configuration of a motor driver according to a first embodiment of the present invention;

FIGS. 2A

,

2

B are equivalent circuits of an inverter set parallel operation system;

FIG. 3

is a diagram illustrating the configuration of a motor driver according to a second embodiment of the present invention;

FIG. 4

is a diagram illustrating the configuration of a motor driver according to a third embodiment of the present invention;

FIG. 5

is a diagram illustrating the configuration of a motor driver according to a fourth embodiment of the present invention;

FIG. 6

is a diagram illustrating the configuration of a motor driver according to a fifth embodiment of the present invention;

FIG. 7

is a diagram illustrating the configuration of a motor driver according to a sixth embodiment of the present invention;

FIG. 8

is a diagram illustrating the configuration of a motor driver according to a seventh embodiment of the present invention;

FIG. 9

is a diagram illustrating the configuration of a motor driver according to an eighth embodiment of the present invention;

FIG. 10

is a diagram illustrating the configuration of a motor driver according to a ninth embodiment of the present invention;

FIG. 11

is a diagram illustrating the configuration of a motor driver according to a tenth embodiment of the present invention;

FIGS. 12A

,

12

B are conceptual diagrams illustrating an ideal control method on equivalent circuits of an inverter set parallel operation system.

DETAILED DESCRIPTION OF EMBODIMENTS

Embodiments of the present invention will hereinafter be described with reference to the accompanying drawings.

FIG. 1

is a diagram illustrating the configuration of an AC motor driver to which the present invention is applied. The motor driver comprises a set of inverters connected in parallel which is formed of a system for supplying power to an AC motor

3

from an inverter

1

A through power lines

2

A and reactors

4

A, and a system for supplying power to the AC motor

3

from an inverter

1

B through power lines

2

B and reactors

4

B. In the following, the system comprised of the inverter

1

A, power lines

2

A, reactors

4

A and a control processing subsystem associated with control instructions to the inverter

1

A is called the A-system, while the system comprised of the inverter

1

B, power lines

2

B, reactors

4

B and a control processing subsystem associated with control instructions to the inverter

1

B is called the B-system.

Each of the A-system inverter

1

A and the B-system inverter

1

B is constructed using a semiconductor switching device such as IGBT (Insulated Gate Bipolar Transistor) or GTO (Gate Turn Off thyristor) to output three-phase AC voltages based on control instructions from the A-system control processing subsystem or the B-system control processing subsystem, respectively.

The A-system control processing subsystem comprises two parallel current control sequences. One of the sequences is comprised of current sensors

5

A for detecting output currents of the A-system inverter

1

A; subtractors

6

A each for taking a deviation of a current value detected by each of the current sensors

5

A from a current indicated by an inverter current instruction; and A-system local current compensators

7

A, each of which act to reduce the deviation to zero. The other sequence is comprised of current sensors

5

B for detecting output currents of the B-system inverter

1

B; subtractors

8

A each for taking a deviation of a current value detected by each of the current sensors

5

B from a current indicated by an inverter current instruction; and A-system remote current compensators

9

A, each of which acts to reduce the deviation to zero. Respective outputs of the two parallel current control sequences are added by adders

10

A, and the resulting sums serve as voltage instructions for the A-system inverter

1

A. A PWM (Pulse Width Modulation) controller

11

A converts the voltage instructions to a gate instruction which is outputted to the A-system inverter

1

A. Each of the A-system local current compensators

7

A and the A-system remote current compensators

9

A may be implemented by a proportional-integral compensator or a proportional compensator.

The B-system control processing subsystem is configured symmetric to the A-system control processing subsystem. The B-system control processing subsystem also comprises two parallel current control sequences. One of the sequences is comprised of current sensors

5

B for detecting output currents of the B-system inverter

1

B; subtractors

6

B each for taking a deviation of a current value detected by each of the current sensors

5

B from a current indicated by an inverter current instruction; and B-system local current compensators

7

B, each of which acts to reduce the deviation to zero. The other one is comprised of current sensors

5

A for detecting output currents of the A-system inverter

1

A; subtractors

8

B each for taking a deviation a current value detected by each of the current sensor

5

A from a current indicated by an inverter current instruction; and B-system remote current compensators

9

B, each of which acts to reduce the deviation to zero. Respective outputs of the two parallel current control sequences are added by adders

10

B, and the resulting sums serve as voltage instructions for the B-system inverter

1

B. A PWM controller

11

B converts the voltage instructions to a gate instruction which is outputted to the B-system inverter

1

B. Each of the B-system local current compensators

7

B and the B-system remote current compensators

9

B may be implemented by a proportional-integral compensator or a proportional compensator.

In this embodiment, both the A-system control processing subsystem and the B-system control processing subsystem comprise two parallel current control sequences, i.e., a sequence associated with the local current compensators

7

A or

7

B, and a sequence associated with the remote current compensators

9

A or

9

B, and are characterized in that they can control motor currents and an inter-inverter cross currents independently of each other in a simple control configuration as compared with the prior art.

Next, the operation in the A-system and B-system control processing subsystems will be described.

Reference is first made to the operation in the A-system control processing subsystem. In the sequence associated with the local current compensators of the two parallel current control sequences in the A-system control processing subsystem, the subtractors

6

A takes deviations of A-system currents i

AU

, i

AV

, i

AW

detected by the current sensors

5

A from current instructions i

iu

*, i

iv

*, i

iw

* which should be outputted from the inverter

1

A, and the A-system local current compensators

7

A act to approach the deviations to zero. In other words, the A-system local current compensators

7

A generate outputs which act such that the A-system currents i

AU

, i

AV

, i

AW

approach to the current instructions i

iu

*, i

iv

*, i

iw

*, respectively. On the other hand, in the sequence associated with the remote current compensators, the subtractors

6

B take deviations of B-system currents i

BU

, i

BV

, i

BW

detected by the current sensors

5

B from current instructions i

iu

*, i

iv

*, i

iw

* which should be outputted from the inverter

1

B, and the A-system remote current compensators

8

A act to approach the deviations to zero. In other words, the A-system remote current compensators

8

A generate outputs which act such that the B-system currents i

BU

, i

BV

, i

BW

approach to the current instructions i

iu

*, i

iv

*, i

iw

*, respectively. Therefore, voltage instructions V

AU

*, V

AV

*, V

AW

* for the A-system inverter

1

A, generated by adding the outputs of the A-system local current compensators

7

A and the outputs of the B-system remote current compensators

8

A, are adjusted in such a manner that the A-system inverter currents follow the current instructions, and simultaneously adjusted in such a manner that the B-system inverter currents also follow the current instructions. As a result, as later described in detail, voltage outputs of the A-system inverter are adjusted to independently control currents flowing into the AC motor

3

to desired values and cross currents between the A-system and B-system inverters to zero, respectively.

Since the operation in the B-system control processing subsystem is in a symmetric relationship with the operation in the A-system control processing subsystem, description thereon is omitted. Likewise, in the B-system control processing subsystem, the two parallel current control sequences act to adjust voltage instructions v

BU

*, v

BV

*, v

BW

* for the B-system inverter

1

B such that B-system inverter currents follow current instructions, and simultaneously the A-system inverter currents also follow current instructions.

As described above, the A-system control processing subsystem and the B-system control processing subsystem together attempt to control the local and remote currents to match the current instructions, respectively, with the result that the motor currents are controlled to predetermined values, and the inter-inverter cross currents can be suppressed to zero. Moreover, since these control capabilities can be set independently of each other, it is possible to reduce inductance valve in reactor constants.

Next, the basis on which the control as described can be accomplished will be described in greater detail with reference to equivalent circuits.

FIGS. 2A

,

2

B illustrate equivalent circuits of the inverter set parallel operation system as illustrated in FIG.

1

. For simplifying the illustration, the equivalent circuits illustrate single-phase circuits. The equivalent circuits include two circuits, i.e., an independent motor current circuit (

FIG. 2A

) and a cross current circuit (FIG.

2

B).

The motor current circuit represents a circuit for supplying a current to a motor. This motor current circuit uses the sum v

m

of an output voltage v

A

of the A-system inverter

1

A and an output voltage v

B

of the B-system inverter

1

B (v

m

=v

A

+v

B

) as a voltage source, and supplies a current to a reactor circuit element and a motor circuit element. The current is the sum i

m

of an output current i

A

of the A-system inverter

1

A and an output current i

B

of the B-system inverter

1

B (i

m

=i

A

+i

B

).

The cross current circuit represents a circuit associated with a cross current which does not flow into the motor but flows between the inverters. The illustrated cross current circuit uses a difference v

C

between the output voltage v

A

of the A-system inverter

1

A and the output voltage v

B

of the B-system inverter

1

B (v

C

=v

A

−v

B

) as a voltage source, and supplies a current only through a reactor element. This current is a difference i

C

between the output current i

A

of the A-system inverter

1

A and an output current i

B

of the B-system inverter

1

B (i

C

=v

A

−i

B

). It is this current i

C

which corresponds to the cross current. The voltage difference v

C

would not occur if the A-system and B-system inverters were constructed using ideal switches. Actually, however, switches used therefor exhibit variations in characteristics, so that the voltage difference v

C

occurs to cause the flow of the cross current i

C

. It can be said that this is the mechanism of the generation of the cross current.

An ideal control method for an inverter set parallel operation system would involve controlling the motor current circuit and the cross current circuit on the equivalent circuits illustrated in

FIGS. 2A

,

2

B independently of each other.

FIGS. 12A

,

12

B conceptually represent the ideal control method. The control of the motor current circuit is represented by a block for controlling the voltage v

m

to match the motor current i

m

with a motor current instruction i

m

*. The control of the cross current circuit is represented by a block for controlling the voltage v

C

to suppress the cross current i

C

to zero. In this configuration, a motor current compensator and a cross current compensator are each implemented as a proportional compensator, and are characterized in that they can set a proportional gain K

m

and a proportional gain K

C

to different values, respectively. In this way, even if inductance valve in reactor constants are set to an arbitrary value, appropriate proportional gains can be set in accordance with respective circuit constants for both control of the motor current circuit and control of the cross current circuit. It is therefore possible to simultaneously realize a reduction in the inductance valve in reactor constants, an appropriate control of the motor current, and suppression of the cross current.

Control equations for the motor current control sequence and the cross current control sequence in

FIGS. 12A

,

12

B are expressed as follows:

v

m

*=K

m

(

i

m

*−i

m

) (1)

v

C

*=K

C

(0−

i

C

) (2)

Here, from

v

m

*=v

A

*+v

B

, v

C

*=v

A

*−v

B

*, i

m

=i

A

+i

B

*, i

m

=i

A

+i

B

, i

C

=i

A

−B

, the equations (1), (2) can be transformed as follows:

v

A

*+v

B

*=K

m

{i

m

*−(

i

A

+i

B

)} (3)

v

A

*−v

B

*=K

C

{0−(

i

A

−i

B

)} (4)

Next, the fact that the control processing subsystems in

FIG. 1

satisfy the equations (3), (4), and conditions for that will be derived.

In the control processing subsystems in

FIG. 1

, a control equation for the A-system control processing subsystem is expressed as follows:

v

A

*=K

x

(

i

i

*−i

A

)+

K

y

(

i

i

*−i

B

) (5)

It should be noted herein that the control equation (5) is represented in a single-phase form, and proportional compensators are used for the A-system local current compensator

7

A and the A-system remote current compensator

9

A, where their proportional gains are represented by K

x

, K

y

, respectively.

On the other hand, a control equation for the B-system control processing subsystem is expressed as follows:

v

B

*=K

x

(

i

i

*−i

B

)+

K

y

(

i

i

*−i

A

) (6)

Likewise, the control equation (6) is represented in a single-phase form, and proportional compensators are used for the B-system local current compensator

7

B and the B-system remote current compensator

9

B, wherein their proportional gains are represented by K

x

, K

y

, respectively.

Now, the equations (5), (6) are transformed to derive the following equations (7), (8):

v

A

*+v

B

*=(

K

x

+K

y

){2

i

i

*−(

i

A

+i

B

)} (7)

v

A

*−v

B

*=(

K

x

−K

y

){0−(

i

A

−i

B

)} (8)

In order that the equations (7), (8) are equal to the equations (3), (4), the following conditions should be satisfied:

K

x

+K

y

=K

m

(9)

K

x

−K

y

=K

C

(10)

2

i

i

*=i

m*

(11)

The above equations are rewritten to express K

x

, K

y

, i

i

* as follows:

\begin{matrix} K_{x} = \frac{K_{m} + K_{c}}{2} & (12) \\ K_{y} = \frac{K_{m} - K_{c}}{2} & (13) \\ i_{i}^{*} = \frac{i_{m}^{*}}{2} & (14) \end{matrix}

In conclusion, when the compensation gain K

X

of the local current compensator, the compensation gain K

y

of the remote current compensator, and the inverter current instruction i

i

* are set to satisfy the equations (9), (10), (11) or the equations (12), (13), (14) for the control processing subsystems illustrated in

FIG. 1

, the control equivalently illustrated in

FIGS. 12A

,

12

B can be implemented. Thus, the control processing subsystems illustrated in

FIG. 1

, which satisfy the equations (9), (10), (11) or the equations (12), (13), (14), can realize the effects similar to the control represented in

FIGS. 12A

,

12

B, i.e., the following three effects simultaneously: a reduction in the inductance valve in reactor constants, an appropriate control of the motor current, and suppression of the cross current.

Further, the control processing subsystems illustrated in

FIG. 1

are simple in configuration as compared with a conventional control configuration which has similar effects. Therefore, assuming that the control processing subsystems are implemented by a microcomputer or a digital processor, a processing time can be reduced, thus leading to a reduction in a useless time delay, an increase in stability margin of the control system, and an increase in the compensation gains of the compensators, as compared with the prior art. This results in improved instruction response characteristics and disturbance suppression characteristics of the control system. In an AC motor driving system for an elevator, for example, torque ripple generated in a motor can be further suppressed to improve the riding quality of the elevator.

In addition, the control processing sub-systems in

FIG. 1

can readily switch to an individual operation mode, when an inverter in one system fails, so that the remaining system only can be relied on to continue the operation. For example, assuming in

FIG. 1

that the B-system inverter

1

B fails, a gate stop instruction is outputted, for example, to the PWM controller

11

B to stop the B-system inverter

1

B, and simultaneously the output of the A-system remote current compensator

9

A is stopped, whereby the system can readily transition to a mode in which the A-system inverter

1

A is operated alone. Consequently, it is possible to promptly limit the influence due to the failed inverter in the one system and accordingly realize a system which is immune to a failure. Here, upon determining the occurrence of a failure in the B-system on the A-system side, for example, a gate stop instruction for the B-system inverter

1

B may also be transmitted to the A-system as a B-system failure detection signal. Alternatively, the occurrence of a failure may be determined from the value of a detected current in the B-system inverter

1

B used in the A-system. The former is advantageous in that a prompt failure determination can be made, while the latter is advantageous in that transmitter means are eliminated.

In summarizing the foregoing, the control processing subsystems of

FIG. 1

which satisfy the equations (9), (10), (11) or the equations (12), (13), (14) provide the following effects. [1] By virtue of the reduction in the reactor constants, the appropriate control for the motor current, and the suppression of the cross current, smaller inductance valve in reactor constants and a suppressed cross current can be simultaneously accomplished, thereby providing such effects as an increased maximum output, an improved power factor and a higher efficiency. [2] A simple configuration of the control processing subsystems allows increased compensation gains of the compensators, and improved instruction response characteristics and disturbance suppression characteristics of the control system. [3] Since a switching to the individual operation mode can be readily carried out, it is possible to realize a system immune to a failure, which can promptly limit the influence resulting from a failure.

FIG. 3

illustrates a second embodiment of an AC motor driver to which the present invention is applied. In

FIG. 3

, the same reference numerals as those in

FIG. 1

designate the same components. The configuration in

FIG. 3

differs from the configuration in

FIG. 1

in that the former additionally comprises a coordinate converter

12

A for detected output current values of the A-system inverter

1

A; a coordinate converter

12

B for detected output current values of the B-system inverter

1

B; a coordinate converter

13

A for voltage instructions of the A-system inverter

1

A; and a coordinate converter

13

B for voltage instructions of the B-system inverter

1

B.

The coordinate converter

12

A converts detected output current values i

AU

, i

AV

, i

AW

of the A-system inverter

1

A to an excited current component i

Ad

and a torque current component i

Aq

in a rotating magnetic field coordinate system. The operation performed by the coordinate converter

12

A is expressed by the following equation (15):

\begin{matrix} [\begin{matrix} i_{Bd} \\ i_{Bq} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} \cos ω t & \sin ω t \\ - \sin ω t & \cos ω t \end{matrix}] [\begin{matrix} 1 & - 1 / 2 & - 1 / 2 \\ 0 & \sqrt{3} / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} i_{Bu} \\ i_{Bv} \\ i_{Bw} \end{matrix}] & (15) \end{matrix}

where ω represents a primary angular frequency.

The coordinate converter

12

B converts detected output current values i

BU

, i

BV

, i

BW

of the B-system inverter

1

B to an excited current component i

Bd

and a torque current component i

Bq

in the rotating magnetic field coordinate system. The operation performed by the coordinate converter

12

B is expressed by the following equation (16):

\begin{matrix} [\begin{matrix} V_{Au}^{*} \\ V_{Av}^{*} \\ V_{Aw}^{*} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} 1 & 0 \\ - 1 / 2 & \sqrt{3} / 2 \\ - 1 / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} \cos ω t & - \sin ω t \\ \sin ω t & \cos ω t \end{matrix}] [\begin{matrix} V_{Ad}^{*} \\ V_{Aq}^{*} \end{matrix}] & (16) \end{matrix}

where ω represents a primary angular frequency.

The coordinate converter

13

A converts output voltage instruction values v

Ad

*, v

Aq

* of the A-system inverter

1

A to three-phase AC voltage instructions v

AU

*, v

AV

*, v

AW

*. The operation performed by the coordinate converter

13

A is expressed by the following equation (17):

\begin{matrix} [\begin{matrix} i_{Ad} \\ i_{Aq} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} \cos ω t & \sin ω t \\ - \sin ω t & \cos ω t \end{matrix}] [\begin{matrix} 1 & - 1 / 2 & - 1 / 2 \\ 0 & \sqrt{3} / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} i_{Au} \\ i_{Av} \\ i_{Aw} \end{matrix}] & (17) \end{matrix}

where ω represents a primary angular frequency.

The coordinate converter

13

B converts output voltage instruction values v

Bd

*, v

Bq

* of the B-system inverter

1

B to three-phase AC voltage instructions v

BU

*, v

BV

*, v

BW

*. The operation performed by the coordinate converter

13

B is expressed by the following equation (18):

\begin{matrix} [\begin{matrix} V_{Bu}^{*} \\ V_{Bv}^{*} \\ V_{Bw}^{*} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} 1 & 0 \\ - 1 / 2 & \sqrt{3} / 2 \\ - 1 / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} \cos ω t & - \sin ω t \\ \sin ω t & \cos ω t \end{matrix}] [\begin{matrix} V_{Bd}^{*} \\ V_{Bq}^{*} \end{matrix}] & (18) \end{matrix}

where ω represents a primary angular frequency.

In the configuration of

FIG. 3

, the coordinate converters

12

A,

12

B act to convert basic wave components of the inverter output currents to direct current signals. As a result, when a proportional-integral compensation is performed in the local current compensators

7

A,

7

B and the remote current compensators

9

A,

9

B, a gain for a deviation (converted to direct current components) is infinity, so that a steady-state deviation can be eliminated. Consequently, it is possible to realize a highly accurate control for each of the motor current and the cross current and improve the efficiency as the AC motor driver.

FIG. 4

illustrates a third embodiment of an AC motor driver to which the present invention is applied. In

FIG. 4

, the same reference numerals as those in

FIG. 3

designate the same components. The configuration in

FIG. 4

differs from the configuration in

FIG. 3

in that interphase reactors

14

are used in place of AC reactors

4

A,

4

B. When the interphase reactors are used, inverters are connected to both ends of the respective reactors, and power is supplied to a motor from center points of windings of the reactors, as can be seen in FIG.

4

.

Discussing the action of the interphase reactors

14

on the equivalent circuits in

FIGS. 2A

,

2

B, an inductance value in reactor constants of a motor current circuit is a leak inductance value which can be reduced to a sufficiently small value. An inductance value in reactor constants of a cross current circuit can be increased to a value twice that of an AC reactor. In other words, in

FIGS. 2A

,

2

B, the interphase reactor

14

acts to reduce the inductance value L

1

to 0 (L

1

→0) on the motor current circuit and to increase the inductance value L

1

to 2L

1

(L

1

→2L

1

) on the cross current circuit. As a result, the power factor can be improved in the motor current circuit, so that more active power can be supplied to the motor. In the cross current circuit, in turn, the inductance is increased so that the suppression of the cross current is facilitated. Further, the interphase reactor can be regarded apparently as an integration of six AC reactors into three, thereby providing an additional effect of reducing the size of the reactor.

As described above, in the fourth embodiment, the use of the interphase reactors effectively improves the power factor and reduces the size of the driver, in addition to the effects provided by the first and second embodiments.

FIG. 5

illustrates a fourth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 5

, the same reference numerals as those in

FIG. 3

designate the same components. The configuration in

FIG. 5

differs from the configuration in

FIG. 3

in that a three-phase two-winding motor

15

is substituted for the motor

3

in the aforementioned embodiments, and the reactors

4

A,

4

B are eliminated.

The three-phase two-winding motor

15

has stator windings of the motor composed of two sets of three-phase windings. In

FIG. 5

, one set of three-phase windings is powered by the A-system inverter

1

A, while the other set of three-phase windings is powered by the B-system inverter

1

B. Although the two sets of three-phase windings are electrically insulated, they are magnetically coupled through a stator core. The magnetic coupling between these windings can be represented equivalently by coupling through reactors. In other words, the configuration in

FIG. 5

may be regarded as equivalent to the configuration in

FIG. 3

in terms of the electric circuit. Therefore, when the three-phase two-winding motor is driven as in

FIG. 5

, the same effects as those described in

FIG. 3

can be provided by applying the same control configuration as

FIG. 3

to the three-phase two-winding motor. Additionally, in the configuration of

FIG. 5

, since the magnetic coupling between the stator windings can be applied as an action of reactors, a smaller driver without reactors can be provided.

FIG. 6

illustrates a fifth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 6

, the same reference numerals as those in

FIG. 5

designate the same components. The configuration in

FIG. 6

differs from the configuration in

FIG. 5

in that a three-phase two-winding motor

16

having windings wound with a phase difference θ is substituted for the motor

15

, a coordinate converter

17

B having a phase correction function is provided for detected output current values of the B-system inverter

1

B, and a coordinate converter

18

B having a phase correction function is provided for voltage instructions to the B-system inverter

1

B.

When the three-phase two-winding motor

16

with the phase difference is employed, torque ripple of a certain order number (a basic wave is designated as the first-order) can be suppressed by means of the phase difference. For example, a three-phase two-winding motor with a winding phase difference set to 30° can suppress sixth-order torque ripple. Generally, an inverter has a tendency of increasing sixth-order torque ripple by the action of a dead time provided to prevent arm short-circuiting. Therefore, the problem of the increase in the sixth-order torque ripple inherent to the inverter can be solved if a three-phase two-winding motor with a phase difference of 30° is employed.

However, it should be noted herein that when the three-phase two-winding motor

16

with the phase difference is employed, output currents of each inverter should be delivered with a phase difference corresponding to the phase difference of the windings. For example, assuming in

FIG. 6

that a set of windings connected to the B-system inverter

1

B has a delayed phase difference θ with respect to a set of windings connected to the A-system inverter

1

A, output currents i

AU

, i

AV

, i

AW

of the A-system inverter

1

A have the phases delayed by θ from those of output currents i

BU

, i

BV

, i

BW

of the B-system inverter

1

B, respectively. Therefore, the control processing subsystems must match the phases of detected output current values of the A-system inverter

1

A with the phases of detected output current values of the B-system inverter

1

B as well as delay the voltage instruction phases of the B-system inverter

1

B by θ from the voltage instruction phases of the A-system inverter

1

A.

The coordinate converter

17

B having the phase correction function for the detected output current values of the B-system inverter

1

B, and the coordinate converter

18

B having the phase correction function for the voltage instructions to the B-system inverter

1

B shown in

FIG. 6

can serve to perform the foregoing operations, respectively. The coordinate converter

17

B converts the detected output current values of the B-system inverter

1

B to corresponding values in a rotating coordinate system with the phase advanced by θ. Here, the operation performed by the coordinate converter

17

B is expressed by the following equation (19):

\begin{matrix} [\begin{matrix} i_{Bd} \\ i_{Bq} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} \cos (ω t - θ) & \sin (ω t - θ) \\ - \sin (ω t - θ) & \cos (ω t - θ) \end{matrix}] [\begin{matrix} 1 & - 1 / 2 & - 1 / 2 \\ 0 & \sqrt{3} / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} i_{Bu} \\ i_{Bv} \\ i_{Bw} \end{matrix}] & (19) \end{matrix}

As a result, the detected output current values of the A-system inverter

1

A are equal in phase to the detected output current values of the B-system inverter

1

B, so that the outputs of the current compensators associated therewith can be added to the respective output current values in the adders

10

A,

10

B, respectively. The coordinate converter

18

B in turn converts voltage instructions to the B-system inverter

1

B to corresponding values in the three-phase AC system with the phase delayed by θ. In this event, the operation performed by the coordinate converter

18

B is expressed by the following equation (20):

\begin{matrix} [\begin{matrix} V_{Bu}^{*} \\ V_{Bv}^{*} \\ V_{Bw}^{*} \end{matrix}] = \sqrt{\frac{2}{3}} [\begin{matrix} 1 & 0 \\ - 1 / 2 & \sqrt{3} / 2 \\ - 1 / 2 & - \sqrt{3} / 2 \end{matrix}] [\begin{matrix} \cos (ω t - θ) & - \sin (ω t - θ) \\ \sin (ω t - θ) & \cos (ω t - θ) \end{matrix}] [\begin{matrix} V_{Bd}^{*} \\ V_{Bq}^{*} \end{matrix}] & (20) \end{matrix}

As a result, the voltage instruction phases of the B-system inverter

1

B can be delayed by θ from the voltage instruction phases of the A-system inverter

1

A, and therefore the output current phases of the A-system inverter

1

A can be delayed by θ from the output current phases of the B-system inverter

1

B.

As described above, in the fifth embodiment illustrated in

FIG. 6

, the actions of the coordinate converters

17

B,

18

B having the phase correction function allow the control processing described in the embodiment of

FIG. 3

to be applied to an AC motor driving system which employs the three-phase two-winding motor

16

with a phase difference. As a result, in addition to the effects so far described above, the torque ripple can be further suppressed by the action of the three-phase two-winding motor with a phase difference. For example, when the embodiment of

FIG. 6

is applied to a motor driver for an elevator, the suppression of the torque ripple results in elimination of vibrations, so that the riding quality of the elevator can be improved while it is running.

FIG. 7

illustrates a sixth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 7

, the same reference numerals as those in

FIG. 3

designate the same components. The configuration in

FIG. 7

differs from the configuration in

FIG. 3

in that the control processing subsystem associated with the remote current compensators

9

B, i.e., the subtractors

8

B, remote current compensators

9

B and adders

10

B are removed in the control processing subsystem for the B-system inverter

1

B.

In the control processing subsystems illustrated in

FIG. 7

, the control processing subsystem for the B-system inverter

1

B controls output voltage instructions only with the outputs of the local current compensators

7

B. On the other hand, the control processing subsystem for the A-system inverter

1

A controls output voltage instructions with the sum of the outputs from the local current compensators

7

A and the remote current compensators

9

A. Therefore, the output voltages of the B-system inverter

1

B take proper values such that the output currents of the inverter

1

B match current instruction values, whereas the output voltages of the A-system inverter

1

A are determined such that the output currents of both the A-system inverter and the B-system inverter match current instruction values. As a result, the output voltages of the A-system inverter

1

A are adjusted in a direction in which cross currents between the inverters are suppressed, i.e., in a direction in which they are made coincident with output voltages of the B-system inverter

1

B. It is desirable herein that the action of the remote current compensators

9

A is determined such that the remote current compensators

9

A have a smaller time constant than the local current compensators

7

A,

7

B. It should be noted that in the control processing subsystems illustrated in

FIG. 7

, the A-system is only affected by the B-system, while the B-system is independent in terms of the control, so that advantageously, no control interference occurs between the A-system and the B-system in principle.

As will be appreciated from the foregoing, under an operating condition in which no influence is exerted even if the suppression of cross currents are controlled with a small time constant, for example, under an operating condition with a long steady-state operating period, the application of the embodiment illustrated in

FIG. 7

results in a simplified control processing configuration, and elimination of interference between the A-system control processing subsystem and the B-system control processing subsystem in principle.

FIG. 8

illustrates a seventh embodiment of an AC motor driver to which the present invention is applied. In

FIG. 8

, the same reference numerals as those in

FIG. 3

designate the same components.

FIG. 8

illustrates the configuration in which the control processing subsystems illustrated in

FIG. 3

are implemented on digital processors, which process control signals in a digital form, such as a microcomputer or a digital processor.

In

FIG. 8

, blocks

19

A,

19

B indicate areas implemented by digital processors, respectively, wherein the block

19

A represents a digital processor for controlling the A-system inverter

1

A (hereinafter called the “A-system digital processor”), and the block

19

B represents a digital processor for controlling the B-system inverter

1

B (hereinafter called the “B-system digital processor”). The illustrated AC motor driver also comprises an A/D (analog-to-digital) converter

20

A for analog-to-digital conversion of inputs to the A-system digital processor

19

A; and an A/D converter

20

B for analog-to-digital conversion of inputs to the B-system digital processor

19

B. While

FIG. 8

illustrates the configuration in which the A/D converters are incorporated in the associated digital processors, the same is applied to a configuration in which A/D converters are external to digital processors. It should be noted that while

FIG. 8

illustrates the AC motor driver in the form of a single-phase connection diagram, the AC motor driver of the seventh embodiment actually supports control processing subsystems which handle three-phase or two-phase signals as illustrated in

FIG. 3

(the number of slashes drawn on each line representative of a signal indicates the number of phases).

With the configuration based on the digital processors as illustrated in

FIG. 8

, it is possible to place the inverter

1

A close to the digital processor

19

A, and also place the inverter

1

B close to the digital processor

19

B. As a result, the distances between the inverters and PWM controllers (the distance between the inverter

1

A and the PWM controller

11

A, and the distance between the inverter

1

B and the PWM controller

11

B in

FIG. 8

) can be reduced, thereby making it possible to prevent noise from introducing into gate signals transmitted from the PWM controllers to gate circuits of the inverters and to prevent the gate signals from degrading. Since the gate signal directly corresponds to ON and OFF of each of phase switches in the respective inverters, blunted pulses (slowly rising and falling pulses) resulting from noise introducing into the signal or long distance transmission would cause grave problems such as malfunctions, delayed operation and so on of the inverters. It is therefore desired that the transmission distance between a PWM controller and an associated inverter be as short as possible.

In the configuration of

FIG. 8

, the A-system and B-system inverters can be placed in close proximity to the associated digital processors because two digital processors are used such that one is dedicated to the A-system control processing subsystem and the other to the B-system control processing subsystem, and digital signals are transmitted between the A-system digital processor and the B-system digital processor. Since digital signals are transmitted between the A-system digital processor and the B-system digital processor, the signals are free from degradation due to noise introducing thereinto and long distance transmission, so that the transmission distance therebetween can be made longer, and consequently the inverters can be placed in close proximity to the associated digital processors. It should be noted herein that a transmission delay will occur in the digital signal transmission between the A-system and B-system digital processors. However, since the control scheme illustrated in

FIG. 3

provides a simplified control processing configuration and a shorter control cycle, the amount of transmission delay, which is proportional to the control cycle, can also be reduced and therefore will not substantially affect the control.

Another advantage provided from the configuration of

FIG. 8

is that even if one digital processor fails, the remaining digital processor can drive one inverter. Also, since the A-system digital processor and the B-system digital processor in

FIG. 8

are identical in configuration, two digital processors of the same type can be mounted so that the manufacturing of the digital processors is facilitated. Consequently, the digital processors can be manufactured at a lower cost, and a high performance and low price motor driver can be provided. Further, the digital processors illustrated in the configuration of

FIG. 8

can be readily implemented by general-purpose control microprocessors which have a built-in A/D converter and PWM controller, and therefore the control configuration can advantageously be implemented using low-price microprocessors.

As will be appreciated from the foregoing, in addition to the effects provided by the configuration of

FIG. 3

, the configuration illustrated in

FIG. 8

allows the inverters to be placed in close proximity to the associated digital processors, thereby making it possible to reduce the distances between the respective inverters and the PWM controllers and prevent noise from introducing into the gate signal, which is transmitted from the PWM controller to the gate circuit of the inverter, to degrade the gate signal. Additionally, in case one digital processor fails, the remaining digital processor can drive the inverter, thereby making it possible to construct a motor driver which is robust against a failure. Furthermore, since the control processing subsystems can be implemented by digital processors of the same type, the digital processors can be manufactured at a lower cost, with the result that a low price motor driver can be provided.

It should be noted that the configuration in

FIG. 8

may be applied to a motor driver using an interphase reactor as illustrated in

FIG. 4

; to a motor driver using a three-phase two-winding motor as illustrated in

FIG. 5

; and to a motor driver using a three-phase two-winding motor with a phase difference as illustrated in FIG.

6

.

FIG. 9

illustrates an eighth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 9

, the same reference numerals as those in

FIG. 8

designate the same components. The configuration in

FIG. 9

differs from the configuration in

FIG. 8

in that each of the A-system digital processor

19

A and the B-system digital processor

19

B comprises only one coordinate converter. For example, the A-system digital processor

19

A comprises only one coordinate converter

12

A, while the B-system digital processor

19

B comprises only one coordinate converter

12

B.

As a result, in each of the digital processor, the amount of operation involved in the coordinate conversion is reduced, and the control cycle can be further reduced, so that the control gain can be increased. Also, since the number of digital signals transmitted between the digital processors is reduced from that required for three phases to that required for two phase, the configuration of the driving system is simplified.

FIG. 10

illustrates a ninth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 10

, the same reference numerals as those in

FIG. 1

designate the same components.

In

FIG. 10

, a control processing subsystem for the A-system inverter

1

A comprises local characteristic compensators

21

A for detected A-system current values i

AU

, i

AV

, i

AW

; remote characteristic compensators

22

B for detected B-system current values i

BU

, i

BV

, i

BW

; adders

23

A for adding outputs of the two characteristic compensators

21

A,

23

B; instruction characteristic compensators

24

for current instruction values i

mu

*, i

mv

*, i

mw

* issued to a motor; subtractors

25

A for subtracting outputs of the adders

23

A from outputs of the characteristic compensators

24

; coefficient multipliers

26

A for multiplying outputs of the respective subtractors

25

A by a predetermined coefficient; and a PWM controller

11

A for converting outputs of the coefficient multipliers

26

A to gate pulses. In this configuration, the local characteristic compensators

21

A, remote characteristic compensators

22

B and instruction characteristic compensators

24

act to process input signals with a predetermined transfer function such as a proportional function, a proportional-integral function or the like to compensate for the frequency characteristics of the gain and phase. The transfer function used herein may be a proportional element, a proportional-integral element, or the like. The control processing subsystem for the B-system inverter

1

B is configured symmetric to the A-system control processing subsystem. The foregoing description may be applied to the B-system inverter

1

B by replacing A with B and B with A in the respective reference numerals.

Taking the A-system control processing subsystem as an example, in a flow of processing, each control processing subsystem performs a predetermined characteristic compensations for each of detected current values of the A-system inverter and detected current values of the B-system inverter and adds the results of the compensation, while likewise performs a predetermined characteristic compensation for current instructions, and takes a deviation of each of the compensated instruction values from the associated sum of the compensated detected values. The deviation is multiplied by a predetermined coefficient to produce an inverter voltage instruction, based on which a PWM control is performed to output the gate pulses.

Next, a mathematical approach will be relied on to describe the fact that the control illustrated in

FIGS. 12A

,

12

B can be realized as well through the foregoing processing flow. In the control system illustrated in

FIG. 10

, the transfer functions of the respective characteristic compensators

21

(

21

A,

21

B),

22

(

22

A,

22

B),

24

, and a coefficient gain of the coefficient compensators

26

(

26

A,

26

B) are set as follows.

A transfer function G

1

of the local characteristic compensators

21

:

G

1

=K

m

+K

C

(21)

A transfer function G

2

of the remote characteristic compensators

22

:

G

2

=K

m

−K

C

(22)

A transfer function G

r

of the instruction characteristic compensators

24

:

\begin{matrix} G_{r} = \frac{G_{1} + G_{2}}{2} = K_{m} & (23) \end{matrix}

A coefficient gain K of the coefficient multipliers

26

:

\begin{matrix} K = \frac{1}{2} & (24) \end{matrix}

In this event, control operations performed in the A-system control processing subsystem and the B-system control processing subsystem are expressed by the following equations, respectively:

V

A

*=K{G

r

i

m

*−(

G

1

i

A

+G

2

i

B

)} (25)

V

B

*=K{G

r

i

m

*−(

G

1

i

B

+G

2

i

A

)} (26)

From the equations (25), (26), the following equations corresponding to the control illustrated in

FIGS. 12A

,

12

B is derived:

\begin{matrix} \begin{matrix} V_{m}^{*} = V_{A}^{*} + V_{B}^{*} \\ = K [2 G_{r} i_{m}^{*} - {(G_{1} + G_{2}) (i_{A} + i_{B})}] \\ = K_{m} {i_{m}^{*} - (i_{A} + i_{B})} \\ = K_{m} (i_{m}^{*} - i_{m}) \end{matrix} & (27) \\ \begin{matrix} V_{c}^{*} = V_{A}^{*} + V_{B}^{*} \\ = K {(G_{1} + G_{2}) (i_{A} + i_{B})} \\ = K_{c} {0 - (i_{A} + i_{B})} \\ = K_{c} (0 - i_{c}) \end{matrix} & (28) \end{matrix}

The equation (27) represents the control for the motor current circuit illustrated in

FIG. 12A

, while the equation (28) represents the control for the cross current circuit illustrated in FIG.

12

B.

In this way, the control processing subsystems illustrated in

FIG. 10

can equivalently carry out the control illustrated in

FIGS. 12A

,

12

B when the transfer functions of the respective characteristic compensators and the coefficient gain of the coefficient multipliers are set to satisfy the equations (21), (22), (23), (24). It is therefore possible to simultaneously realize three effects: a reduction in the inductance valve in reactor constants, an appropriate control for the motor current, and suppression of the cross currents, as is the case of the control processing subsystems illustrated in FIG.

1

.

Further advantageously, the control processing subsystems illustrated in

FIG. 10

can be implemented in a more simple processing configuration than the control processing subsystems illustrated in FIG.

1

. Therefore, as compared with the control processing subsystems illustrated in

FIG. 1

, the counterparts illustrated in

FIG. 10

can reduce a processing time and a time delay, when the control processing subsystems are implemented by a microcomputer or a digital processor, thus leading to an increased stability margin and a higher control gain of the control system. This results in further improvements in the instruction responsibility and disturbance suppression characteristics of the control system.

FIG. 11

illustrates a tenth embodiment of an AC motor driver to which the present invention is applied. In

FIG. 11

, the same reference numerals as those in

FIG. 10

designate the same components. The configuration in

FIG. 11

differs from the configuration in

FIG. 10

in that the former is additionally provided with a coordinate converter

12

A for detected output current values of the A-system inverter

1

A; a coordinate converter

12

B for detected output current values of the B-system inverter

1

B; a coordinate converter

13

A for voltage instructions of the A-system inverter

1

A; and a coordinate converter

13

B for voltage instructions of the B-system inverter

1

B. Since the operations of the coordinate converters

12

A,

12

B,

13

A,

13

B are identical to those described in

FIG. 3

, repetitive description thereon is omitted.

The control processing subsystems illustrated in

FIG. 11

has the same effects as the previously described control processing subsystems illustrated in

FIG. 3

over the control processing subsystems illustrated in FIG.

1

. Specifically, the actions of the coordinate converters

12

A,

12

B convert basic wave components of the inverter output currents to direct current signals, so that a steady-state deviation in the instruction response can be eliminated. As a result, a more accurate control can be realized for both motor currents and cross currents, thus leading to an improved efficiency as an AC motor driver.

It should be noted that the present invention is not limited to inverters for driving a motor, but may be applied to a set of converters in a parallel configuration connected to an AC system for converting AC power to DC power, a set of parallel inverters coupled to a power system such as an active filter and a reactive power compensator, and so on. In essence, the present invention can be applied to any power converter for controlling an output current in response to a current instruction signal.

As described above, according to the present invention, when a plurality of inverters are operated in sets in parallel configuration to drive one motor, a control processing subsystem associated with each of the inverters is comprised of a plurality of parallel current compensators divided into local compensators and remote compensators. With this configuration, it is possible to independently carry out the suppression of cross currents, which flow between the inverters through electric coupling or magnetic coupling, and an appropriate control for motor currents. Additionally, since the control configuration is simple as compared with the prior art control configuration having similar effects, assuming that the control processing subsystems are implemented by a microcomputer or a digital processor, a processing time can be reduced, thus leading to a reduction in a useless time delay, an increase in stability margin of the control system, and an increase in the compensation gains of the compensators as compared with the prior art. This results in improved instruction response characteristics and disturbance suppression characteristics of the control system. Taking an example of an AC motor driving system for an elevator, torque ripple generated in a motor can be further suppressed to improve the riding quality of the elevator.

Moreover, the control processing subsystem associated with each inverter is comprised of a plurality of parallel current compensators divided into local compensators and remote compensators, so that if the inverter in one system fails, the control processing subsystem can be readily switched to an individual operation mode in which the remaining system is only operated, by stopping the failed inverter and simultaneously stopping the outputs of current compensators associated with the failed inverter. As a result, it is possible to promptly limit the influence due to the failed inverter in the one system and accordingly realize a system which is immune to a failure.

Also, in the embodiments which additionally comprise the coordinate conversion means for detected current values, the steady-state deviation for an instruction response can be eliminated, so that a highly accurate control can be realized for both motor currents and cross currents.

Further, in the embodiments which additionally comprise the coordinate conversion means with a phase correction function for detected current values, detected current values of respective inverters having different phases from one another can be handled likewise as signals at the same phase in the control processing subsystems when the present invention is applied to a three-phase two-winding motor having windings wound with a phase difference. As a result, the control processing subsystem associated with each inverter can be similarly comprised of a plurality of parallel current compensators divided into local compensators and remote compensators, when the present invention is applied to the three-phase two-winding motor having windings wound with a phase difference. In addition to the above effects, the torque ripple can be reduced by the action of the three-phase two-winding motor having windings wound with a phase difference. For example, in a motor driver for an elevator, this effect corresponds to the effect of eliminating vibrations during the running to improve the riding quality of the elevator. It should be noted that the coordinate conversion means with a phase correction function is a widely applicable effective means whenever a three-phase two-winding motor having windings wound with a phase difference is employed, other than the control processing subsystems described in the present invention.

Also, in the embodiments which employ two digital processors for implementing the control processing subsystems such that one of the digital processors is dedicated to the A-system control processing subsystem and the other one is dedicated to the B-system control processing subsystem with a digital signal transmitted between the A-system digital processor and the B-system digital processor, the A-system and B-system inverters can be placed in close proximity to the digital processors associated therewith. As a result, in addition to the above effects, the distance between each inverter and an associated PWM controller can be reduced, it is possible to prevent noise from introducing into a gate signal, which is transmitted from the PWM controller to the gate circuit of the inverter, to degrade the gate signal. Moreover, in case one of the digital processors fails, the remaining digital processor can drive the associated inverter, thereby making it possible to construct a motor driver which is robust against a failure. Additionally, since the digital processors of the same type can be used, the digital processors can be manufactured at a lower cost, thereby making it possible to provide a low-price motor driver.

In addition to the effects provided by the configuration of

FIG. 3

, the configuration illustrated in

FIG. 8

allows each inverter to be placed in close proximity to an associated digital processor, so that the distance between the inverter and an associated PWM controller can be reduced. It is therefore possible to prevent noise from introducing into a gate signal, which is transmitted from the PWM controller to the gate circuit of the inverter, to degrade the gate signal. Moreover, in case one of the digital processors fails, the remaining digital processor can drive the associated inverter, thereby making it possible to construct a motor driver which is robust against a failure. Additionally, since the digital processors of the same type can be used, the digital processors can be manufactured at a lower cost, thereby making it possible to provide a low-price motor driver.

Driving system for driving AC motor

Information

Patent Number

Date Filed

Date Issued

Inventors

Original Assignees

Examiners

Agents

CPC

US Classifications

Field of Search

US

International Classifications

Abstract

Description

Claims

Priority Claims (1)

US Referenced Citations (1)

Foreign Referenced Citations (1)

Non-Patent Literature Citations (2)

Entry
S. Ogasawara et al., “A Novel Control Scheme of a Parallel Current-Controlled PWM Inverter”, IEEE Transactions on Industry Applications, vol. 28, No. 5, Sep./Oct. 1992, pp. 1023-1030.
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