Patent Application
20180275704
Some electronic devices or systems, such as cell phones, laptops, camera recorders and other mobile battery operated devices, may include low drop-out (LDO) voltage regulators to provide relatively precise and stable direct current (DC) voltage.
Another conventional scheme is to utilize one LDO voltage regulator and multiple input power path selection switches controlled by an MCU. As shown in
Embodiments according to the present invention provide an improved dual input power management method and system.
In an embodiment, the present invention provides a dual input power management method, including: monitoring whether a first input terminal has a power supply and whether a second input terminal has a power supply, and accordingly generating a first monitor signal and a second monitor signal; generating a priority signal based on the first monitor signal, the second monitor signal, and an enable signal, to determine an input priority of the first input terminal and the second input terminal; generating a control signal based on a feedback signal indicative of an output voltage and a reference signal; and regulating the output voltage based on the priority signal and the control signal.
In an embodiment, the present invention provides a dual input power management system, including a dual input power regulator, wherein the dual input power regulator includes: a priority determination module, configured to: monitor whether a first input terminal has a power supply and whether a second input terminal has a power supply, and accordingly generate a first monitor signal and a second monitor signal; generate a priority signal based on the first monitor signal, the second monitor signal, and an enable signal to determine an input priority of the first input terminal and the second input; a feedback module, configured to generate a feedback signal indicative of an output voltage; a compare module coupled to the feedback module, and configured to generate a control signal based on the feedback signal and a reference signal; and an output stage module, coupled to the priority determination module and the compare module, and configured to regulate the output voltage based on the priority signal and the control signal.
Advantageously, in embodiments according to the present invention, the dual input power management method and system can achieve input priority setting in a low cost and highly efficient manner, and also can provide a reliable and stable output.
Features and advantages of embodiments of the claimed subject matter will become apparent as the following detailed description proceeds, and upon reference to the drawings, wherein like numerals depict like parts, and in which:
Reference will now be made in detail to the embodiments of the present invention. While the invention will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims.
Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention.
Specifically, the dual input power regulator 210 monitors whether a first input terminal IN1 (e.g., 6V) has a power supply and whether a second input terminal IN2 (e.g., 4.5V) has a power supply, and accordingly generates a first monitor signal and a second monitor signal. More specifically, if a first input voltage VIN1 detected on the first input terminal IN1 is greater than a preset threshold, then the first monitor signal is in a first state (e.g., high level), which indicates the first input terminal IN1 has a power supply. If the first input voltage VIN1 detected on the first input terminal IN1 is less than the preset threshold, then the first monitor signal is in a second state (e.g., low level), which indicates the first input terminal IN1 does not have a power supply. Similarly, if a second input voltage VIN2 detected on the second input terminal IN2 is greater than a preset threshold, then the second monitor signal is in a first state (e.g., high level), which indicates the second input terminal IN2 has a power supply. If the second input voltage VIN2 detected on the second input terminal IN2 is less than the preset threshold, then the second monitor signal is in a second state (e.g., low level), which indicates the second input terminal IN2 does not have a power supply. The MCU 220 provides the enable signal EN to the dual input power regulator 210, which can be used in combination with the first monitor signal and the second monitor signal to make the dual input power regulator 210 enter a normal operation mode (e.g., consume five micro-amps (pA) of current) or a shutdown or low current mode (e.g., only consume one pA current). Based on the first monitor signal, the second monitor signal, and the enable signal EN, the dual input power regulator 210 determines the input priority of the first input terminal IN1 and the second input terminal IN2 and accordingly generates the output voltage VOUT on the output terminal OUT. More details are provided below in Table 1. Although the invention will be described in conjunction with the priority determination logic of Table 1, the invention is not so limited. On the contrary, the invention covers other proper priority determination logics.
As shown in Table 1, in one example, if the input terminal IN1 has a power supply (shown as “Input”) and the input terminal IN2 does not have a power supply (shown as “N/A”), then the input priority is set to the input terminal IN1, and the output further depends on the enable signal EN. More specifically, as shown in the first row of Table 1, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is at low level (e.g., disabled), then the dual input power regulator 210 enters the shutdown or low current mode mode and stops generation of the output voltage VOUT on the output terminal OUT (e.g., without output, shown as “N/A”). As shown in the second row of Table 1, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is at high level, then the dual input power regulator 210 enters the normal operation mode and converts the input voltage VIN1 on the input terminal IN1 to the output voltage VOUT on the output terminal OUT (e.g., with output, shown as “Output”).
As shown in the third and fourth rows of Table 1, if the input terminal IN2 has a power supply, then the input priority is set to the input terminal IN2 and the input voltage VIN2 on the input terminal IN2 is converted to the output voltage VOUT on the output terminal OUT (e.g., with output), regardless of whether or not the input terminal IN1 has a power supply and regardless of whether the enable signal EN is at high level or low level.
According to the generated output voltage VOUT on the output terminal OUT, the dual input power regulator 210 provides the power good signal PG to the MCU 220. For example, if the output voltage VOUT on the output terminal OUT is within the normal range, then the power good signal PG is pulled high by an external resistor connected to the output terminal OUT; on the other hand, if the output voltage VOUT on the output terminal OUT is out of the normal range, then the power good signal PG is pulled low. The power good signal PG can be configured to indicate whether the output voltage VOUT on the output terminal OUT is stable or ready, which can also be used as a reset signal of a processor (e.g., the MCU 220).
Although the priority of the second input terminal IN2 is greater than the priority of the first input terminal IN1 in the above examples, the priority of the first input terminal IN1 can instead be designed to be higher than the priority of the second input terminal IN2.
Advantageously, the dual input power regulator 210 according to the present invention has two modes: the normal operation mode, and the shutdown mode. In the normal operation mode, according to the priority determination logic of the above Table 1, based on the first monitor signal, the second monitor signal, and the enable signal EN, the dual input power regulator 210 determines the input priority of the first input terminal IN1 and the second input terminal IN2 and accordingly generates the output voltage VOUT on the output terminal OUT. In the normal operation mode, the dual input power regulator 210 may consume a relatively large current (e.g., 5 pA). In the shutdown or low current mode, the dual input power regulator 210 is disabled by the enable signal EN of the MCU 220, therefore stopping generation of the output voltage VOUT on the output terminal OUT. In the shutdown or low current mode, the dual input power regulator 210 only consumes a relatively small current (e.g., 1 pA).
The output stage module 320 is coupled to the input terminals IN1 and IN2 of the dual input power regulator 210, and can be configured to receive the input voltage VIN1 and/or VIN2 and to provide the output voltage VOUT to the output terminal OUT of the dual input power regulator 210. The output stage module 320 is controlled by the priority signal PRI from the priority determination module 310 and the control signal CTR from the error amplifier 340. The priority signal PRI is based on the first monitor signal, the second monitor signal, and the enable signal EN and is discussed further in conjunction with
The priority determination module 310 can be configured to monitor whether the first input terminal IN1 has a power supply and whether the second input terminal IN2 has a power supply, and accordingly generates the first monitor signal and the second monitor signal as described above. Furthermore, the priority determination module 310 determines the input priority of the first input terminal IN1 and the second input terminal IN2 based on the first monitor signal, the second monitor signal, and the received enable signal EN. As described with reference to the above Table 1, if the priority determination module 310 detects or determines that the input terminal IN1 has a power supply and the input terminal IN2 does not have a power supply (e.g., by comparing the input voltage and the preset threshold), and the enable signal EN is at low level (e.g., disabled), then the priority determination module 310 generates the priority signal PRI to make the dual input power regulator 210 enter the shutdown or low current mode mode and stops the generation of the output voltage VOUT on the output terminal OUT (e.g., without output). If the priority determination module 310 detects or determines that the input terminal IN1 has a power supply and the input terminal IN2 does not have a power supply (e.g., by comparing the input voltage and the preset threshold), and the enable signal EN is at high level (e.g., enabled), then the priority determine module 310 generates the priority signal PRI to set the input priority to the input terminal IN1, makes the dual input power regulator 210 enter the normal operation mode, and converts the input voltage VIN1 on the input terminal IN1 to the output voltage VOUT on the output terminal OUT (e.g., with output). If the input terminal IN2 has a power supply, then the priority determination module 310 generates the priority signal PRI to set the input priority to the input terminal IN2 regardless of whether or not the input terminal IN1 has a power supply and regardless of whether the enable signal EN is at high level or low level, and the dual input power regulator 210 enters the normal operation mode and converts the input voltage VIN2 on the input terminal IN2 to the output voltage VOUT on the output terminal OUT (e.g., with output).
The feedback module 330 coupled to the output terminal OUT is configured to generate the feedback signal FB indicative of the output voltage VOUT. For example, the feedback module 330 can include a voltage divider (e.g., resistors), configured to convert the output voltage VOUT to the feedback signal FB. The power status module 350 coupled to the feedback module 330 is configured to generate the power good signal PG according to the output voltage VOUT sensed by the feedback module 330. For example, if the output voltage VOUT on the output terminal OUT is within the normal range, then the power good signal PG is pulled high by an external resistor connected to the output terminal OUT; and if the output voltage VOUT on the output terminal OUT is out of the normal range, then the power good signal PG is pulled low. The power good signal PG can be configured to indicate whether the output voltage VOUT on the output terminal OUT is stable or ready, which can also be used as the reset signal of the MCU 220. The error amplifier 340 coupled to the feedback module 330 is configured to compare the reference signal REF (e.g., a bandgap reference voltage) and the feedback signal FB indicative of the output voltage VOUT, and to generate the control signal CTR according to the comparison result to control the output stage module 320. The output stage module 320, the feedback module 330, and the error amplifier 340 form a feedback loop, in order to generate the precise and stable output voltage VOUT on the output terminal OUT.
As described above, based on the priority signal PRI and the control signal CTR, the output stage module 320 selects the input terminal IN1 or IN2 as the input priority, and accordingly regulates the input voltage VIN1 or VIN2 to the output voltage VOUT on the output terminal OUT.
The error amplifier 340 can also be coupled to the protection module 360. The protection module 360 can provide, including but not limited to, under-voltage lock out (UVLO) protection, over-temperature protection, and over-current protection.
For UVLO protection, the protection module 360 can selectively turn on or off one or more components in the dual input power regulator 210 according to different power conditions. For example, when the voltages on the input terminal IN1 and IN2 are both less than a preset under-voltage lockout threshold, the protection module 360 generates a shutdown signal to turn off components (e.g., one or more or all components) in the dual input power regulator 210. When the voltage on the input terminal IN1 or IN2 is greater than the preset under-voltage lockout threshold, then the protection module 360 stops generation of the shutdown signal to turn on components (e.g., one or more or all components) in the dual input power regulator 210.
For over-temperature protection, the protection module 360 can prevent the dual input power management system 200 from damage due to over-temperature. For example, when the temperature of the dual input power management system 200 is greater than a preset temperature threshold, then the protection module 360 turns off components (e.g., one or more or all components) in the shutdown dual input power regulator 210 until the system temperature drops to the preset temperature threshold.
The protection module 360 can also provide over-current protection for the dual input power management system 200. When the current flowing through the output stage module 320 (e.g., the output stage unit 510 or 520 in
For a first determination path connected to the first input terminal IN1, the voltage divider 411 is configured to convert the input voltage VIN1 on the input terminal IN1 to a divided voltage V1′. The error amplifier 413 compares the divided voltage V1′ and a preset monitor threshold TH1 and generates a first monitor signal 415. In an embodiment, if the divided voltage V1′ is greater than the preset monitor threshold TH1, then the first monitor signal 415 is in a first state (e.g., high level), which indicates that the first input terminal IN1 has a power supply. If the divided voltage V1′ is less than the preset monitor threshold TH1, then the first monitor signal 415 is in a second state (e.g., low level), which indicates that the first input terminal IN1 does not have a power supply.
Similarly, for a second determination path connected to the second input terminal IN2, the voltage divider 421 is configured to convert the input voltage VIN2 on the input terminal IN2 to a divided voltage V2′. The error amplifier 423 compares the divided voltage V2′ and another preset monitor threshold TH2 and generates a second monitor signal 425. In an embodiment, if the divided voltage V2′ is greater than the preset monitor threshold TH2, then the second monitor signal 425 is in a first state (e.g., high level), which indicates that the second input terminal IN2 has a power supply. If the divided voltage V2′ is less than preset monitor threshold TH2, then the second monitor signal 425 is in a second state (e.g., low level), which indicates that the second input terminal IN2 does not have a power supply.
The preset monitor thresholds TH1 and TH2 can be the same (e.g., both equal to 1.2V) or they can be different. Furthermore, the resistance ratios of the voltage dividers 411 and 421 can be the same or different (e.g., 1:4 and 1:3, respectively). These values are examples only; the invention is not so limited.
The determination unit 430 receives the first monitor signal 415 (which indicates whether the first input terminal IN1 has a power supply), the second monitor signal 425 (which indicates whether the second input terminal IN2 has a power supply), and the enable signal EN from the MCU 220. The determination unit 430 generates a priority signal PRI to determine the input priority of the first input terminal IN1 and the second input terminal IN2. For example, based on the first monitor signal 415, the second monitor signal 425, and the enable signal EN, the determination unit 430 determines the input priority of the first input terminal IN1 and the second input terminal IN2, selects the first input terminal IN1 or second input terminal IN2 as the input, and generates the priority signal PRI to control the output stage module 320. In an example, such as the example of
Operation of the dual input power regulator 210 is now described with reference to
In one example, if the first monitor signal 415 indicates that the input terminal IN1 has a power supply and the second monitor signal 425 indicates that the input terminal IN2 does not have a power supply, then the determination unit 430 sets the input priority to the input terminal IN1 and the output further depends on the enable signal EN. More specifically, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is at low level (e.g., disabled), then the dual input power regulator 210 enters the shutdown or low current mode and stops generation of the output voltage VOUT on the output terminal OUT (e.g., without output). In this situation, the priority signal PRI1 turns off the switch transistor 531 and the priority signal PRI2 turns off the switch transistor 532. In this manner, the output stage units 510 and 520 are disabled. In contrast, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is at high level, then the dual input power regulator 210 enters the normal operation mode and converts the input voltage VIN1 on the input terminal IN1 to the output voltage VOUT on the output terminal OUT (e.g., with output). In this situation, the priority signal PRI1 turns on the switch transistor 531 and the priority signal PRI2 turns off the switch transistor 532. In this manner, the output stage unit 510 is activated and the output stage unit 520 is disabled. The output stage unit 510 generates the output current IOUT1 according to the control current ICTR.
If the second monitor signal 425 indicates that the input terminal IN2 has a power supply, then the input priority is set to the input terminal IN2 regardless of whether or not the input terminal IN1 has a power supply and regardless of whether the enable signal EN is at high level or low level, and the dual input power regulator 210 enters the normal operation mode and the input voltage VIN2 on the input terminal IN2 is converted to the output voltage VOUT on the output terminal OUT (e.g., with output). In this situation, the priority signal PRI1 turns off the switch transistor 531 and the priority signal PRI2 turns on the switch transistor 532. In this manner, the output stage unit 510 is disabled and the output stage unit 520 is activated. The output stage unit 520 generates the output current IOUT2 according to the control current ICTR.
Furthermore, the control signal CTR (e.g., the amount/level of control current ICTR) can indicate the amount of difference between the reference signal REF (e.g., a bandgap reference voltage) and the feedback signal FB indicative of the output voltage VOUT. Therefore, the output current (IOUT1 or IOUT2) and the output voltage VOUT are regulated. The output stage module 320, the feedback module 330, and the error amplifier 340 form a feedback loop, in order to generate the precise and stable output voltage VOUT on the output terminal OUT.
Step 610 includes monitoring whether a first input terminal has a power supply and whether a second input terminal has a power supply, and accordingly generating a first monitor signal and a second monitor signal as described above. For example, the dual input power regulator 210 monitors whether the first input terminal IN1 (e.g., 6V) has a power supply and whether the second input terminal IN2 (e.g., 4.5V) has a power supply, and accordingly generates the first monitor signal and the second monitor signal as described above.
Step 620 includes generating a priority signal (e.g., a priority signal PRI including two separate priority signals PRI1 and PRI2) based on the first monitor signal, the second monitor signal, and an enable signal, to determine an input priority of the first input terminal and the second input terminal. For example, in an embodiment, if the input terminal IN1 has a power supply and the input terminal IN2 does not have a power supply, then the input priority is set to the input terminal IN1 and the output further depends on the enable signal EN. More specifically, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is in low level (e.g., disabled), then the dual input power regulator 210 enters the shutdown or low current mode and stops generation of the output voltage VOUT on the output terminal OUT (e.g., without output). In contrast, if the input terminal IN1 has a power supply, the input terminal IN2 does not have a power supply, and the enable signal EN is in high level, then the dual input power regulator 210 enters the normal operation mode and converts the input voltage VIN1 on the input terminal IN1 to the output voltage VOUT on the output terminal OUT (e.g., with output).
If the input terminal IN2 has a power supply, then the input priority is set to the input terminal IN2 regardless of whether or not the input terminal IN1 has a power supply or not and regaardless of whether the enable signal EN is in high level or low level, and the input voltage VIN2 on the input terminal IN2 is converted to the output voltage VOUT on the output terminal OUT (i.e., with output).
Step 630 includes generating a control signal based on a feedback signal indicative of an output voltage and a reference signal. In an embodiment, the error amplifier 340 compares the reference signal REF (e.g., a bandgap reference voltage) and the feedback signal FB indicative of the output voltage VOUT, and generates the control signal CTR according to the comparison result. The output stage module 320, the feedback module 330, and the error amplifier 340 form the feedback loop, in order to generate the precise and stable output voltage VOUT on the output terminal OUT.
Step 640 includes regulating the output voltage based on the priority signal and the control signal. In an embodiment, based on the priority signal PRI and the control signal CTR, the output stage module 320 selects the input terminal IN1 or IN2 as the input priority, and accordingly regulates the input voltage VIN1 or VIN2 to the output voltage VOUT on the output terminal OUT.
Although the priority of the second input terminal is greater than the priority of the first input terminal in the above description, the invention is not so limited; instead, the priority of the first input terminal can be greater than the priority of the second input terminal.
Advantageously, the dual input power regulator 210 according to the present invention has at least two modes: the normal operation mode and the shutdown mode. In the normal operation mode, according to the priority determination logic of Table 1, based on the first monitor signal, the second monitor signal, and the enable signal EN, the dual input power regulator 210 determines the input priority of the first input terminal IN1 and the second input terminal IN2 and accordingly generates the output voltage VOUT on the output terminal OUT. In this situation, the dual input power regulator 210 may consume a relatively large current (e.g., 5 μA). In the shutdown mode, the dual input power regulator 210 is disabled by the enable signal EN of the MCU 220, therefore stopping the generation of the output voltage VOUT on the output terminal OUT. At this time, the dual input power regulator 210 may only consume a relatively small current (e.g., 1 μA).
While the foregoing description and drawings represent embodiments of the present invention, it will be understood that various additions, modifications, and substitutions may be made therein without departing from the spirit and scope of the principles of the present invention as defined in the accompanying claims. One skilled in the art will appreciate that the invention may be used with many modifications of form, structure, arrangement, proportions, materials, elements, and components and otherwise, used in the practice of the invention, which are particularly adapted to specific environments and operative requirements without departing from the principles of the present invention. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims and their legal equivalents, and not limited to the foregoing description.
