Claims
- 1. In an operating system having a plurality of shared storage resources accessible by a plurality of processors for running a multithreaded program, a two level scheduling method of executing said multithreaded program, comprising the steps of:
- (a) assigning program threads of said multithreaded program to processes;
- (b) storing in a first shared storage resource context for executing said processes corresponding to said program threads;
- (c) queuing in a second shared storage resource a value representing the number of said program threads in said multithreaded program to be executed;
- (d) determining that a processor is available to execute a process having context stored in said first shared storage resource; and
- (e) scheduling said processes for execution by said processors, comprising the steps of:
- scanning by said available processor a queue in said second shared storage resource to respond to a positive value in said second shared storage resource;
- decrementing said second shared storage resource value using said available processor; and
- accessing contents of said first shared storage resource corresponding to said scan for initiating execution, using said available processor, of a process associated with accessed context.
- 2. The method according to claim 1 wherein said first shared storage resource includes a plurality of global registers sequentially accessible by a processor, and said storing step further includes the step of sequentially loading said plurality of global registers with information corresponding to the context of a process to run a thread.
- 3. The method according to claim 1 wherein said second shared storage resource is a global register, and the method includes a further step of returning an available processor to the operating system when said second shared storage resource contains a value of zero.
- 4. The method in accordance with claim 1 in which the operating system performs the steps of:
- scheduling a number of processors for executing said processes of said multithreaded program; and
- allowing only said scheduled number of processors to access said first and second shared storage resources.
RELATED APPLICATIONS
This is a continuation of copending application Ser. No. 07/571,955, filed Aug. 23, 1990, and now abandoned, which is a continuation-in-part of a pending application filed in the United States Patent and Trademark Office on Jun. 11, 1990, titled INTEGRATED SOFTWARE ARCHITECTURE FOR A HIGHLY PARALLEL MULTIPROCESSOR SYSTEM, Ser. No. 07/537,466, and the invention described herein is suitable for use in the system environment of the copending application filed on Dec. 29, 1989, titled CLUSTER ARCHITECTURE FOR A HIGHLY PARALLEL SCALAR/VECTOR MULTIPROCESSOR SYSTEM, Ser. No. 07/459,083. Both of the aforementioned applications are assigned to the assignee of the present invention and are hereby incorporated by reference in the present application. This application is also related to co-pending application filed concurrently herewith, titled INTEGRATED HIERARCHICAL REPRESENTATION OF A COMPUTER PROGRAM FOR A SOFTWARE DEVELOPMENT SYSTEM, assigned to the assignee of the present invention, the disclosure of which is hereby incorporated by reference in the present application.
US Referenced Citations (5)
Non-Patent Literature Citations (2)
Entry |
H. Jacobs, "User-Tunable Multiple Processor Scheduler", Proc. Usenix Technical Conference, pp. 183-192 (1986). |
M. Chastain et al., "The Convex C240 Architecture", Proc. Supercomputing Conf., pp. 320-329 (1988). |
Continuations (1)
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571955 |
Aug 1990 |
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Continuation in Parts (1)
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537466 |
Jun 1990 |
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