BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram showing a conventional dual mode quartz oscillation circuit using a modified Colpitts circuit using an SC-cut quartz oscillator;
FIG. 2 is a diagram showing a negative resistance curve according to the above described conventional circuit;
FIG. 3 is a diagram showing a dual mode quartz oscillation circuit using an SC-cut quartz oscillator in a modified Colpitts type oscillation circuit according to a first embodiment of the present invention;
FIG. 4 is a diagram showing a negative resistance curve according to a first embodiment of the present invention;
FIG. 5 is a diagram showing a negative resistance curve when varying a capacitance value of a Cc of an LC serial circuit in an oscillation circuit part of a mode according to a first embodiment of the present invention;
FIG. 6 is a diagram showing a negative resistance curve when varying a capacitance value of a CB of an LC serial circuit in an oscillation circuit part of a B mode according to a first embodiment of the present invention;
FIG. 7 is a diagram showing a negative resistance curve when varying a capacitance value of a Cc′ of an interference restriction-use LC serial circuit in an oscillation circuit part of a C mode in a first embodiment of the present invention;
FIG. 8 is a diagram showing a dual mode quartz oscillation circuit using an SC-cut quartz oscillator in a modified Colpitts type oscillation circuit according to a second embodiment of the present invention; and
FIG. 9 is a diagram showing a negative resistance curve when varying a capacitance value of a Cc′ of an interference restriction-use LC serial circuit in an oscillation circuit part of a B mode in a second embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The following is a description of the preferred embodiment of the present invention by referring to the accompanying drawings.
First Embodiment
FIG. 3 is a diagram showing a dual mode quartz oscillation circuit 1-1 using an SC-cut quartz oscillator 6 (abbreviated as “quartz oscillator 6” hereinafter) in a modified Colpitts type oscillation circuit according to a first embodiment of the present invention.
The dual mode quartz oscillation circuit 1-1 comprises a C mode oscillation circuit part 2-2 and a B mode oscillation circuit part 3-2.
In the C mode oscillation circuit part 2-2, the base of a transistor Tr4-1 (used for an oscillation amplification) is connected to one end of an LC serial circuit 18 constituted by a capacitor Cc′ and an inductance Lc′, and the other end of the LC serial circuit 18 is connected to one end of a quartz oscillator 6. Here, the LC serial circuit 18 constitutes a band restriction unit. The other end of the quartz oscillator 6 is connected to one end of a capacitor C7 of which the other end is grounded by way of a variable-capacity diode D8. A serial circuit of division capacitors Ca and Cb is connected between the base and ground of the transistor Tr4-1, and a band restriction element, e.g., an LC serial circuit 9-1, is inserted between the connection point (i.e., the division point) between the division capacitors Ca and Cb and the emitter of the transistor Tr4-1. The emitter is connected to the ground by way of a resistor R10. The collector is configured so that a pull-up resistor R11 is connected to one end of a capacitor C12 and the other end thereof is made as an output terminal VOC. Note that the Vc is the power source, Rd5, Rd6, Rd7 and Rd8 are transistor bias resistor, and the C13 is a bypass capacitor, in the showing of FIG. 3.
The transistor Tr4-1, division capacitors Ca and Cb, i.e., capacitive reactance, and the quartz oscillator 6, i.e., inductive reactance, constitute a Colpitts type oscillation circuit. An oscillation signal (i.e., an oscillation wave) of an oscillation frequency based on the resonance frequency of the quartz oscillator is output as a collector voltage, and the oscillation signal (i.e., the oscillation wave) is output to the output terminal VOC. Furthermore, there is a modified Colpitts type oscillation circuit in which the LC serial circuit 9-1 is connected to the division point. The LC serial circuit 9-1 is for obtaining a narrow band negative resistance in the third overtone of the C mode.
The capacitance of the variable diode D8 is changed by giving thereto a reverse voltage and a load capacity against the quartz oscillator 6, thereby adjusting the oscillation frequency.
Then the B mode oscillation circuit part 3-2 is configured such that the base of an oscillation amplification-use transistor Tr4-2 is connected to one end of the quartz oscillator 6. The other end of the quartz oscillator 6 is connected to one end of the capacitor C7 and the other end thereof is grounded by way of the variable capacity diode D8. The serial circuit of division capacitors Cd and Ce is connected between the base and ground of the transistor Tr4-2, and a band restriction element, e.g., an LC serial circuit 9-2, is inserted between the connection point (the division point) between the division capacitors Cd and Ce and emitter. The emitter is grounded by way of the resistor R15. The collector is configured such that a pull-up resistor R16 is connected to one end of a capacitor C17 and the other end thereof is made as an output terminal VOB.
The transistor Tr4-2, division capacitors Cd and Ce, i.e., capacitive reactance, and quartz oscillator 6, i.e., an inductive reactance, constitute a Colpitts type oscillation circuit. An oscillation signal (i.e., an oscillation wave) of an oscillation frequency based on the resonance frequency of the quartz oscillator 6 is output as a collector current, and the oscillation wave is output to the output terminal VOB. Furthermore, it is a modified Colpitts type oscillation circuit with the LC serial circuit 9-2 being connected to the division point. The LC serial circuit 9-2 is for obtaining a narrow band negative resistance in the B mode fifth order overtone.
The dual mode quartz oscillation circuit 1-2 configured as described above is capable of implementing oscillations in both modes if a part indicated by a characteristic of a negative resistance is obtained in the oscillation frequency bands of the C mode and B mode. The resonance frequency (at approximately 10 MHz) of the C mode is the third overtone of the fundamental wave oscillation of the quartz oscillator 6, whereas the resonance frequency (at approximately 18.2 MHz) of the B mode is the fifth overtone.
Here, FIG. 4 shows the negative resistance curve of the dual mode quartz oscillation circuit 1-2.
Referring to FIG. 4, negative resistance components appear respectively in the C mode oscillation frequency band and the B mode oscillation frequency band. That is, the negative resistance is a resistance of an actual part of (V2−V1)/i.
That is, FIG. 4 shows an imaginary part 11, and an actual part (i.e., a negative resistance curve) 12, of impedance of the first embodiment. These parts are actual measurement values of a practical circuit measured with a measurement instrument (i.e., an impedance analyzer).
Note that the measurement point is indicated by “T” in FIG. 3. The vertical axis indicates the resistance value [Ω] and the horizontal axis indicates the frequency [MHz].
In the first embodiment, it has been validated the fact that an insertion of the LC serial circuit 18 as a band restriction element generates negative resistance components in the oscillation frequency bands of the B mode and C mode, respectively, and a positive resistance component appears between these negative resistance components and in the neighborhood of the oscillation frequency band of the B mode. This is shown as the mount part 13 (in the range of B) in the negative resistance curve 12. By virtue of this fact, the first embodiment is capable of performing a stable dual mode oscillation that has been impossible by the operation of the conventional example. That is, the conventional example has the characteristic of the positive resistance component as indicated by the range A shown in FIG. 2.
The first embodiment of the present invention performs a dual mode oscillation with the positive resistance component being generated as the mount part 13 (in the range of B) as shown in the negative resistance curve 12 shown in FIG. 4.
That is, the appearance of the mount part 13 (in the range of B) in the positive resistance component makes it possible to suppress an interference of the B mode oscillation and also implement a stable oscillation of B and C modes.
The following shows the result of an experiment of a negative resistance characteristic when varying capacitance values of respective LC serial circuits (9-1, 9-2 and 18) for the dual mode quartz oscillation circuit 2-2.
FIG. 5 is a diagram showing a simulation value of a negative resistance curve when varying a capacitance value of the Cc of the LC serial circuit 9-1 in the C mode oscillation circuit part 1-2 according to the first embodiment. (Note that the following FIGS. 6, 7 and 9 are also simulation values.) Here, the Lc is 10 μH. The vertical axis indicates a resistance value [Ω] and the horizontal axis indicates a frequency [MHz]. The curve A is for the capacitance value of Cc being 13.7 pF, the curve B is for the capacitance value of Cc being 14.2 pF and the curve C is for the capacitance value of Cc being 14.7 pF.
Based on FIG. 5, it has been validated through the comparison of the curves A, B and C that the peak of the negative resistance shifts slightly toward a lower frequency side with an increased capacitance. From this, it can be said that a frequency dependence of the negative resistance in the neighborhood of 10 MHz, that is the third overtone of the C mode, is low.
Meanwhile, FIG. 6 is a diagram showing a negative resistance curve when varying a capacitance value of the CB of the LC serial circuit 9-2 in the B mode oscillation circuit part 3-2 according to a first embodiment. Note that the LB is 10 pH. The vertical axis indicates a resistance value [Ω] and the horizontal axis indicates a frequency [MHz]. The curve D is for the capacitance value of CB being 6 pF, the curve E is for the capacitance value of CB being 7 pF and the curve F is for the capacitance value of CB being 8 pF.
Comparing the curves F with the curves D and E based on FIG. 6, one can comprehend the fact that the absolute value of the resistance component in the neighborhood of 18.2 MHz that is the fifth overtone of the B mode is very small. That is, a change of negative resistance against a frequency change of the B mode fifth overtone is small. This indicates that a peak of the absolute value of the negative resistance is smaller with the curve F, making a degree of amplification for the frequency small and making it hard to generate an abnormal oscillation phenomenon even if the spurious exists in the aforementioned frequency. Also, it can be said that a frequency dependence of the negative resistance in the neighborhood of 18.2 MHz, that is the fifth order overtone of the B mode is high because a degree of change is larger as compared to that of the negative resistance in the C mode.
Furthermore, FIG. 7 is a diagram showing a negative resistance curve when varying a capacitance value of the Cc′ of the LC serial circuit 18 according to the first embodiment. Note that the Lc′ is 10 μH. The vertical axis indicates a resistance value [Ω] and the horizontal axis indicates a frequency [MHz]. The curve G is for the capacitance value of Cc′ being 19 pF, the curve H is for the capacitance value of Cc′ being 24 pF and the curve I is for the capacitance value of Cc′being 29 pF.
Comparing the curves G, H and I based on FIG. 7 has confirmed the fact that a peak of the negative resistance in the neighborhood of 10 MHz that is the third overtone of the C mode slightly shifts toward the high frequency side with an increase of the capacity. Also confirmed is the fact that the absolute value of the negative value of in the neighborhood of 18.2 MHz that is the fifth overtone of the B mode increases with the capacitance. Further confirmed is the fact that the absolute value of the positive resistance component in the neighborhood of 18.2 MHz that is in a relationship of the opposite position also increases. That is, confirmed is the fact that a change of the capacitance value of the Cc′ of the LC serial circuit 18 influences a change of the negative resistance in the oscillation circuit parts (2-2 and 3-2) of both modes. In other words, a peak value of the positive resistance prior to the B mode also increases as the C of the LC serial circuit increases from 19 to 24 to 29 pF, also increasing the amplitude of the negative resistance in the negative direction. As an example, the peak value of the positive resistance is a little smaller than 1 kilo ohm in the case of 29 pF (i.e., the curve I). Therefore, a pull-in phenomenon of overtones of the C and B modes does not occur, enabling an accomplishment of a highly stable dual mode oscillation.
Second Embodiment
FIG. 8 is a diagram showing a dual mode quartz oscillation circuit 1-3 using an SC-cut quartz oscillator 6 in a modified Colpitts type oscillation circuit according to a second embodiment of the present invention. The characteristic of the present embodiment lies in inserting a band restriction element, e.g., the LC serial circuit 18, between one end of the quartz oscillator 6 and the base of the transistor Tr4-2 in the B mode oscillation circuit 3-2. The LC serial circuit 18 is for increasing an impedance in the B mode oscillation frequency.
Also for the present embodiment, the appearance of a negative resistance of both modes and that of a positive resistance component in the neighborhood of the fifth overtone of the B mode has been confirmed as in the case of FIG. 7. FIG. 9 shows a negative resistance curve when varying the capacitance value of Cc′ in the above described event. Note that the measurement point is “T” shown in FIG. 8. The vertical axis indicates a resistance value [Ω] and the horizontal axis indicates a frequency [MHz]. The curve J is for the capacitance value of Cc′ being 0 pF, the curve K is for the capacitance value of Cc′ being 24 pF and the curve L is for the capacitance value of Cc′ being 48 pF. As for a change of the capacitance value, the fact has been confirmed that approximately the same change as the case of FIG. 7. Note that if the C of the LC serial circuit 18 is 0 pF, that is, a C does not exist, a dual mode oscillation does not occur as indicated by the curve J.
Therefore, the LC serial circuit 18 makes it possible to implement a stable oscillation of both modes of the C mode third overtone and B mode fifth overtone just by equipping in the oscillation circuit (2-2 or 3-2) of either mode.
It is also possible to perform a highly stable dual mode oscillation just by incorporating a combination of common impedance elements so as to make an amplitude on a positive resistance side in lieu of only a band restriction element (that is constituted by an LC circuit) as another embodiment of the present invention.
The preferred embodiments of the present invention have so far been described; the transistor, however, may use a field-effect transistor (FET) in lieu of being limited to the bipolar transistor. Also, the quartz oscillator may employ an IT-cut oscillator, in addition to the SC-cut. Furthermore, an Oven Controlled Crystal Oscillator (OCXO) that accommodates the quartz oscillator 6 and the peripheral circuit in a constant temperature bath may be adopted.
Note that the present invention may be configured in various ways possible within the scope thereof in lieu of being limited to the preferred embodiments described above.
Patent Application
20070241828
