Dual-personality extended USB plugs and receptacles using with PCBA and cable assembly

Information

  • Patent Grant
  • 8262416
  • Patent Number
    8,262,416
  • Date Filed
    Friday, September 17, 2010
    14 years ago
  • Date Issued
    Tuesday, September 11, 2012
    12 years ago
Abstract
An extended USB plug connector includes a connector substrate including a frontend having a first set of electrical contact pins disposed thereon and a backend having a second set of electrical contact pins disposed thereon. The first set includes a first row of electrical contact pins disposed on a top surface of the connector substrate and a second row of electrical contact pins disposed in parallel with the first row of electrical contact pins and interior to the first row of electrical contact pins, where the second row includes more electrical contact pins than the first row. The second set of electrical contact pins includes a number of electrical contact pins equal to the first row and second row of electrical contact pins in total. The second set of electrical contact pins are used to connect to corresponding electrical contact pads disposed on a printed circuit board assembly having a USB controller and flash memory devices disposed thereon.
Description
FIELD OF THE INVENTION

The present invention relates generally to extended universal serial bus (USB) connectors. More particularly, this invention relates to USB connectors having multiple interfaces.


BACKGROUND

Universal-Serial-Bus (USB) has been widely deployed as a standard bus for connecting peripherals such as digital cameras and music players to personal computers (PCs) and other devices. Currently, the top transfer rate of USB is 480 Mb/s, which is quite sufficient for most applications. Faster serial-bus interfaces are being introduced to address different requirements. PCI Express, at 2.5 Gb/s, and SATA, at 1.5 Gb/s and 3.0 Gb/s, are two examples of high-speed serial bus interfaces for the next generation devices, as are IEEE 1394 and Serial Attached Small-Computer System Interface (SCSI).



FIG. 1A shows a prior-art peripheral-side USB connector. USB connector 10 may be mounted on a board in the peripheral. USB connector 10 can be mounted in an opening in a plastic case (not shown) for the peripheral. USB connector 10 contains a small connector substrate 14, which is often white ceramic, black rigid plastic, or another sturdy substrate. Connector substrate 14 has four or more metal contacts 16 formed thereon. Metal contacts 16 carry the USB signals generated or received by a controller chip in the peripheral. USB signals include power, ground, and serial differential data D+, D−. USB connector 10 contains a metal case that wraps around connector substrate 14. The metal case touches connector substrate 14 on three of the sides of connector substrate 14. The top side of connector substrate 14, holding metal contacts 16, has a large gap to the top of the metal case. On the top and bottom of this metal wrap are formed holes 12. USB connector 10 is a male connector, such as a type-A USB connector.



FIG. 1B shows a female USB connector. Female USB connector 20 can be an integral part of a host or PC, or can be connected by a cable. Another connector substrate 22 contains four metal contacts 24 that make electrical contact with the four metal contacts 16 of the male USB connector 10 of FIG. 1A. Connector substrate 22 is wrapped by a metal case, but small gaps are between the metal case and connector substrate 22 on the lower three sides. Locking is provided by metal springs 18 in the top and bottom of the metal case. When male USB connector 10 of FIG. 1A is flipped over and inserted into Female USB connector 20 of FIG. 1B, metal springs 18 lock into holes 12 of male USB connector 10. This allows the metal casings to be connected together and grounded. Universal-Serial-Bus (USB) is a widely used serial-interface standard for connecting external devices to a host such as a personal computer (PC). Another new standard is PCI Express, which is an extension of Peripheral Component Interconnect (PCI) bus widely used inside a PC for connecting plug-in expansion cards. An intent of PCI Express is to preserve and re-use PCI software. Unfortunately, USB connectors with their 4 metal contacts do not support the more complex PCI Express standard.



FIGS. 2A-2B show an ExpressCard and its connector. A new removable-card form-factor known as ExpressCard has been developed by the Personal-Computer Memory Card International Association (PCMCIA), PCI, and USB standards groups. ExpressCard 26 is about 75 mm long, 34 mm wide, and 5 mm thick and has ExpressCard connector 28.



FIG. 2B shows that ExpressCard connector 28 fits into connector or socket 30 on a host when ExpressCard 26 is inserted into an ExpressCard slot on the host. Since ExpressCard connector 28 and socket 30 are 26-pin connectors, they contain many more signals than a 4-pin USB connector. The additional PCI-Express interface can be supported as well as USB. ExpressCard 26 can also use USB to communicate with the host. Differential USB data signals USBD+ and USBD− are connected between ExpressCard 26 and a host chip set. The host chip set contains a USB host controller to facilitate communication with ExpressCard 26.


PCI Express supports data rates up to 2.5 G/b, much higher than USB. While the ExpressCard standard is useful for its higher possible data rate, the 26-pin connectors and wider card-like form factor limit the use of ExpressCards. The smaller USB connector and socket are more desirable than the larger ExpressCard. Another interface, serial AT-attachment (SATA) supports data rates of 1.5 Gb/s and 3.0 Gb/s. However, SATA uses two connectors, one 7-pin connector for signals and another 15-pin connector for power. Due to its clumsiness, SATA is more useful for internal storage expansion than for external peripherals. While SATA and ExpressCard are much higher-speed interfaces than USB, they use larger, bulky connectors while USB has a single, small connector.



FIGS. 3A-3D shows cross-sections of a prior-art USB connector and socket. In FIG. 3A, a prior-art peripheral-side plug or USB connector has plastic housing 36 that the user can grip when inserting the USB connector into a USB socket such as the socket in FIG. 3B. Pin substrate 34 can be made of ceramic, plastic, or other insulating material, and supports metal contact pins 32. There are 4 metal contact pins 32 arranged as shown in the top view of pin substrate 34 in FIG. 3D. Metal cover 33 is an open-ended rectangular tube that wraps around pin substrate 34 and the gap above metal contact pins 32. In FIG. 3B, a prior-art host-side USB socket is shown, such as a USB socket on a host PC. Metal cover 38 is rectangular tube that surrounds pin substrate 42 and has an opening to receive the USB connector's pin substrate 34. Metal contact pins 44 are mounted on the underside of pin substrate 42. Mounting pin 40 is formed from metal cover 38 and is useful for mounting the USB socket to a printed-circuit board (PCB) or chassis on the host PC.


Metal contact pins 44 are arranged as shown in the bottom view of pin substrate 42 of FIG. 3C. The four metal contact pins 44 are arranged to slide along and make contact with the four metal contact pins 32 when the USB connector is inserted into the USB socket. Pin substrates 34, 42 are formed in an L-shape with matching cutouts above metal contact pins 32 and below metal contact pins 44 that fit together when inserted. Metal contact pins 32, 44 can have a slight bend or kink in them (not shown) to improve mechanical and electrical contact. The bend produces a spring-like action that is compressed when the USB connector is inserted into the USB socket. The force of the compressed spring improves contact between metal contact pins 32, 44. While useful, prior-art USB sockets and connectors have only four metal contact pins 32 that mate with four metal contact pins 44. The four metal contact pins carry power, ground, and differential data lines D+, D−. There are no additional pins for extended signals required by other standard buses, such as PCI Express or Serial ATA.


SUMMARY OF THE DESCRIPTION

An extended universal serial bus (USB) storage device is described herein. According to one embodiment, an extended USB plug connector includes a connector substrate including a frontend having a first set of electrical contact pins disposed thereon and a backend having a second set of electrical contact pins disposed thereon. The first set includes a first row of electrical contact pins disposed on a top surface of the connector substrate and a second row of electrical contact pins disposed on the top surface of the connector substrate. The second row of electrical contact pins being disposed in parallel with the first row of electrical contact pins and interior to the first row of electrical contact pins, where the second row includes more electrical contact pins than the first row. The second set of electrical contact pins are electrically coupled to counterpart pins of the first row and second row of electrical contact pins respectively, where the second set of electrical contact pins includes a number of electrical contact pins equal to the first row and second row of electrical contact pins in total. The second set of electrical contact pins are used to connect to corresponding electrical contact pads disposed on an edge of a printed circuit board assembly (PCBA) having a USB controller and one or more flash memory devices disposed thereon. The plug connector further includes a housing for covering the connector substrate. The first row and second row of electrical contact pins are used to provide an electrical interface compatible with a USB specification to an external device to access the flash memory devices using a USB compatible communications protocol. Other methods and apparatuses are also described.


Other features of the present invention will be apparent from the accompanying drawings and from the detailed description which follows.





BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements.



FIGS. 1A-1B show a conventional USB connector.



FIGS. 2A-2B show an ExpressCard and its connector.



FIGS. 3A-3D show cross-sections of a prior-art USB connector and socket.



FIGS. 4A-4C are block diagrams illustrating an extended USB device configuration according to one embodiment of the invention.



FIGS. 5A-5C are block diagrams illustrating an extended USB device configuration according to one embodiment of the invention.



FIGS. 6A-6B are block diagrams illustrating certain form factors of a chip-on-bard (COB) package according to one embodiment of the invention.



FIG. 7 is a block diagram illustrating an extended USB device according to one embodiment of the invention.



FIGS. 8A-8B are block diagrams illustrating an extended USB device according to certain embodiments of the invention.



FIG. 9 is a block diagram illustrating an extended USB device according to another embodiment of the invention.



FIG. 10A is a block diagram of a host with an extended-USB socket that supports extended-mode communication according to one embodiment of the invention.



FIG. 10B is a block diagram of a peripheral with an extended-USB connector that supports extended-mode communication according to one embodiment of the invention.



FIG. 11 is a flowchart of an initialization routine executed by a host for detecting a device plugged into an extended USB socket according to one embodiment of the invention.



FIG. 12 is a flowchart of an initialization routine executed by a peripheral device plugged into an extended USB socket according to one embodiment of the invention.



FIG. 13 is a table of extended and standard pins in the extended USB connector and socket according to one embodiment of the invention.



FIGS. 14A-14C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.



FIGS. 15A-15C are block diagrams illustrating certain configurations of an extended USB drive according to certain embodiments of the invention.



FIGS. 16A-16C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.



FIGS. 17A-17C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.



FIGS. 18A-18C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.



FIG. 19 is a block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.





DETAILED DESCRIPTION

In the following description, numerous details are set forth to provide a more thorough explanation of embodiments of the present invention. It will be apparent, however, to one skilled in the art, that embodiments of the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present invention.


Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification do not necessarily all refer to the same embodiment.


According to certain embodiments of the invention, a USB storage device such as a USB flash device includes a dual personality extended USB plug which includes a metal case, and a connector substrate in multiple different form factors that can be coupled to a PCBA (printed circuit board assembly) having a flash memory such as multi-level cell (MLC) flash memory and a flash controller IC (integrated circuit) or a MLC chip-on-board (COB) design.



FIGS. 4A-4B are diagrams illustrating perspective views of a USB extended plug having multiple personalities according to one embodiment of the invention. Referring to FIG. 4A, a USB extended plug is showed in a complete view 401 and an exploded view 402. In one embodiment, USB extended plug 400 includes a casing or housing 403 and a USB connector substrate 404, where the connector substrate 404 can be plugged into the casing 403. Casing 403 may be made of metal, also referred to as a metal case herein. Connector substrate 404 includes a first end having multiple electrical contact fingers or tabs 405 and a second end having multiple electrical contact pins 407. In a particular embodiment, pins 407 include 9 or more pins. Connector substrate 404 further includes one or more springs or metal contacts 406 which may be used to provide pressure to another USB connector to have physical contact with contact fingers 405 when the other USB connector is inserted into an opening of the extended USB plug.


In one embodiment, contact fingers 405 may be disposed on a top surface of connector substrate 404 and additional contact fingers (not shown) may be disposed on a bottom surface of connector substrate 404. For example, contact fingers 405 may be compatible with standard USB specification while the additional contact fingers may be designed compatible with other interfaces such as PCI Express or IEEE 1349 specifications. As a result, extended USB plug 400 may be used for multiple different communication interfaces, also referred to as dual personalities. Further detailed information regarding the extended USB plug having dual personalities can be found in certain above-referenced applications and/or patents, such as, for example, U.S. Pat. No. 7,021,971 and U.S. patent application Ser. No. 11/864,696, which have been incorporated by reference.


Referring now to FIG. 4B, where extended USB plug 400 may be attached to a PCBA having a memory device and a memory controller for controlling the memory device. As shown in FIG. 4B as top view 408, side view 409, and bottom view 410, extended USB plug 400 may be attached to PCB substrate 411, for example, by soldering pins 407 on the PCB substrate 411. In addition, a memory device such as flash memory device may be disposed on a surface of the PCB substrate 411 and a memory controller such as a flash controller may be disposed on the other surface of the PCB substrate 411. In this example, memory device 415 is disposed on a bottom surface 413 of PCB substrate 411 and memory controller 414 is disposed on a top surface 412 of PCB substrate 411. In one embodiment, memory device 415 may be an MLC compatible memory IC and controller 414 may be an MLC compatible memory controller IC.


According to a further embodiment, techniques as described with respect to FIGS. 4A-4B may also be applied to a configuration where a flash memory and a flash controller are integrated into a single package such as a chip on board (COB) package as shown in FIG. 4C. Referring to FIG. 4C, a COB package 416, which may an MLC package, may be disposed on a surface such as a top surface 412 of PCB substrate 411, where the COB package 416 may be attached (e.g., soldered) via one or more contact fingers 417 disposed on a surface of COB 416. COB 416 may be any of the COB packages such as, for example, as those shown in FIGS. 6A-6B.



FIGS. 5A and 5B are diagrams illustrating perspective views of a USB extended plug having multiple personalities according to another embodiment of the invention. Referring to FIG. 5A, a USB extended plug is showed in a complete view 501 and an exploded view 502. In one embodiment, similar to extended USB plug 400 of FIGS. 4A-4B, extended USB plug 500 includes a casing or housing 503 and a USB connector substrate 504, where the connector substrate 504 can be plugged into the casing 503. Casing 503 may be made of metal, also referred to as a metal case herein. Connector substrate 504 includes a first end having multiple electrical contact fingers or tabs 505 and a second end having multiple electrical contact pins 507. In one embodiment, pins 507 include multiple rows of pins, each having multiple pins. In a particular embodiment, pins 507 include a first row and a second row, where the first row includes 5 pins and the second row includes 4 or more pins. Connector substrate 504 further includes one or more springs or metal contacts 506 which may be used to provide pressure to another USB connector to have physical contact with contact fingers 505 when the other USB connector is inserted into an opening of the extended USB plug.


In one embodiment, similar to extended USB plug 400, contact fingers 505 may be disposed on a top surface of connector substrate 504 and additional contact fingers (not shown) may be disposed on a bottom surface of connector substrate 504. For example, contact fingers 505 may be compatible with standard USB specification while the additional contact fingers may be designed compatible with other interfaces such as PCI Express or IEEE 1349 specifications. As a result, extended USB plug 500 may be used for multiple different communication interfaces, also referred to as dual personalities.


Referring now to FIG. 5B, where extended USB plug 500 may be attached to a PCBA having a memory device and a memory controller for controlling the memory device. As shown in FIG. 5B as top view 508, side view 509, and bottom view 510, extended USB plug 500 may be attached to PCB substrate, for example, by soldering pins 507 on the PCB substrate. In this example as shown in side view 509, the first row of pins 507 may be soldered on a top surface of the PCB substrate while the second row of pins 507 may be soldered on a bottom surface of the substrate, or vice versa. In addition, a memory device such as flash memory device may be disposed on a surface of the PCB substrate and a memory controller such as a flash controller may be disposed on the other surface of the PCB substrate. In this example, similar to the configuration as shown in FIGS. 4A-4B, a memory device is disposed on a bottom surface of PCB substrate and a memory controller is disposed on a top surface of PCB substrate. Further, the memory device may be an MLC compatible memory IC and the controller may be an MLC compatible memory controller IC.


Similarly, according to a further embodiment, techniques as described with respect to FIGS. 5A-5B may also be applied to a configuration where a flash memory and a flash controller are integrated into a single package such as a chip on board (COB) package as shown in FIG. 5C, where a COB package may be any of the COB packages such as, for example, as those shown in FIGS. 6A-6B. Other configurations may also exist.


According to certain embodiments of the inventions, certain form factors as described above with respect to FIGS. 4-6 can also be utilized in an embedded configuration, for example, embedded within an ordinary computer chassis as a USB component. FIGS. 14A-14C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention.


Referring to FIG. 14A, an embedded USB flash drive or Ready Boost drive is to use with a MLC dual-personality extended USB header vertical receptacle 1401. The USB header vertical receptacle 1401 may include a 9-pin socket that is compatible with an ordinary socket or connector used in an ordinary computer. In this example as shown in FIG. 14A, USB header vertical receptacle 1401 includes two rows of pins 1402-1403, each having five pins. One of the rows 1402-1403, in this example, row 1402 only includes 4 pins, leaving one of the plugs 1404 unattached. As a result, a total of 9 pins are implemented in this example, where functionality of each pin is shown in table 1405. Note that the USB header vertical receptacle 1401 is shown for illustration purposes only; other forms of receptacles may also be implemented.


According to one embodiment, as shown in FIG. 14B, each of the rows 1402-1403 may be mounted or soldered on corresponding electrical contact pads of a surface of a PCBA, for example, one for each of top and bottom surfaces of the PCBA, where a PCBA may be any of the above configurations. For example, referring to FIG. 14B, USB header vertical receptacle 1401 is mounted onto a PCBA 1400 having a MLC controller 1409 and one or more MLC memory ICs 1410-1411, which may be mounted (e.g., surface mounted) on a top surface 1407 and a bottom surface 1408 of PCB 1406. As described above, the USB header vertical receptacle 1401 include two rows of pins, each being mounted on a surface (e.g., top or bottom surfaces) of PCB 1406. As a result, the orientation of plugs of USB header vertical receptacle 1401 is in a direction parallel with the top and bottom surfaces 1407-1408 of PCBA 1400, which would enable the finished USB package to be mounted on (e.g., via a corresponding connector, in this example, a male connector of) a chassis such as a motherboard of a computer in a vertical orientation with respect to a surface of the motherboard.


Alternatively, as shown in FIG. 14C, the PCBA may be implemented as a COB package 1416 mounted on a top surface 1417 of a PCB substrate 1415, for example, by surface mounting one or more metal pads 1418 on the PCB substrate 1415. The COB package 1416 may be implemented a traditional COB 1420 having one row of metal contact pads 1423 or alternatively, an extended COB 1419 having two rows of electrical contact pads 1421-1422, similar to those configurations described above.


The above USB devices may be assembled in a variety of USB drive form factors. FIGS. 15A-15C are block diagrams illustrating certain configurations of an extended USB drive according to certain embodiments of the invention. Referring to FIG. 15A, the structure of a UBS flash drive 1500 includes a top housing 1501 and a bottom housing 1502 for enclosing a USB device 1400 using a snap-together method or apply ultrasonic press for sealing around edges 1503 of housing. The USB device 1400 may include a PCBA 1406 coupled to an extended USB header vertical receptacle 1401. The USB flash drive 1500 is coupled with a motherboard inside a computer chassis by way of 9-pin header receptacle 1401 and a plug. The housing of device 1500 is designed for the purpose of convenience for removing or attaching USB flash drive off or to the mother board. The top and bottom surfaces of housings are used for marking or labeling company's logo or unit specifications descriptions.


Referring now to FIG. 15B, according to an alternative embodiment, the structure of the UBS flash drive 1520 includes a top housing 1521, a bottom housing 1522, and a PCBA 1400 using snap-together method or apply ultrasonic press for sealing around edges 1525 of the housing. The USB flash drive 1520 is coupled with a motherboard inside computer chassis (not shown) by way of 9-pin header receptacle 1401 and a plug. The housing of device 1520 is designed for the purpose of convenience for removing or attaching USB flash drive 1520 off or to the motherboard. The top and bottom housings 1521-1522 have certain perforations 1523-1524 for a weigh reduction and air flow purpose.



FIG. 15C shows an alternative embodiment of the design similar to the one shown in FIG. 15B. Referring to FIG. 15C, in this embodiment, the extended USB device 1400 is enclosed by a housing having a top housing portion 1551 and a bottom housing portion 1552, forming an extended USB drive 1550, where each housing portion includes an opening or cut-out 1553-1554 for a weigh reduction and air flow purpose.


As described above, an extended USB drive is coupled to a motherboard of a computer chassis via a 9-pin receptacle, where the extended USB driver is position in a vertical orientation with respect to a surface of the motherboard. According to certain embodiments of the invention, the 9-pin receptacle may be designed in a way such that an extended USB driver is positioned in a horizontal orientation (e.g., parallel) with respect to a surface of the motherboard.



FIGS. 16A-16C are block diagrams illustrating certain configurations of an extended USB device according to certain embodiments of the invention. Referring to FIG. 16A, an embedded USB flash drive or Ready Boost drive is to use with a MLC dual-personality extended USB header vertical receptacle 1601. The USB header vertical receptacle 1601 may include a 9-pin socket that is compatible with an ordinary socket or connector used in an ordinary computer, such as, for example, ATA style connector. In this example as shown in FIG. 16A, USB header vertical receptacle 1601 includes two rows of pins 1602-1603, each having five pins. One of the rows 1602-1603, in this example, row 1602 only includes 4 pins, leaving one of the plugs 1604 unattached. As a result, a total of 9 pins are implemented in this example, where functionality of each pin is shown in table 1605. Receptacle 1601 is designed similar to receptacle 1401 of FIG. 14A, except that pins 1602-1603 are configured as a surface mount pins. Unlike the configuration as shown in FIGS. 14A-14C where the pins 1402-1403 are mounted or soldered on two sides of a PCBA, pins 1602-1603 are surface mounted on one side of the PCBA, for example, as shown in FIG. 16B. As a result, the finished USB driver can be plugged into a socket (e.g., male socket) of the motherboard in parallel with a surface of the motherboard. Note that the USB header vertical receptacle 1601 is shown for illustration purposes only; other forms of receptacles may also be implemented.


According to one embodiment, as shown in FIG. 16B, each of the rows 1602-1603 may be mounted or soldered on corresponding electrical contact pads of a surface of a PCBA, for example, the same surface of the PCBA, where a PCBA may be any of the above configurations. For example, referring to FIG. 16B, USB header vertical receptacle 1601 is surface mounted onto a PCBA 1600 having a MLC controller 1609 and one or more MLC memory ICs 1610-1611, which may be mounted (e.g., surface mounted) on a top surface 1607 and a bottom surface 1608 of PCB 1606. As described above, the USB header vertical receptacle 1601 includes two rows of pins, each being surface mounted on the same surface (e.g., top surface) of PCB 1606. As a result, the orientation of plugs of USB header vertical receptacle 1601 is in a vertical direction with the top and bottom surfaces 1607-1608 of PCBA 1600, which would enable the finished USB package to be mounted on (e.g., via a corresponding connector, in this example, a male connector of) a chassis such as a motherboard of a computer in a horizontal orientation with respect to a surface of the motherboard.


Alternatively, as shown in FIG. 16C, the PCBA may be implemented as a COB package 1616 mounted on a top surface 1617 of a PCB substrate 1615, for example, by surface mounting one or more metal pads on the PCB substrate 1615. The COB package 1616 may be implemented a traditional COB 1620 having one row of metal contact pads 1623 or alternatively, an extended COB 1619 having two rows of electrical contact pads 1621-1622, similar to those configurations described above. Note that USB device as shown in FIGS. 16A-16C may be enclosed by a housing similar to those as shown in FIGS. 15A-15C. Other configurations may exist.


According to certain embodiments of the invention, the PCBA and/or COB packages as described above with dual personality can also be used with a mini-USB and/or micro-USB connectors. Smaller USB plugs and receptacles such as Mini USB and later on Micro USB have been introduced to the USB systems. The applications have used mostly in handheld or small, light mobile devices such as digital camera, cellular phone, MP3, PDA, cam recorder, etc. The data transferring from such devices to host computer is taken place by using a cable assembly.



FIGS. 17A-17C are diagrams illustrating a dual personality extended USB plug having a small form factor according to one embodiment of the invention. Referring to FIGS. 17A-17C, according to one embodiment, extended USB plug 1700 includes a front portion 1701 formed with a metal case 1706 for shielding purposes and a rear portion 1702 having a connector substrate 1707 having dual personality. The front portion 1701 includes a tip portion 1708 having a tongue portion 1709 extended from the metal shield case 1710 as shown in FIG. 17B. Referring to FIGS. 17A and 17B, four electrical contact pins 1781 are disposed on a bottom surface of the tongue portion 1709 labeled as pins 6-9 having functionality as showed in table 1703. In addition, five electrical contact pins 1782 are disposed on a top surface of the tongue portion 1709 labeled as pins 1-5 having functionality as shown in table 1703. In one embodiment, the four pins disposed on the bottom surface of the tongue portion are configured to be compatible with a standard USB specification and the five pins disposed on the top surface of the tongue portion are configured to be compatible with the extended USB specification. Note that the number of pins used with the extended USB plug 1700 is described for the purposes of illustration only. More or fewer pins, as well as different positions, may also be applied.


In addition, rear portion 1702 includes a couple of tabs, at least one on each side of the rear portion 1702 and the front portion 1701 includes a couple of slots or opening 1712 disposed on the corresponding sides of the front portion 1701. When the rear portion 1702 is inserted into front portion 1701, the front portion 1701 and the rear portion 1702 are snapped together via the tabs 1711 and the slots 1712. In this example, the tabs 1711 are used as locking pieces that lock the rear portion 1702 inserted into the front portion 1701.


The front portion 1701 includes the tongue portion 1709 and its shielding case 1710 having nine pins disposed thereon as shown in FIG. 17B. According to one embodiment, rear portion 1702 includes a first row 1704 of pins and a second row 1705 of pins corresponding to the extended USB specification and a standard USB specification respectively. The tip portion 1713 of rear portion 1702 includes multiple contact pins or pads 1783 corresponding to and extended from the pins of the rows 1704-1705. When the tip portion 1713 of the rear portion 1702 is inserted into the tip portion 1708 of the front portion 1701 and snapped together via tabs 1711 and slots 1712, the electrical contact pins of the tip portion 1713 are engaged with the corresponding contact pins 1781 and 1782 disposed on the tongue portion 1709 of the front portion 1701.


Furthermore, the tip portion 1713 of the rear portion 1702 further includes a couple of lock pieces 1715 that can be extended and exposed through the corresponding slots 1714 of the tip portion 1708 of the front portion 1701, when the rear portion 1702 is inserted into the front portion 1701. The locking pieces 1715 are pushed upwardly through the slots 1714 by a couple of springs 1716 disposed on a bottom surface of the tip portion 1708. The lock pieces 1715 may be used to lock a USB receptacle, such as the one shown in FIG. 18A, when the plug 1700 is engaged with the USB receptacle.


According to one embodiment, as described above, the pins of rows 1704-1705 may be mounted on a top and bottom surface of a PCBA or a COB package as shown in FIG. 17B. Referring to FIG. 17B, extended USB plug with dual personality 1700 is mounted on a PCBA 1730 with a flash controller IC 1731 disposed on a top surface 1733 and one or more flash memory ICs 1732 disposed on a bottom surface 1734 of the PCBA 1730.


Furthermore, according to another embodiment, an extended USB plug similar to the one as shown in FIG. 17A may also be used in a USB cable assembly as shown in FIG. 17C. Referring to FIG. 17C, an extended USB plug 1750 similar to the one shown in FIG. 17A is attached to a cable as shown in an exploded view 1751. Similar to the one shown in FIG. 17A, the USB plug 1750 includes a front piece 1753 and a rear piece 1754. The front and read pieces 1753-1754 may be attached together via one or more tabs 1755 snapped into the corresponding slots 1756. The rear piece 1754 includes multiple electrical pins or pads 1757 to allow multiple wires 1758 to be connected or soldered thereon. The front piece 1753 includes one or more loops 1759 made of elastic material bent around wires 1758 after the front and rear pieces 1753-1754 are snapped together, where the wires 1758 are enclosed by an outer jacket 1760. The assembly 1751 may then be covered by a plastic molding cover 1761 forming an extended USB cable assembly having dual personality.



FIGS. 18A-18C are diagrams illustrating a dual personality extended USB receptacle having a small form factor according to one embodiment of the invention. Referring to FIG. 18A, an extended USB receptacle 1800, which may be coupled to an extended USB plug connector such as the one shown in FIG. 17A, includes a connector substrate 1801 which may be inserted or covered by a metal case 1802. The connector substrate 1801 includes a tongue portion 1804 having multiple pins disposed on both surfaces of the tongue portion which forms a dual personality. In this example, five pins compatible with the extended USB specification are disposed on a top surface of the tongue portion and four pins compatible with the standard USB specification are disposed on a bottom surface of the tongue portion. The connector substrate 1801 further includes multiple pins 1803 on a rear end opposite to the tongue portion, where each of the pins 1803 is electrically coupled to each of the pins disposed on the tongue portion 1804. The functionally of the pins are listed in table 1805. The receptacle 1800 may be mounted, via mounting brackets 1871, on a PCBA or COB 1806 as shown in FIG. 18B.


Similar to the configuration as shown in FIG. 17C, the assemblies as shown in FIG. 18A may also be applied to a USB cable assembly as shown in FIG. 18C. Referring to FIG. 18C, similar to the extended USB receptacle 1800, extended USB receptacle 1850 may be attached to a USB cable 1860 via a loop 1859, forming a cable assembly in an exploded view 1851. The cable assembly 1852 includes an upper metal case 1871 and a lower metal case 1872 snapped together via one or more tabs 1855 and slots 1856. The cable assembly 1852 further includes a connector substrate 1854, having a configuration similar to the one as shown in FIG. 18A, attached to multiple wires 1858 via corresponding pins 1857, where the wires 1858 are covered by an outer jacket 1860. Thereafter, the assembly is covered by a plastic molding cover 1861, forming a finished extended USB cable assembly having dual personality.



FIG. 19 is a diagram illustrating an extended USB plug and receptacle having dual personality according to an alternative embodiment. Referring to FIG. 19, extended USB receptacle connector 1901 may be implemented similar to the one as shown in FIG. 18A and the extended USB plug connector 1902 may be implemented similar to the one as shown in FIG. 17A. Other configurations may also be implemented.


According to certain embodiments of the invention, the techniques described above with respect to above FIGS. can be used in designing an extended USB portable storage device. FIG. 7 is a block diagram illustrating an example of an extended USB device having an extended USB plug with multiple personalities according to one embodiment of the invention. Referring to FIG. 7, USB package 703 which may include an extended USB plug 701 having multiple interfaces or personalities as described and a PCBA 704 may be enclosed by a housing as an extended USB device 700. Note that package 703 may be an apparatus as described in FIGS. 4A-4B or alternatively, as an apparatus as shown in FIGS. 5A-5C. The housing for housing the package 703 includes a top housing 705 and a bottom housing 706. The top housing 705 and the bottom housing 706 may be attached to each other via a variety of methods, including using a snap together method or applying ultrasonic press for sealing around edges of top housing 705 and bottom housing 706.


Note that extended USB device 700 as shown in FIG. 7 may be implemented in a variety of configurations, such as, those as shown in FIGS. 8A-8B and 9. FIGS. 8A-8B are block diagrams illustrating examples of USB devices having an extended USB plug with multiple interfaces or personalities. Referring to FIG. 8A, extended USB device 800 includes an extended USB plug 801 as described above and a press/push button 802 that can be used to push and/or pull the extended USB plug 801 as well as the attached herein PCBA 803 having a flash memory controller 812 (e.g., MLC controller) and a memory IC 804 (e.g., MLC memory IC) in and out of a housing of extended USB device 800. The housing includes a top housing 805 and a bottom housing 806 which may be attached together via a snap together method or via ultrasonic sealing. In addition, extended USB device 800 includes a PCB holder 807 to maintain a press/push mechanism to deploy and retract USB plug in and out of the housing.


According to an alternatively embodiment as shown in FIG. 8B, a press/push button may be implemented on a side surface. Referring to FIG. 8B, extended USB device 850 includes an extended USB plug 851 as described above and a press/push button 857 that can be used to push and/or pull the extended USB plug 851 as well as the attached herein PCBA 853 having a flash memory controller 852 (e.g., MLC controller) and a memory IC 804 (e.g., MLC memory IC) in and out of a housing of extended USB device 850. The housing includes a top housing 855 and a bottom housing 856 which may be attached together via a snap together method or via ultrasonic sealing. In addition, extended USB device 850 includes a PCB holder 858 to maintain a press/push mechanism to deploy and retract USB plug in and out of the housing. Further detailed information regarding the press/push mechanism above can be found in a co-pending U.S. patent application Ser. No. 11/845,747, filed Aug. 27, 2007, which has been assigned to a common assignee of the present application and is incorporated by reference herein in its entirety.



FIG. 9 is a block diagram illustrating an example of extended USB device having an extended USB plug with multiple personalities according to one embodiment of the invention. Referring to FIG. 9, extended USB device 900 is a MLC compatible USB flash drive in which a swivel cap 901 is attached to the extended USB device 900 by a pivot pin with at least two locking positions 902.


Referring to FIG. 9, extended USB flash drive 900 includes a dual-personality extended USB plug 903 as described above and a PCBA 904 with MLC flash memory and/or controller IC 905. Specifically, USB flash drive includes an extended USB device 900 and a swivel cap 901 which is attached to the extended USB device 900 by pressing pivot pins 910 (swivel cap) into pivot holes 906 (top/bottom housing). Locking positions of swivel cap related to the USB device are obtained whenever lock pins 909 (swivel cap) snap into lock holes (top/bottom housing). The extended USB device 900 includes a top, bottom housing 907-908 and a PCBA 904 as described above. The assembly of top and bottom housing 907-908 utilizes snap-together method or apply ultrasonic press for sealing around edges of housing 907-908. Other configurations may exist.



FIG. 10A is a block diagram of an exemplary host with one embodiment of an extended-USB socket that supports extended-mode communication. The configuration as shown in FIG. 10A may be utilized with embodiments of techniques described above. A variety of extended-USB or USB peripherals 168 could be plugged into extended-USB socket 166 of host 152. For example, a SATA peripheral, a PCI-Express peripheral, a Firewire IEEE 1394 peripheral, a Serial-Attached SCSI peripheral, or a USB-only peripheral could be inserted. Each can operate in its own standard mode.


Host 152 has processor system 150 for executing programs including USB-management and bus-scheduling programs. Multi-personality serial-bus interface 160 processes data from processor system 150 using various protocols. USB processor 154 processes data using the USB protocol, and inputs and outputs USB data on the USB differential data lines in extended USB socket 166.


The extended metal contact pins in extended USB socket 166 connect to multi-personality bus switch 162. Transceivers in multi-personality bus switch 162 buffer data to and from the transmit and receive pairs of differential data lines in the extended metal contacts for extended protocols such as PCI-Express, Firewire IEEE 1394, Serial-Attached SCSI, and SATA. When an initialization routine executed by processor system 150 determines that inserted peripheral 168 supports SATA, personality selector 164 configures multi-personality bus switch 162 to connect extended USB socket 166 to SATA processor 158. When the initialization routine executed by processor system 150 determines that inserted peripheral 168 supports PCI-Express, personality selector 164 configures multi-personality bus switch 162 to connect extended USB socket 166 to PCI-Express processor 156. Then processor system 150 communicates with either PCI-Express processor 156 or SATA processor 158 instead of USB processor 154 when extended mode is activated.



FIG. 10B is a block diagram of an exemplary peripheral with one embodiment of an extended-USB connector that supports extended-mode communication. The configuration as shown in FIG. 10B may be utilized with embodiments of techniques described above. Multi-personality peripheral 172 has extended USB connector 186 that could be plugged into extended-USB socket 166 of host 152 that has extended-mode communication capabilities such as SATA, 1394, SA-SCSI, or PCI-Express. Alternately, extended USB connector 186 of multi-personality peripheral 172 could be plugged into standard-USB socket 187 of host 188 that only supports standard USB communication.


Multi-personality peripheral 172 has processor system 170 for executing control programs including USB-peripheral-control and response programs. Multi-personality serial-bus interface 180 processes data from processor system 170 using various protocols. USB processor 174 processes data using the USB protocol, and inputs and outputs USB data on the USB differential data lines in extended USB connector 186.


The extended metal contact pins in extended USB connector 186 connect to multi-personality bus switch 182. Transceivers in multi-personality bus switch 182 buffer data to and from the transmit and receive pairs of differential data lines in the extended metal contacts for extended protocols such as PCI-Express, 1394, SA SCSI, and SATA. When a control or configuration routine executed by processor system 170 determines that host 152 has configured multi-personality peripheral 172 for SATA, personality selector 184 configures multi-personality bus switch 182 to connect extended USB connector 186 to SATA processor 178. When the initialization routine executed by processor system 170 determines that inserted peripheral 188 supports PCI-Express, personality selector 184 configures multi-personality bus switch 182 to connect extended USB connector 186 to PCI-Express processor 176. Then processor system 170 communicates with either PCI-Express processor 176 or SATA processor 178 instead of USB processor 174 when extended mode is activated.


If a PCI Express device with an extended USB plug is plugged into a host system with a conventional USB receptacle, nothing will be recognized if the PCI Express device does not support USB. The host system will not see anything that has plugged into the system. The same is true for a SATA-only device, etc.



FIG. 11 is a flowchart of one embodiment of an initialization routine executed by a host for detecting a device plugged into an extended USB socket. A host such as a PC can have an extended USB socket. Either an extended USB device, or a standard USB device can be plugged into the extended USB socket. This routine detects whether the inserted device supports extended-USB mode or only standard USB mode. The routine may be executed by processor system 150 of FIG. 10A.


The host detects a newly-inserted device plugged into the extended USB socket, step 200, such as by detecting resistance changes on the metal contact pins of the extended USB socket. When the newly-inserted device is detected, a USB reset command is sent over the USB differential signal lines to the device, step 202. A USB read-status command is then sent by the host, step 204.


The peripheral device responds by sending its status information using USB protocols. The host examines this status information, and in particular looks for a mode identifier indicating that the peripheral supports extended-USB mode. This mode identifier can be a status bit or a unique code in an area reserved for use by the peripheral vendor to identify the peripheral's type or capabilities.


When the peripheral responds with a status indicating no extended-USB support, step 206, then processing continues in native USB mode, step 214. Standard USB transactions are performed between the host and the peripheral using the differential USB data pins in the four-pin side of the extended USB socket. The peripheral likely has a standard USB connector that has only 4 metal contact pins, not the extension with the 8 additional metal contact pins.


When the peripheral responds with a status indicating extended-USB support, step 206, then the host further examines the packet from the peripheral to determine that the peripheral can support higher-speed communication using the extended metal contact pins, step 208. The peripheral has an extended USB connector with the 8 additional metal contact pins in an extension portion of the connector.


The host can further examine the capabilities of the peripheral, such as to determine which extended modes are supported, step 210. Some peripherals may support PCI-Express communication in extended mode, while others support Serial-ATA, Serial Attached SCSI, or IEEE 1394 as the extended-mode protocol.


The host then sends a vendor-defined USB OUT command to the peripheral, step 212. This command instructs the peripheral to activate its extended mode of operation. The host verifies that the device received the command by reading its status again, step 216. The peripheral responds with a ready status, step 218. If the status read back from the device does not indicate that the peripheral is ready to switch to extended mode, step 220, then the device fails, step 224. The host could fall back on standard USB mode, step 214, or attempt again to activate extended mode, step 202. After trying a predetermined number of times, the host falls back on standard USB mode, step 214.


When the peripheral responds with the correct ready, step 220, then the host and peripheral can begin communicating in the extended mode. The 8 additional metal contact pins in the extended portion of the USB connector and socket are used for communication rather than the 4 USB metal contact pins. For example, the PCI-Express transmit and receive differential pairs can be used to bidirectionally send and receive data when the device has a PCI-Express personality. The host uses these extended pins to send a read-status command to the peripheral, step 222. Data can be sent and received at the higher rates supported by PCI-Express rather than the slower USB rates.



FIG. 12 is a flowchart of one embodiment of an initialization routine executed by a peripheral device plugged into an extended USB socket. A peripheral can have an extended USB connector that can be plugged into either an extended USB socket or a standard USB socket. This routine executes on the peripheral device and helps the host detect that the inserted device supports extended-USB mode. The routine may be executed by peripheral-device processor system 170 of FIG. 10B.


When the peripheral device is plugged into the USB socket, power is received though the power and ground pins on the 4-pin USB portion of the connector, step 226. The peripheral device executes any initialization procedures to power itself up, step 228, and waits for a reset command from the host, step 230. Once the reset command is received from the host, the peripheral device resets itself, step 232.


The peripheral device waits for further commands from the host, step 234, such as a read-status command. The status read by the host, or further data read by the host can contain capability information about the peripheral device, such as which extended modes are supported, PCI-Express, SATA, IEEE 1394, SA SCSI, etc., step 236. The reset and read-status commands are standard USB commands from the host.


The peripheral device then waits for a command from the host to enable extended-mode communication, step 238. An enable command followed by another read-status command must be received, so the peripheral waits for the read-status command, step 240. Once the read-status command is received, the peripheral responds with an OK or READY status to indicate that it is ready to switch to using the extended metal contact pins on the connector, step 242.


Then the peripheral device switches its bus transceivers to match the bus-protocol specified by the host to be able to communicate over the 8 extension metal contact pins, step 244. The 4 USB metal contact pins are not used. The peripheral device waits for a read-status command sent by the host over the extended metal contact pins and responds to this read-status command, step 246, initializing for the new protocol mode. The peripheral device can then receive extended commands such as PCI-Express commands that are received over the extended metal contact pins on the extended portion of the connector, such as the PCI-Express transmit and receive differential lines, step 248.



FIG. 13 is a table of extended and standard pins in one embodiment of an extended USB connector and socket. The A side of the pin substrates contains the four standard USB signals, which include a 5-volt power signal and ground. The differential USB data D−, D+ are carried on pins 2 and 3. These pins are not used for extended modes.


Side B of the pin substrates, or the extension of the primary surfaces, carries the extended signals. Pin 1 is a 3.3-volt power signal for modified PCI-Express generation 0 and Serial-ATA (SATA), while pin 2 is a 1.5-volt supply for modified PCI-Express generation 0 and reserved for SATA. For modified PCI-Express generations 1, 2, and 3, pins 1 and 2 carry the transmit differential pair, called PETn, PETp, respectively. Pin 8 is a 12-volt power supply for SATA and reserved for modified PCI-Express generation 0. Pin 8 is a ground for modified PCI-Express generations 2 and 3. Pin 5 is a ground for modified PCI-Express generation 0 and SATA.


Pins 3 and 4 carry the transmit differential pair, PETn, PETp, respectively, for modified PCI-Express generation 0, and T−, T+, respectively, for SATA. Pin 3 is a ground for modified PCI-Express generations 1, 2, and 3. Pin 4 and pin 5 carry receive differential pair, called PERn and PERp, respectively, for modified PCI-Express generations 1, 2, and 3. Pins 6 and 7 carry the receive differential pair, PERn, PERp, respectively, for modified PCI-Express generation 0 and R−, R+, respectively, for SATA. Pins 6 and 7 carry a second transmit differential pair, called PETn1 and PETp1, respectively, for modified PCI-Express generations 2 and 3.


Pins 9 and 10 carry a second receive differential pair, called PERn1 and PERp1, respectively, for modified PCI-Express generations 2 and 3.


Pins 11 and 12 carry a third transmit differential pair, called PETn2 and PETp2, respectively, for modified PCI-Express generation 3. Pin 13 is a ground for modified PCI-Express generation 3. Pins 14 and 15 carry a third receive differential pair, called PERn2 and PERp2, respectively, for modified PCI-Express generation 3.


Pins 16 and 17 carry a fourth transmit differential pair, called PETn3 and PETp3, respectively, for modified PCI-Express generation 3. Pin 18 is a ground for modified PCI-Express generation 3. Pins 19 and 20 carry a fourth receive differential pair, called PERn3 and PERp3, respectively, for modified PCI-Express generation 3.


The ExpressCard pins REFCLK+, REFCLK−, CPPE#, CLKREQ#, PERST#, and WAKE# are not used in the extended USB connector to reduce the pin count. Additional pins may be added to the extended USB connector and socket if some or all of these pins are desired. Furthermore, the pin names and signal arrangement (or order) illustrated in FIG. 10 is merely one embodiment. It should be apparent that other pin names and signal arrangement (or order) may be adopted in other embodiments.


Some portions of the preceding detailed descriptions have been presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the ways used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of operations leading to a desired result. The operations are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.


It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the above discussion, it is appreciated that throughout the description, discussions utilizing terms such as “processing” or “computing” or “calculating” or “determining” or “displaying” or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices.


Embodiments of the present invention also relate to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but is not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), erasable programmable ROMs (EPROMs), electrically erasable programmable ROMs (EEPROMs), magnetic or optical cards, or any type of media suitable for storing electronic instructions, and each coupled to a computer system bus.


The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method operations. The required structure for a variety of these systems will appear from the description below. In addition, embodiments of the present invention are not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of embodiments of the invention as described herein.


A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium includes read only memory (“ROM”); random access memory (“RAM”); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.); etc.


In the foregoing specification, embodiments of the invention have been described with reference to specific exemplary embodiments thereof. It will be evident that various modifications may be made thereto without departing from the broader spirit and scope of the invention as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.

Claims
  • 1. An extended universal serial bus (USB) plug connector, comprising: a connector substrate including a frontend having a first set of a plurality of electrical contact pins disposed thereon and a backend having a second set of a plurality of electrical contact pins disposed thereon, wherein the first set includes a first row of electrical contact pins disposed on a top surface of the connector substrate and a second row of electrical contact pins disposed on the top surface of the connector substrate, the second row of electrical contact pins being disposed near and in parallel with the first row of electrical contact pins and interior to the first row of electrical contact pins, wherein the second row includes more electrical contact pins than the first row, wherein the second set forms a third row of electrical contact pins disposed on the backend of the connector substrate,wherein the second set of electrical contact pins are electrically coupled to counterpart pins of the first row and second row of electrical contact pins respectively, wherein the second set of electrical contact pins includes a number of electrical contact pins equal to the first row and second row of electrical contact pins in total, wherein the second set of electrical contact pins are used to connect to corresponding electrical contact pads disposed on an edge of a printed circuit board assembly (PCBA) having a USB controller and one or more flash memory devices disposed thereon,wherein each of the electrical contact pins of the second row further includes a spring disposed thereon to provide pressure between the second row and corresponding counterpart pins of the external device for better electrical conductance, wherein the electrical contact pins of the first row are compatible with standard USB specification, and wherein the electrical contact pins of the first row and second row in combination are arranged in compatible with a second communications interface compatible with PCI Express specification,wherein the first row of the first set comprises four electrical contact pins comprises and the second row of the first set comprises five electrical contact pins, wherein the second set of electrical contact pins comprises nine electrical contact pins, wherein the second set of electrical contact pins are arranged in a single row that can be surface mounted on the corresponding electrical pads of the PCBA, and wherein at any given time, only one of the first set and second set of electrical contact pins is utilized in either a standard USB mode or a PCI-Express mode, respectively; anda housing for covering the connector substrate, wherein the first row and second row of electrical contact pins are used to provide an electrical interface compatible with a USB specification to an external device to access the flash memory devices using a USB compatible communications protocol.
  • 2. An extended USB storage device, comprising: a printed circuit board (PCB) assembly (PCBA) having a flash controller and one or more flash memory devices disposed thereon, wherein the PCBA includes a third set of electrical contact pads compatible with a standard USB specification and a fourth set of electrical contact pads compatible with an extended USB specification; andan extended USB plug connector coupled to the PCBA, the extended USB plug connector including a connector substrate including a frontend having a first set of a plurality of electrical contact pins disposed thereon and a backend having a second set of a plurality of electrical contact pins disposed thereon, wherein the first set includes a first row of electrical contact pins disposed on a top surface of the connector substrate and a second row of electrical contact pins disposed on the top surface of the connector substrate, the second row of electrical contact pins being disposed near and in parallel with the first row of electrical contact pins and interior to the first row of electrical contact pins, wherein the second row includes more electrical contact pins than the first row, wherein the second set forms a third row of electrical contact pins disposed on the backend of the connector substrate,wherein the second set of electrical contact pins are electrically coupled to counterpart pins of the first row and second row of electrical contact pins respectively, wherein the second set of electrical contact pins includes a number of electrical contact pins equal to the first row and second row of electrical contact pins in total, wherein the second set of electrical contact pins are surface mounted onto the third set and the fourth set of electrical contact pads of the PCBA respectively,wherein each of the electrical contact pins of the second row further includes a spring disposed thereon to provide pressure between the second row and corresponding counterpart pins of the external device for better electrical conductance, wherein the electrical contact pins of the first row are compatible with standard USB specification, and wherein the electrical contact pins of the first row and second row in combination are arranged in compatible with a second communications interface compatible with PCI Express specification,wherein the first row of the first set comprises four electrical contact pins comprises and the second row of the first set comprises five electrical contact pins, wherein the second set of electrical contact pins comprises nine electrical contact pins, wherein the second set of electrical contact pins are arranged in a single row that can be surface mounted on the corresponding electrical pads of the PCBA, and wherein at any given time, only one of the first set and second set of electrical contact pins is utilized in either a standard USB mode or a PCI-Express mode, respectively, anda housing for covering the connector substrate.
  • 3. The extended USB storage device of claim 2, wherein the USB controller is disposed on a top surface of the PCBA while the one or more flash memory devices are disposed on a bottom surface of the PCBA.
  • 4. The extended USB storage device of claim 2, wherein the USB controller and the one or more flash memory devices are packaged as a chip-on-board (COB) package disposed on the top surface or bottom surface of the PCBA.
RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 11/876,597, now U.S. Pat. No. 7,815,469, filed Oct. 22, 2007, entitled “Dual-Personality Extended USB Plugs and Receptacles Using with PCBA and Cable Assembly.” Application Ser. No. 11/876,597 is a continuation-in-part (CIP) of co-pending U.S. patent application Ser. No. 11/874,767, filed Oct. 18, 2007, entitled “Extended USB Plug, USB PCBA, and USB Flash Drive With Dual-Personality for Embedded Application with Mother Boards”, which is a CIP of U.S. patent application Ser. No. 11/866,927, filed Oct. 3, 2007, entitled “Extended USB Plug, USB PCBA and USB Flash Drive with Dual-Personality”, which is a CIP of U.S. patent application Ser. No. 11/864,696, entitled “Backward Compatible Extended USB Plug And Receptacle With Dual Personality”, filed Sep. 28, 2007, which is a CIP of U.S. Patent application for “Electronic Data Storage Medium with Fingerprint Verification Capability,” U.S. application Ser. No. 11/624,667, now abandoned, filed Jan. 18, 2007, and a continuation-in-part of U.S. Patent application for “Extended Secure-Digital Card Devices and Hosts,” U.S. application Ser. No. 10/854,004, now U.S. Pat. No. 7,836,236, filed May 25, 2004, which is a continuation-in-part of U.S. patent application Ser. No. 10/708,172, filed Feb. 12, 2004, now U.S. Pat. No. 7,021,971. Application Ser. No. 11/876,597 is also a CIP of U.S. patent application Ser. No. 11/864,671, filed Sep. 28, 2007, now abandoned, which is a CIP of U.S. patent application Ser. No. 11/466,759, filed Aug. 23, 2006, now U.S. Pat. No. 7,702,831, entitled “Flash Memory Controller for Electronic Data Flash Card. Application Ser. No. 11/876,597 is also a CIP of co-pending U.S. patent application Ser. No. 11/845,747, filed Aug. 27, 2007. Application Ser. No. 11/876,597 is also related to U.S. Pat. Nos. 7,108,560, 7,104,848, and 7,125,287. The disclosure of the above-identified applications and patents is incorporated by reference herein in its entirety.

US Referenced Citations (73)
Number Name Date Kind
5277596 Dixon Jan 1994 A
5490786 Mosquera et al. Feb 1996 A
5564933 Bouchan et al. Oct 1996 A
5623552 Lane Apr 1997 A
5907856 Estakhri et al. May 1999 A
5959541 DiMaria et al. Sep 1999 A
6000006 Bruce et al. Dec 1999 A
6012636 Smith Jan 2000 A
6069920 Schulz et al. May 2000 A
6081858 Abudayyeh et al. Jun 2000 A
6125192 Bjorn et al. Sep 2000 A
6193152 Fernando et al. Feb 2001 B1
6202138 Estakhri et al. Mar 2001 B1
6230233 Lofgren et al. May 2001 B1
6270379 Huang et al. Aug 2001 B1
6275894 Kuo et al. Aug 2001 B1
6321478 Klebes Nov 2001 B1
6364713 Kuo Apr 2002 B1
6547130 Shen Apr 2003 B1
6636929 Frantz et al. Oct 2003 B1
6671808 Abbott et al. Dec 2003 B1
6718407 Martwick Apr 2004 B2
6733329 Yang May 2004 B2
6796839 Wu Sep 2004 B1
6854984 Lee et al. Feb 2005 B1
6880024 Chen et al. Apr 2005 B2
6986681 Tsai Jan 2006 B2
6997733 Peng Feb 2006 B2
7103765 Chen Sep 2006 B2
7108560 Chou et al. Sep 2006 B1
7125287 Chou et al. Oct 2006 B1
7128617 Wang et al. Oct 2006 B2
7165998 Lee et al. Jan 2007 B2
7182646 Chou et al. Feb 2007 B1
7232346 Hu et al. Jun 2007 B2
7249978 Ni Jul 2007 B1
7257714 Shen Aug 2007 B1
7318752 Fujimoto et al. Jan 2008 B2
7361059 Harkabi et al. Apr 2008 B2
7416419 Collantes et al. Aug 2008 B2
7427214 Liao et al. Sep 2008 B2
7440286 Hiew et al. Oct 2008 B2
7497732 Yi Mar 2009 B2
7540786 Koser et al. Jun 2009 B1
7625243 Chen et al. Dec 2009 B2
7815469 Nguyen et al. Oct 2010 B1
8021166 Nguyen et al. Sep 2011 B1
8083546 Lee Dec 2011 B2
20010043174 Jacobsen et al. Nov 2001 A1
20020166023 Nolan et al. Nov 2002 A1
20030046510 North Mar 2003 A1
20030163656 Ganton Aug 2003 A1
20040148482 Grundy et al. Jul 2004 A1
20040255054 Pua et al. Dec 2004 A1
20050102444 Cruz May 2005 A1
20050120146 Chen et al. Jun 2005 A1
20050160213 Chen Jul 2005 A1
20050193161 Lee et al. Sep 2005 A1
20050246243 Adams et al. Nov 2005 A1
20050268082 Poisner Dec 2005 A1
20060026348 Wallace et al. Feb 2006 A1
20060065743 Fruhauf Mar 2006 A1
20060075174 Vuong Apr 2006 A1
20060106962 Woodbridge et al. May 2006 A1
20060161725 Lee et al. Jul 2006 A1
20060206702 Fausak Sep 2006 A1
20060242395 Fausak Oct 2006 A1
20070094489 Ota et al. Apr 2007 A1
20070113067 Oh et al. May 2007 A1
20070113267 Iwanski et al. May 2007 A1
20070130436 Shen Jun 2007 A1
20070290050 Chen Dec 2007 A1
20110092109 Chou et al. Apr 2011 A1
Related Publications (1)
Number Date Country
20110003514 A1 Jan 2011 US
Continuations (1)
Number Date Country
Parent 11876597 Oct 2007 US
Child 12884732 US
Continuation in Parts (9)
Number Date Country
Parent 11874767 Oct 2007 US
Child 11876597 US
Parent 11866927 Oct 2007 US
Child 11874767 US
Parent 11864696 Sep 2007 US
Child 11866927 US
Parent 11624667 Jan 2007 US
Child 11864696 US
Parent 10854004 May 2004 US
Child 11624667 US
Parent 10708172 Feb 2004 US
Child 10854004 US
Parent 11864671 Sep 2007 US
Child 11876597 US
Parent 11466759 Aug 2006 US
Child 11864671 US
Parent 11845747 Aug 2007 US
Child 11876597 US