The present invention relates to the field of computer simulation of analog and mixed signal digital-analog physical circuits and systems, and more particularly to solving systems of simultaneous equations including dynamically changing equations.
Simulation methods and apparatus are useful in increasing design productivity in a wide variety of applications because design defects can be detected prior to construction of the actual apparatus being simulated. Where the physical circuit or system includes an analog or mixed signal analog-digital component, simulation requires solving a system of simultaneous equations. The variables in these equations can be classified into one of several categories, depending on how their solutions are obtained. Input variables are variables whose values are effectively inputs to the system. Output variables are variables whose values are outputs of the system. Intermediate and system variables are variables that comprise the heart of the system, and whose values generally feedback on themselves.
In existing simulation systems, system variables exist in a one-to-one correspondence with some related equation; there is exactly one equation for each system variable slot. The relationship between a system variable and its related equation is determined prior to simulation and does not change during the simulation. Although this relationship is desirable, it is not always achievable. Occasionally one or more of the equations in the system of simultaneous equations are dynamic: i.e., the specific equation changes depending on specific circumstances of the system of simultaneous equations. Standard techniques for solving systems of simultaneous equations break down in the presence of simulation time changes in the relationship between equations and system variables.
Accordingly, a need exists for a technique for solving systems of simultaneous equations including conditional equations.
The simulator assembles a system of simultaneous equations. Equations that do not change depending on the circumstances are permanently associated with slots and therefore with a system variables. The conditions that apply to the conditional equations are evaluated. The conditional equation is active when the conditions related to the conditional equation evaluate to true. The active conditional equations are then assigned to slots in the system of simultaneous equations, which can then be solved to determine the values of the system variables. If additional evaluations of the system of equations are required, the active conditional equations can be cleared from the slots, and a new set of active conditional equations selected.
The foregoing and other objects, features and advantages of the invention will become more readily apparent from the following detailed description of a preferred embodiment, which proceeds with reference to the drawings.
Software systems that perform hardware simulation can do so using analog and discrete descriptions of the hardware behavior. Analog descriptions of the behavior are described as a set of simultaneous equations that need to be solved by a simultaneous equation solution algorithm in order to determine how the simulated system will behave. The simultaneous equations are expressed in terms of a certain number of unknowns and to find a solution there must be exactly one equation for each of the unknowns. The term ‘system variable’ describes the set of unknowns within the set of equations. Simulation systems may decrease the size of the system of equations and the number of system variables by using techniques such as those described in the above-identified U.S. Pat. No. 6,532,569 entitled “Classification of the Variables in a System of Simultaneous Equations Described By Hardware Description Languages.”
In analog designs, it is advantageous to be able to have equations that change during simulation in order to describe regions of operation for some device, a shown by a simple, illustrative example. Table 1 describes the behavior of a MOS transistor using conditions that describe the three regions of operation for the transistor. The example assumes:
This system requires that the equations change during simulation as the model changes between the regions. This invention provides an efficient method for changing between the equations during simulation.
In a system of simultaneous equations, each system variable is said to have a “slot” and there is some set of equations that can be used to fill the slot in order to associate the system variable with an equation for solving the system of equations. The invention is a system and method that permits a simulation-time (i.e., dynamic) association between a set of conditional equations and a set of system variable slots when the number of conditional equations is at least as large as the number of system variable slots. In this approach, the equation that fills the slot is not predetermined prior to simulation. Slots can be filled with different equations at different analog solution iterations during the simulation and an equation can populate different slots at different analog solution iterations during the simulation. (An analog solution iteration is defined to occur when the analog solver requires that values need to be determined for the expressions forming the equations in the system.) This system and method is critical for high performance simulation of systems in which the set of active equations in the simultaneous system can change during the simulation. The language described in IEEE Standard 1076.1, subsequently referred to as VHDL-AMS, is a hardware description language used for analog and digital simulation that permits such changes in the set of equations during simulation time and will be used as the context for describing the invention. The invention is not limited, however, to use in VHDL-AMS.
The dynamic association can be carried out as follows, using VHDL-AMS modeling terminology for illustrative purposes, in a simulator identified as VeriasHDL™.
VHDL-AMS defines the set of “characteristic expressions” that define the set of simultaneous equations the simulator must solve at a given analog solution iteration. (The term characteristic expression is defined in VHDL-AMS, and is subsumed by the more general term “conditional equation,” also used in this document.) VHDL-AMS also defines “simultaneous if” and “simultaneous case” statements that permit the set of characteristic expressions to change between analog solution iterations based on some specified condition. The conditions may involve values that change during simulation, which means that the system of simultaneous equations changes while the simulation is progressing. In order to deal with this problem, VeriasHDL defines a dynamic association of equations to system variables. Conditions can nest; a single equation or block of equations can have multiple conditions controlling when the equation or block of equations become active; some of the conditions can also govern other equations and others not. The basic approach is as follows:
Assume that prior to simulation the system partitions the set of system variables (equation unknowns) into two subsets—unknowns with fixed associations to single equations, and unknowns whose equation is selected dynamically from some set of potential conditional equations. One trivial choice is to have all system variables and equations participate in dynamic associations. In non-trivial cases, the analysis only needs to consider equations guarded by conditions whose values change during the simulation and the subset of system variables that are not associated with any of the unguarded equations, but the selection of the set does not otherwise affect the applicability of dynamic association.
Assume that the partitioning results in a set of system variables Q1 . . . Qm and a set of conditional characteristic expressions e1, e2, . . . en existing inside simultaneous if and simultaneous case statements that will participate in the dynamic associations.
For each i from 1 to n, introduce a corresponding temporary variable, ti, related to ei and an assignment of the characteristic expression ei to the temporary variable ti. For each j from 1 to m, generate a new unconditional association between the slot for Qj and a variable q′j where q′j is a new temporary variable that is otherwise undefined. Each q′j is called the dynamic slot target variable for the associated Qj.
During simulation, at a particular analog solution iteration, the active characteristic expressions are determined by evaluating the simultaneous if and case conditions. When a particular expression is determined to be active, say ek, that expression is evaluated and a value is determined for the temporary variable tk. The value of tk is assigned to some q′j, where j denotes some q′ that has not yet been assigned a value in the current analog solution iteration. A straightforward method for making this selection is to start j at 1 and to increment j after each dynamic association. This procedure effectively creates a new association between the slot for Qj and the characteristic expression ek and is then used for the current analog solution iteration.
Table 2 depicts an example situation in which ek, ek+3, and ek+8 are active and are respectively associated with Qj, Qj+1, Qj+2. The symbol “<−>” indicates that the given dynamic slot target variable is associated with the slot for the indicated system variable.
At this point, preliminary values for the q′j have been determined (through the values for the tk). The preliminary values for each q′j and the fixed system variables can then be substituted into the simultaneous equations to see if the system of simultaneous equations is solved. If the values for the q′j and the system variables do not solve the system of simultaneous equations, the direction toward a solution is indicated, and the values for the q′j and the system variables can be perturbed until a solution for the system of simultaneous equations is reached. How the system of simultaneous equations is solved is known in the art, and will not be further described here.
The use of temporaries, tl . . . tn is an implementation convenience. The temporaries tl . . . tn can be replaced by a single temporary or register to move the value computed for a characteristic expression directly into the selected q′.
During the associations, if all q′ variables have been assigned a value and an additional characteristic expression ek becomes active, then an error has occurred in the model since there are then too many equations for the number of unknowns. Similarly, after all active characteristic expressions have been associated, if there are additional q′ variables that have not been associated, an error has occurred in the model since there are too many unknowns for the number of equations.
In an alternative embodiment, the evaluated equation indices can be checked to determine if any of the indices had been associated with system variable slots during the previous analog solution iteration. If any active equations were associated previously with system variable slots, associating the active equations with the same system variable slot as in the previous iteration would improve convergence properties of the analog solution algorithms due to having fewer trajectory changes in the system variables. Any new equations can be associated with the remaining unassociated system variables in the straightforward sequential manner.
Having described and illustrated the principles of the invention in a preferred embodiment thereof, it should be apparent that the invention can be modified in arrangement and detail without departing from such principles. We claim all modifications and variations coming within the spirit and scope of the following claims.
This application claims priority from U.S. Provisional Application No. 60/139,985, filed Jun. 18, 1999. This application is related to U.S. patent application Ser. No 09/590,862 entitled “Classification of the Variables In a System of Simultaneous Equations Described By Hardware Description Languages,”filed Jun. 8, 2000 which is incorporated herein by reference and which has issued on Mar. 11, 2003 as U.S. Patent 6,532,569.
This invention was made with government support under cooperative agreement F30602-96-2-0309 awarded by the Air Force. The Government has certain rights in the invention.
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60139985 | Jun 1999 | US |