This application claims priority to Chinese Patent Application No. 202011261059.8, filed Nov. 12, 2020, which is incorporated herein by reference in its entirety.
The present disclosure relates to optical fiber communication systems, and more particularly, but not exclusively, to systems using dynamic gain equalization (DGE).
Optical fiber communication systems have ever greater demands for bandwidth and capabilities. These optical fiber communication systems may include long spans of transmission fiber and use of optical amplifiers including erbium-doped fiber amplifiers (EDFA). The large number of amplifiers used in long haul communication systems are used to compensate for signal loss in the spans of optical fiber. The multiplicity of EDFA introduces distortions and irregularities in the transmission signal. In some instances, the generated gain curves combine to create an uneven gain profile, or gain ripple. Gain ripple may negatively affect signal transmission and processing.
Accordingly, there is a need for improved capabilities to address the gain ripple in optical fiber communication systems.
In addressing the undesirable gain ripple, there is also an opportunity to improve signal quality through improved amplifier noise or noise figure.
In an aspect of the disclosure, a method for gain control for an optical amplifier module is provided. The method may include receiving an input light signal at a first amplifier. The method may include dynamically adjusting a gain of the input light signal based on feedback monitoring of an output light signal. The method may include receiving the gain adjusted light signal at a second amplifier for output of the optical amplifier module.
In another aspect of the disclosure, an optical amplifier module is provided. The optical amplifier module may include a first stage comprising a first amplifier for receiving a light signal. The optical amplifier module may include a second stage comprising a second amplifier for outputting a boosted light signal. The optical amplifier module may include a gain control module coupled to the first stage and the second stage, the gain control module for receiving the light signal from the first stage for output to the second stage, and further configured to dynamically adjust a gain based on feedback monitoring of the output boosted light signal.
The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. It will, however, be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well known structures and components are shown in block diagram form in order to avoid obscuring such concepts.
Several aspects of the DGE control modules will now be presented with reference to various apparatuses and methods. These apparatuses and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
By way of example, an element, or any portion of an element, or any combination of elements may be implemented with a “processing system” that includes one or more processors. Examples of processors include microprocessors, microcontrollers, digital signal processors (DSPs), field programmable gate arrays (FPGAs), application-specific integrated circuits (ASIC), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure. One or more processors in the processing system may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. The software may reside on a computer-readable medium. The computer-readable medium may be a non-transitory computer-readable medium. A non-transitory computer-readable medium include, by way of example, a magnetic storage device (e.g., hard disk, floppy disk, magnetic strip), solid-state devices (e.g., solid-state drives or solid-state disks (SSD), an optical disk (e.g., compact disk (CD), digital versatile disk (DVD)), a smart card, a flash memory device (e.g., card, stick, key drive), random access memory (RAM), read only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), a register, a removable disk, and any other suitable medium for storing software and/or instructions that may be accessed and read by a computer. The computer-readable medium may be resident in the processing system, external to the processing system, or distributed across multiple entities including the processing system. The computer-readable medium may be embodied in a computer-program product. By way of example, a computer-program product may include a computer-readable medium in packaging materials.
The exemplary methods and apparatuses discussed infra are applicable to any of a variety of control modules such as the DGE modules but may be more generally applicable to gain, ripple, and noise control for optical amplifiers. To simplify the discussion, the exemplary methods and apparatuses are discussed within the context of these example embodiments. One of ordinary skill in the art, however, would understand that the exemplary methods and apparatuses are applicable more generally to a variety of optical fiber signal control mechanisms. Disclosed herein are systems and methods for improved DGE control of the optical amplifiers, and in particular EDFA, and the signaling within the communication systems.
Operation of optical fiber systems require amplifiers due to long spans and signal quality. In some instances, the power through the amplifiers causes undesirable power ripples through the system. The power ripples or gain ripple may be associated with the combination of gain curves from multiple amplifiers each having a different gain curve. The cumulative gain curve (or gain ripple) may have an uneven gain profile. The embodiments in this disclosure address some of these undesirable qualities and may at the same time provide improved optical signal-to-noise ratio (OSNR).
In some embodiments, the GFF may reside at amplifier 102 or amplifier 106. The VOA 104 may be used to flatten the gain. The relationship between the EDFA module gain and the VOA attenuation is shown below in the formula:
EDFAgain=OFGgain−VOAIL (Equation 1)
OFGgain means the maximum optical flattening gain with minimum VOA insertion loss (IL). The loss shape of GFF is designed to make the gain flat at this condition. That is, when the EDFA module operates at OFGgain, the VOA may be close to 0 dB. When the EDFA operates at a gain lower than the OFG, the equation is as follows:
VOAIL=OFGgain−EDFAgain (Equation 2)
The value of EDFAgain decrease is equal to the value of VOAIL increase, so the gain of EDFA (gain of pre-amp and booster) may have no change, is maintained in the OFG.
This method may maintain a flattening gain spectrum, but as the VOA attenuation is very large in the low gain range, the noise figure (NF) may have correspondingly significant degradation.
In some embodiments, the DGE 208 may be coupled to a processor module (not shown), or the DGE 208 may incorporate a processor module. The processing module may include hardware and/or software, firmware, etc.
The average insertion loss is given by the equation below:
The insertion loss of the VOA 204 may be given by the equation below:
IL
VOA=DMSL−ILDGE-AVG (Equation 4)
ρ(i) is the power of channel i. From Equation 3 and Equation 4, we know that the sum loss of the VOA 204 and DGE 208 may be fixed. This control method may flatten the gain spectrum, but as VOA needs to pad the losses, especially when the DGE loss padding is far less than DMSL, so the noise figure may degrade substantially too.
In the previous embodiments, the gain ripple may be removed to make the output spectrum flat or smooth. But the previous embodiment needs some VOA attenuation which may degrade the noise figure, especially at low gain ranges or the DGE padded loss is far less than the DMSL. The embodiments (e.g., of
In the following embodiments, the gain of the EDFA may not necessarily be fixed at the OFG. The change of EDFA gain may cause variation of the gain across the spectrum. What's more, the variation over the wavelengths may be linear.
GainEDFA(i)=GainOFG(i)+GainEDF-R(i)*k−ILDGE(i) (Equation 5)
GainEDF-R (i) is the EDFA gain profile variation ratio (
k is the coefficient which has a relationship to the gain difference from OFG. (At 3 dB gain change case, k is 3 times to that of 1 dB gain change case.)
GainOFG(i) is the optimized flattening gain in design. Generally, it may need less DGE manipulation. It may be the same value regardless of the channel i (in other words, different channels may have the same value).
GainEDFA(i) is the EDFA target required gain shape. It may be tilted or any desired shape. The shape may be defined by a function or may be manually constructed. Any shape or curve may be used as dictated by design or preference.
ILDGE(i) is the DGE attenuation shape. For any channel i, ILDGE(i) may be larger or equal to 0. In order to get small noise figure, it may be desired that the minimum of ILDGE(i) is as close to zero as much as possible.
Another method for control may be described as follows. The DGE attenuation shape may be achieved by:
IL
DGE(i)=GainOFG(i)+GainEDF-R(i)*k−GainEDFA(i) (Equation 6)
In Equation 6, the k may be achieved by:
Equation 8 may be one possible optimization function. One option for optimizing or maximizing the function is to find the local or global maximum of Equation 6. In some embodiments, k may be adjusted in steps or continuously to determine the maximum function. It will be appreciated by those skilled in the art that optimization or maximizing may be achieved in any number of ways through any number of functions and steps. Equation 7 is merely one exemplary method for optimization.
In one embodiment, it may be desirable to achieve flat and variable gain. The gain of this type for EDFA may be tunable, but the gain shape may be flat so that the gain value for all the channels is the same.
Based on Equations 6-8, we know that when EDFA gain is equal to OFG gain, then k=0, the DGE attenuation of all channels is close to zero dB. When the EDFA gain is higher than the OFG gain, k will keep increasing until minimal gain (longest wavelength) reaches the target gain. DGE attenuates the part above the target.
When EDGA operates at the gain lower than the OFG, k will decrease until minimal gain (shortest wavelength) reaches the target gain, DGE attenuation attenuates the part above the target gain.
In one example, in the C-band EDFA, assuming the gain is a certain dB above the OFG, k will be 1.68*x and average DGE loss will be about 0.7*x dB. Assuming the gain is x′ dB under ODG, then k will be −0.6*x′ and average DGE loss will be about 0.35*x′ dB. In other words, the noise figure may be improved because the DGE loss decreases from x to 0.35x.
In
As illustrated in
In the 1 dB gain curve 502, the variation may be compensated by the DGE to improve the noise figure. In some instances, the curves 502, 504 may be known during design or development of the devices, with the curves determined based on a formula or a given gain shape. In other instances, the curves 502, 504 may not be known until deployment due to environmental or installation differences. In such instances, the curves may be determined by any combination of factors including monitored responses, formulas, predetermined shapes, etc. The curves and compensation of the gain for these curves may be provided accordingly. In the example of
Curve 602 shows the results of the embodiment using a VOA based on using Equation 2 to calculate the VOA attenuation. Curve 602 shows significant noise at low gains. Curve 604 shows the results of the embodiment using a DGE based on using Equations 6-8 to calculate the DGE attenuation shape. As shown in this chart 600, using DGE provides improved noise figure over most of the gain range with significant improvements at low gain.
Curve 602′ shows the results of the embodiment using a VOA based on using Equation 2 to calculate the VOA attenuation. The OFG is at 30 dB. Curve 602′ shows large average losses at low gains. Curve 604′ shows the results of the embodiment using a DGE based on using Equations 6-8 to calculate the DGE attenuation shape. The OFG moves to 24 dB. As shown in this chart 600B, using DGE provides improved average losses over most of the gain range with significant improvements at low gain.
We know after changing to the new embodiment, the noise figure improves dramatically at low gain range and almost no difference at high gain. The average loss of the inventive method is largely lower than traditional methods at low gain ranges. It may be appreciated that the new method may decrease the middle stage loss and improve noise figure.
In another embodiment, the required shape of the EDFA gain may not always be flat. In this embodiment, the shape of the gain may be configurable. In some circumstances, there may be a big incremental gain ripple or Raman effect introduced gain tilt on the input power, but output power needs to remain flat. In this case, the gain shape may need to be tuned by the DGE.
In Equation 6, the EDFA gain may be a vector which is calculated from input power spectrum and target output spectrum.
GainEDFA(i)=PowerEDFA-OUT(i)+PowerEDF-IN(i) (Equation 9)
In this Equation 9, PowerEDF-IN(i) is the EDFA input power spectrum. PowerEDFA-OUT(i) in the EDFA may be the target power spectrum. They may be any spectrum as desired or for system design.
The inventive control method may be to find the minimum DGE loss setting even in this case, which may be to minimize the average loss of mid-stage and improve the noise figure in the same manner as described for the various embodiments.
At step 960, the method may adjust the parameter k. At step 970, the method may calculate the insertion loss, e.g., based on the current signal. At step 980, the method may scan the power spectrum. At step 990, the method may determine whether the EDFA gain meets some criteria. For example, the criteria may be conformity to the gain shape or other criteria based on design or user preference. If the EDFA gain meets the criteria, the method may end. If the EDFA gain does not meet the criteria, then the method may proceed to step 995. At step 995, the method may determine the gain error and proceed to step 930.
It is understood that the specific order or hierarchy of steps in the processes disclosed is an illustration of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged. Further, some steps may be combined or omitted. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but is to be accorded the full scope consistent with the language claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” Unless specifically stated otherwise, the term “some” refers to one or more. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed as a means plus function unless the element is expressly recited using the phrase “means for.”
Number | Date | Country | Kind |
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202011261059.8 | Nov 2020 | CN | national |
PCTIB2021/59599 | Nov 2020 | WO | international |
Filing Document | Filing Date | Country | Kind |
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PCT/IB2021/059559 | 10/18/2021 | WO |