Adaptive repair in robotics generally refers to modification of a component to maintain or update the component in a changed or changing environment. In some cases, components can be repaired using wireless robotic arms. Example components include, without limitation, shafts, pistons, blades, and molds. It is recognized herein that current approaches to using wireless communication technologies in robotic repairing lack efficiencies, among other technical shortcomings. For example, some current approaches introduce increased latencies, such that the resulting repair is too slow for various industrial protocols to effectively perform.
Embodiments of the invention address and overcome one or more of the described-herein shortcomings by providing methods, systems, and apparatuses that perform dynamic slicing technology to assign network resources for various robotic repairing subtasks having different priorities, while satisfying various real-time and high throughput requirements. In some cases, M/M/1 queuing theory is applied so as to efficiently improve the utilization of network resources, reduce queuing latency and propagation latency, and balance the load among different network slicing.
In an example aspect, robotic repair is performed by a node within a core network that defines a plurality of network slices. Example operations include obtaining a directed acyclic graph (DAG) and an arrival time associated with a first user equipment (UE). The arrival time can indicate when the first UE connected to the core network. Based on the DAG, the node can calculate a task priority associated with the first UE. Based on the arrival time and the task priority, the node can calculate a UE priority associated with the first UE. Based on the UE priority, the node can assign the first UE to a first network slice of the plurality of network slices. The node can calculate an average load defined by user plane functions within the first network slice, and compare the average load to a predetermined threshold. In an example, when the average load is less than the predetermined threshold, the node performs an objective function so as to determine that a first user plane function of the user plane functions within the first network slice has more available resources as compared to the other user plane functions within the first network slice.
In some cases, the node can identify a new connection between the first UE and the core network, and obtain the DAG responsive to the new connection. Additionally, the node can store the task priority in a sorted list. The sorted list can define tasks and respective priorities associated with each task. The node can calculate the UE priority further based on the sorted list. In another example aspect, based on the task priority, the node can create or prepare a user plane function (UPF) pool associated with each network slice of the plurality of network slices, wherein the UPF pool associated with the first network slice defines the first user plane function. Furthermore, the node can determine whether a UE waitlist is empty such that the UE waitlist includes no available UE. When the UE waitlist is not empty such that the UE waitlist includes at least one available UE, the node can assign the first UE to the first network slice. The node can further determine whether the first network slice is empty such that the first network slice includes no user plane functions. When the first network slice is not empty, the node can calculate the average load defined by the user plane functions within the first network slice. The node can pre-assign the first UE to the first user plane function so as to define a new average load defined by the user plane functions within the first network slice. Additionally, the node can compare the new average load to the predetermined threshold. When the new average load is less than the predetermined threshold, the node can assign the first UE to the first user plane function. When the first network slice is empty, or when the average load or the new average load is greater than the predetermined threshold, the node can determine whether the UPF pool associated with the first network slice is empty. When the UPF pool associated with the first network slice is empty, the node can wait for an available UPF from the UPF pool associated with the first network slice. When the UPF pool associated with the first network slice is not empty, the node can assign a second UPF from the UPF pool to the first network slice, and can assign the first UE to the second UPF.
The foregoing and other aspects of the present invention are best understood from the following detailed description when read in connection with the accompanying drawings. For the purpose of illustrating the invention, there is shown in the drawings embodiments that are presently preferred, it being understood, however, that the invention is not limited to the specific instrumentalities disclosed. Included in the drawings are the following Figures:
As an initial matter, it is recognized herein that current robotic repair technologies typically do not satisfy real-time requirements for robotic repairing. In some cases, the latency in a ZigBee-based approach is 600 milliseconds (ms), which can be about sixty times the real-time requirements. As another example, a Bluetooth-based monitoring process for milling can involve latency during data transmission and latency during device discovery. In various embodiments described herein, dynamic network slicing is utilized to perform scanning, detection, path generation, robot milling, and milling monitoring in parallel so as satisfy robotic repairing real-time requirements. In some cases, robotic repairing requires an end-to-end latency of less than 10 ms.
Referring to
The RAN 104 can include a plurality of base stations 110 that include one or more transceivers for communicating with the UEs 106 over the air interface 108. The base stations 110 can define an eNB, a gNB, or the like. Each of the base stations 110 can be associated with a particular cell, and may be configured to handle radio resource management decisions, handover decisions, scheduling of users in the uplink and/or the downlink, and the like. The base stations 110 may communicate with one another over an X2 interface.
The 5G core network 102 can include a mobility management gateway (MME), serving gateway, and packet data network (PDN) gateway. The 5G core network 102 can further include an access and mobility management function (AMF) 112, a session management function (SMF) 114, user plane functions (UPFs) 116, a user data management function (UDM) 118, an authentication server function (AUSF) 120, a Network Slice Selection Function (NSSF) 122, a policy control function (PCF) 124, a network function (NF) repository function (NRF) 126, a Unified Data Repository (UDR) 128, and a software-defined network (SDN) controller 130.
While each of the foregoing elements are depicted as part of the 5G core network 102, it will be appreciated that any one of these elements may be owned and/or operated by an entity other than the core network operator. It should also be appreciated that the 5G core network 102 may consist of less elements, alternative elements, or additional elements, and all such core networks are contemplated as being with the scope of this disclosure.
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With continuing reference to
With continuing reference to
In the example robotic repairing operation described above, and in various other robotic repair operations, it is recognized herein that the network traffic can be heavy such that each step in the operation defines its own network requirements. Thus, in accordance with various embodiments, multiple network slices 136 can balance the data plane traffic so as to satisfy the network requirements. In particular, in some cases, for example, the cameras 106a, robotic arms 106b, and edge devices 106c can dynamically change or adjust their network slicing (e.g., at 218 and 232 of
Referring now to
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With continuing reference to
Thus, the UPF pool can include the UPFs 116 that are available for network slicing. For example, a generated or prepared UPF pool can be represented as UPF_Pool={upf1, upf2, upf3, . . . , upfr}, where r represents the total UPFs 116, and upfr is the ID of the rth UPF. At 212, based on the sorted list and the arrival time associated with a given UE, for instance the first UE 106d, the SDN controller 130 can calculate a UE priority associated with the first UE 106d. In some examples, the SDN controller 130 can obtain a buffer status of the first UE 106d, and can calculate the priority of the first UE 106d based on its buffer status, associated task priority, and arrival time. In some examples, the UE priority can be represented as
For example, a UE buffer can have a free state and service state. In an example, if the SDN controller 130 detects 0 bytes in the buffer of the first UE 106d, the SDN controller 130 can set the first UE 106d to the free state, which indicates that the first UE 106d has finished its previous job and is waiting for a new job. Alternatively, if the SDN controller does not detect 0 bytes in the buffer of the first UE 106d, the SDN controller 130 can set the first UE 106d to the service state, which indicates that the first UE 106d is still working on the current job. Thus, UEs, for instance the first UE 106d, can have an on status and an off status. For example, if a given UE buffer is in a free state, the associated UE can be set to the off status. Otherwise, the associated UE can be set to the on status. In some cases, only UEs having an off status are added to the UE waitlist.
Thus, the SDN 130 can update UE statuses, for instance the status of the first UE 106d, based on their respective buffer states. In particular, for example, at 214, the SDN controller 130 can obtain the UE waitlist, for instance from the AMF 112, and can add the UEs 106 having a free state to the UE waitlist. At 216, the SDN controller 130 can determine whether the UE waitlist is empty such that the UE waitlist includes no available UEs 106. When the SDN controller 130 determines that the UE waitlist includes available UEs so as to define a waitlist that is not empty, the SDN controller 130 can assign UEs to network slices (at 218). For example, at 218, based on the UE priority of the first UE 106d, the SDN controller 130 can assign the first UE 106d to a first network slice 140a of the plurality of network slices 140, so as to define an assigned network slice 140a. Thus, each UE in the UE waitlist can be assigned to a respective network slice based on their UE respective UE priority. At 220, the SDN controller 130 can determine whether the assigned network slice is empty, such that the assigned network slice includes no UPFs 116. When the SDN controller 130 determines that a given assigned network slice is not empty, the process can proceed to 222, where the SDN controller 130 can calculate an average load defined by the UPFs 116 within the respective assigned network slice. For example, at 220, the SDN controller 130 can determine that the first network slice 140a is not empty, and then the SDN 130 can calculate an average load (
In an example, the UE request arrivals follow a Poisson process, such that the load of the jth UPF (θj) can represented by Σi=1nλixij; where n represents the number of UEs 106; λi represents the request rate of the ith UE; and Xk represents the UE requests to UPF assignment matrix of kth network slicing, such that xij=1 means that the ith user sends request to the jth UPF. Thus, in some examples, the SDN 130 can calculate an average load among all UPFs within the kth network slicing as:
where the coefficient of the number of UPFs in a UPF pool is αΣk=1s tpk=r. For example, in the UPF pool, there can be αtp1 UPFs prepared for the 1st network slicing, wherein the range of UPFs within the first network slicing in the UPF pool is [1, αtp1]. Further, there can be αtps prepared for the sth network slicing, and the range of sth network slicing in the UPF pools is [Σk=1s-1tpk, αΣk=1stpk].
Referring again to
At 226, the SDN controller 130 can perform the objective function F(X) so as to calculate an objective function value for each UPF within the assigned network slice. In particular, for example, the SDN controller 130 can perform the objective function F(X) so as to determine that the first UPF 116a within the first network slice 140a has more available resources as compared to the other UPFs 116 within the first network sliced 140a.
In various examples, the objective of the objective or optimization function F(X) is to minimize delay (e.g., average and tail) while optimally utilizing computing resources for networking. Thus, the objective function can define an optimization problem formulation, as now described. For example, the propagation delay Wt can be represented by
where li,j represents the length of packet from the ith UE to the jth UPF; dij represents the transmission rate between the ith UE and the jth UPF; and n is the number of user equipments (UEs). The overall latency can be represented by:
where μ represents the service rate for all UPFs. The expected queuing time before a request from a UE is serviced can be represented by
The expected end-to-end response time, which is the sum of the request queuing time and the UPF service time, can be represented by:
The average queuing latency and the propagation latency of the all the UPFs within the kth network slicing can be represented by:
The variance of the queuing latency and the propagation latency of the UPFs within the kth network slicing can be represented by:
Thus, the objective function F(X) can define a problem formulation as follows: min F(X)=Σk=1s(w1G (Xk+w2V(Xk)), where w1 and w2 are weight factors that can be tuned accordingly. As shown, the SDN controller 130 can solve the objective function F(X) so as to minimize the average UE queuing latency and the average propagation latency in a standalone 5G network. In doing so, the objective function can be subject to various constraints, such as: for each UPF, the sum of the request rates from all connected UEs should be less than the UPF's processing rate μ; each UE can only be connected to one UPF at a time; the UE connection decision is encoded in a matrix xij with binary elements; and the number of UPFs is limited and the task having a higher priority will have more prepared UPFs in the UPF pool.
Referring again to
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After finishing the UE assignment, the SDN controller can return to 216 so as to determine whether the UE waitlist is empty and repeat the UE assignment steps. When, at 234, the SDN controller 130 determines that the UPF pool in the range of the assigned network slice is not empty, the process can proceed to 238, where SDN controller waits for an available UPF from the UPF pool in the assigned network slicing range. In some examples, at 238, if the assigned network slicing range of the UPF pool runs out of resources, the SDN 130 can add a UPF from the network slicing range with a lower priority to the network slicing range with a higher priority.
Thus, as described herein, various embodiments perform dynamic slicing technology to assign network resources for various repairing subtasks having different priorities, while satisfying various real-time and high throughput requirements. Embodiments described herein can apply M/M/1 queuing theory so as to efficiently improve the utilization of network resources, reduce queuing latency and propagation latency, and balance the load among different network slicing.
The processors 520 may include one or more central processing units (CPUs), graphical processing units (GPUs), or any other processor known in the art. More generally, a processor as described herein is a device for executing machine-readable instructions stored on a computer readable medium, for performing tasks and may comprise any one or combination of, hardware and firmware. A processor may also comprise memory storing machine-readable instructions executable for performing tasks. A processor acts upon information by manipulating, analyzing, modifying, converting or transmitting information for use by an executable procedure or an information device, and/or by routing the information to an output device. A processor may use or comprise the capabilities of a computer, controller or microprocessor, for example, and be conditioned using executable instructions to perform special purpose functions not performed by a general purpose computer. A processor may include any type of suitable processing unit including, but not limited to, a central processing unit, a microprocessor, a Reduced Instruction Set Computer (RISC) microprocessor, a Complex Instruction Set Computer (CISC) microprocessor, a microcontroller, an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), a System-on-a-Chip (SoC), a digital signal processor (DSP), and so forth. Further, the processor(s) 520 may have any suitable microarchitecture design that includes any number of constituent components such as, for example, registers, multiplexers, arithmetic logic units, cache controllers for controlling read/write operations to cache memory, branch predictors, or the like. The microarchitecture design of the processor may be capable of supporting any of a variety of instruction sets. A processor may be coupled (electrically and/or as comprising executable components) with any other processor enabling interaction and/or communication there-between. A user interface processor or generator is a known element comprising electronic circuitry or software or a combination of both for generating display images or portions thereof. A user interface comprises one or more display images enabling user interaction with a processor or other device.
The system bus 521 may include at least one of a system bus, a memory bus, an address bus, or a message bus, and may permit exchange of information (e.g., data (including computer-executable code), signaling, etc.) between various components of the computer system 510. The system bus 521 may include, without limitation, a memory bus or a memory controller, a peripheral bus, an accelerated graphics port, and so forth. The system bus 521 may be associated with any suitable bus architecture including, without limitation, an Industry Standard Architecture (ISA), a Micro Channel Architecture (MCA), an Enhanced ISA (EISA), a Video Electronics Standards Association (VESA) architecture, an Accelerated Graphics Port (AGP) architecture, a Peripheral Component Interconnects (PCI) architecture, a PCI-Express architecture, a Personal Computer Memory Card International Association (PCMCIA) architecture, a Universal Serial Bus (USB) architecture, and so forth.
Continuing with reference to
The operating system 534 may be loaded into the memory 530 and may provide an interface between other application software executing on the computer system 510 and hardware resources of the computer system 510. More specifically, the operating system 534 may include a set of computer-executable instructions for managing hardware resources of the computer system 510 and for providing common services to other application programs (e.g., managing memory allocation among various application programs). In certain example embodiments, the operating system 534 may control execution of one or more of the program modules depicted as being stored in the data storage 540. The operating system 534 may include any operating system now known or which may be developed in the future including, but not limited to, any server operating system, any mainframe operating system, or any other proprietary or non-proprietary operating system.
The computer system 510 may also include a disk/media controller 543 coupled to the system bus 521 to control one or more storage devices for storing information and instructions, such as a magnetic hard disk 541 and/or a removable media drive 542 (e.g., floppy disk drive, compact disc drive, tape drive, flash drive, and/or solid state drive). Storage devices 540 may be added to the computer system 510 using an appropriate device interface (e.g., a small computer system interface (SCSI), integrated device electronics (IDE), Universal Serial Bus (USB), or FireWire). Storage devices 541, 542 may be external to the computer system 510.
The computer system 510 may also include a field device interface 565 coupled to the system bus 521 to control a field device 566, such as a device used in a production line. The computer system 510 may include a user input interface or GUI 561, which may comprise one or more input devices, such as a keyboard, touchscreen, tablet and/or a pointing device, for interacting with a computer user and providing information to the processors 520.
The computer system 510 may perform a portion or all of the processing steps of embodiments of the invention in response to the processors 520 executing one or more sequences of one or more instructions contained in a memory, such as the system memory 530. Such instructions may be read into the system memory 530 from another computer readable medium of storage 540, such as the magnetic hard disk 541 or the removable media drive 542. The magnetic hard disk 541 (or solid state drive) and/or removable media drive 542 may contain one or more data stores and data files used by embodiments of the present disclosure. The data store 540 may include, but are not limited to, databases (e.g., relational, object-oriented, etc.), file systems, flat files, distributed data stores in which data is stored on more than one node of a computer network, peer-to-peer network data stores, or the like. The data stores may store various types of data such as, for example, skill data, sensor data, or any other data generated in accordance with the embodiments of the disclosure. Data store contents and data files may be encrypted to improve security. The processors 520 may also be employed in a multi-processing arrangement to execute the one or more sequences of instructions contained in system memory 530. In alternative embodiments, hard-wired circuitry may be used in place of or in combination with software instructions. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.
As stated above, the computer system 510 may include at least one computer readable medium or memory for holding instructions programmed according to embodiments of the invention and for containing data structures, tables, records, or other data described herein. The term “computer readable medium” as used herein refers to any medium that participates in providing instructions to the processors 520 for execution. A computer readable medium may take many forms including, but not limited to, non-transitory, non-volatile media, volatile media, and transmission media. Non-limiting examples of non-volatile media include optical disks, solid state drives, magnetic disks, and magneto-optical disks, such as magnetic hard disk 541 or removable media drive 542. Non-limiting examples of volatile media include dynamic memory, such as system memory 530. Non-limiting examples of transmission media include coaxial cables, copper wire, and fiber optics, including the wires that make up the system bus 521. Transmission media may also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.
Computer readable medium instructions for carrying out operations of the present disclosure may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.
Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, may be implemented by computer readable medium instructions.
The computing environment 300 may further include the computer system 510 operating in a networked environment using logical connections to one or more remote computers, such as remote computing device 580. The network interface 570 may enable communication, for example, with other remote devices 580 or systems and/or the storage devices 541, 542 via the network 571. Remote computing device 580 may be a personal computer (laptop or desktop), a mobile device, a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to computer system 510. When used in a networking environment, computer system 510 may include modem 572 for establishing communications over a network 571, such as the Internet. Modem 572 may be connected to system bus 521 via user network interface 570, or via another appropriate mechanism.
Network 571 may be any network or system generally known in the art, including the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a direct connection or series of connections, a cellular telephone network, or any other network or medium capable of facilitating communication between computer system 510 and other computers (e.g., remote computing device 580). The network 571 may be wired, wireless or a combination thereof. Wired connections may be implemented using Ethernet, Universal Serial Bus (USB), RJ-6, or any other wired connection generally known in the art. Wireless connections may be implemented using Wi-Fi, WiMAX, and Bluetooth, infrared, cellular networks, satellite or any other wireless connection methodology generally known in the art. Additionally, several networks may work alone or in communication with each other to facilitate communication in the network 571.
It should be appreciated that the program modules, applications, computer-executable instructions, code, or the like depicted in
It should further be appreciated that the computer system 510 may include alternate and/or additional hardware, software, or firmware components beyond those described or depicted without departing from the scope of the disclosure. More particularly, it should be appreciated that software, firmware, or hardware components depicted as forming part of the computer system 510 are merely illustrative and that some components may not be present or additional components may be provided in various embodiments. While various illustrative program modules have been depicted and described as software modules stored in system memory 530, it should be appreciated that functionality described as being supported by the program modules may be enabled by any combination of hardware, software, and/or firmware. It should further be appreciated that each of the above-mentioned modules may, in various embodiments, represent a logical partitioning of supported functionality. This logical partitioning is depicted for ease of explanation of the functionality and may not be representative of the structure of software, hardware, and/or firmware for implementing the functionality. Accordingly, it should be appreciated that functionality described as being provided by a particular module may, in various embodiments, be provided at least in part by one or more other modules. Further, one or more depicted modules may not be present in certain embodiments, while in other embodiments, additional modules not depicted may be present and may support at least a portion of the described functionality and/or additional functionality. Moreover, while certain modules may be depicted and described as sub-modules of another module, in certain embodiments, such modules may be provided as independent modules or as sub-modules of other modules.
Although specific embodiments of the disclosure have been described, one of ordinary skill in the art will recognize that numerous other modifications and alternative embodiments are within the scope of the disclosure. For example, any of the functionality and/or processing capabilities described with respect to a particular device or component may be performed by any other device or component. Further, while various illustrative implementations and architectures have been described in accordance with embodiments of the disclosure, one of ordinary skill in the art will appreciate that numerous other modifications to the illustrative implementations and architectures described herein are also within the scope of this disclosure. In addition, it should be appreciated that any operation, element, component, data, or the like described herein as being based on another operation, element, component, data, or the like can be additionally based on one or more other operations, elements, components, data, or the like. Accordingly, the phrase “based on,” or variants thereof, should be interpreted as “based at least in part on.”
Although embodiments have been described in language specific to structural features and/or methodological acts, it is to be understood that the disclosure is not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as illustrative forms of implementing the embodiments. Conditional language, such as, among others, “can,” “could,” “might,” or “may,” unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments could include, while other embodiments do not include, certain features, elements, and/or steps. Thus, such conditional language is not generally intended to imply that features, elements, and/or steps are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without user input or prompting, whether these features, elements, and/or steps are included or are to be performed in any particular embodiment.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the Figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
Filing Document | Filing Date | Country | Kind |
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PCT/US2022/025865 | 4/22/2022 | WO |