Patent Application
20130124491
A portion of the disclosure of this patent document contains material which is subject to copyright protection. This patent document may show and/or describe matter which is or may become trade dress of the owner. The copyright and trade dress owner has no objection to the facsimile reproduction by anyone of the patent disclosure as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright and trade dress rights whatsoever.
1. Field
This disclosure relates to pipelined hardware for performing a binary search of an ordered list of data items.
2. Description of the Related Art
Searching an ordered list of data items is a common task. For example, a telephone directory is a list of subscribers' names in alphabetical order. A typical manual search in a telephone directory may be performed by opening the directory to an estimated position, comparing a target name with the names in the directory, and then making a new estimate of the position of the target name.
A binary search is a rigorous search algorithm to find the position of a specific value, called the search “key”, in an ordered list or array of data values. At the first step in a binary search, the key is compared to the middle value in the array. Assuming the key and the middle value are not equal, the result of the comparison indicates in which half of the list the key value is located. If the key is smaller than the middle value, the key may be found in the lower half of the array (the half having values smaller than the middle value). If the key is larger than the middle value, the key may be found in the upper half of the array (the half having values larger than the middle value). The process is then repeated, comparing the key to the middle value in the appropriate half of the array. At each iteration, the field of search is reduced by half. After a suitable number of iterations, the field of the search will be reduced to a single final value, which will either equal the key or will be, for example, the largest value in the array that does not exceed the key. In either case, the output of the search is the location or index of the final value within the array. This index may commonly be used to retrieve an associated data item from a different array.
The number of comparisons that are performed in a binary search is a logarithmic function of the number data items in the sorted list. For example, if a sorted list contains 2N items, where N is a positive integer, a binary search may be completed with N comparisons.
Binary searches are commonly performed by a processor using an iterative software algorithm. However, in some applications, such as routing data items within a communications network or generating traffic to test a communications network, high speed repetitive binary searching may be required.
Throughout this description, elements appearing in figures are assigned three-digit reference designators, where the most significant digit is the figure number where the element is introduced and the two least significant digits are specific to the element. An element that is not described in conjunction with a figure may be presumed to have the same characteristics and function as a previously-described element having the same reference designator.
Description of Apparatus
The ordered list may be divided into an upper half, and a lower half, each containing eight values. D8 is the smallest value in the upper half of the ordered list 100, and D7 is the largest value in the lower half of the ordered list 100. The significance of these values will be discussed subsequently.
Within this description, the term “engine” means a collection of hardware that performs the described functions. An engine may typically be designed using a hardware description language (HDL) that defines the engine primarily in functional terms. The HDL design may be verified using an HDL simulation tool. The verified HDL design may then be converted into a gate netlist or other physical description of the engine in a process commonly termed “synthesis”. The synthesis may be performed automatically using a synthesis tool. The gate netlist or other physical description may be further converted into programming code for implementing the engine in a programmable integrated circuit device such as a field programmable gate array (FPGA), a programmable logic device (PLD), or a programmable logic array (PLA). The gate netlist or other physical description may be converted into process instructions and masks for fabricating the engine within an application specific integrated circuit (ASIC).
An engine may be implemented using all or portions of one or more programmable integrated circuit devices. In this case, the programming code may be stored on a machine-readable storage medium. The stored programming code may subsequently be used to configure the programmable integrated circuit device or devices to include the desired engine. Suitable storage media include, for example, magnetic media such as hard disks, floppy disks and tape; optical media such as compact disks (CD-ROM and CD-RW) and digital versatile disks (DVD and DVD±RW); flash memory cards; and other storage media. As used herein, the term “storage medium” means a physical device for storing data and does not include transitory media such as propagating signals.
Each of the key storage registers KS (203, 213, 223, 233) and the result registers R (204, 214, 224, 234) may be one or more flips-flops, a register, a latch, or other circuit that stores input data in accordance with a clock signal. A common clock signal may be provided to all of the key storage registers and the results registers.
Each of the memories M (201, 211, 221, 231) may be digital circuits that allow storage and retrieval of one or more digital values. For example, memory 201 may store a single digital value in a latch or register. Memory 211 may include two registers to store two digital values and a multiplexer to allow retrieval of a selected one of the values. Similarly, memory 231 may be implemented with eight registers and a multiplexer or an eight-word random access memory.
Write logic 240 controls storing the elements of a sorted list of values into the memories 201, 211, 221, 231. The value or values stored in each memory are noted with reference to the sorted list shown in
First considering stage 1 of the pipelined binary search engine 200, the value D8 is stored in the stage 1 memory 201. Referring back to
Next considering stage 2 of the pipelined binary search engine 200, the values D4 and DC are stored in the stage 2 memory 211. Referring back to
Stages 3 and 4 operate similarly to stage 2 of the pipelined binary search engine 100. Each stage has twice as much memory as the preceding stage, and each stage reads a single value from its respective memory using the collective results of the comparisons performed in the previous stages. Each stage compares the value read from its memory to the key, and stores the result of the comparison along with the results from the previous stages in its respective results register.
At the conclusion of stage 4 of the pipelined binary search engine 100, the 4-bit value stored in the stage 4 result register 234 is an index that indicates the position in the ordered list that holds the smallest value from the ordered list that equals or exceeds the key value. Note that, when the ordered list contains 2N elements and the key value has K bits, where K>N, the key value is not necessarily equal to any value within the ordered list.
For example, a first search (Search 1) based on a first key may be initiated during a first clock interval. At the end of the first clock interval, the result of the stage 1 comparison may be stored in the stage 1 result register 204 and the first key may be stored in the stage 1 key storage register 203. At the end of the second clock interval, the result of the stage 1 and stage 2 comparisons may be stored in the stage 2 result register 214 and the first key may be stored in the stage 2 key storage register 213. At the end of the 3rd clock interval, the results of the stage 1, 2, and 3 comparisons may be stored in the stage 3 result register 224 and the first key may be stored in the stage 3 key storage register 223. At the end of the 4th clock interval, the result of the stage 1-4 comparisons, which is the index output from the pipelined binary search engine, may be stored in the stage 4 result register 234 and the first key may be optionally stored in a stage 4 key storage register (not shown). Note that storing the first key in a stage 4 key storage register is not necessary for the operation of the pipelined binary search engine, and a stage 4 key storage register may be included only if required for some other purpose.
Since the stage 1 hardware is not utilized by the first search after the first clock interval, a second search (Search 2) based on a second key may be initiated during the second clock interval and completed during the 5th clock interval. Similarly, Searches 3-6 may be initiated during subsequent clock cycles.
For example, in the pipelined binary search engine 200, the stage 1 memory 401 holds the value D8, which is the smallest value in the upper half of the ordered list 100. The result from the stage 1 comparator indicates if the key falls within the upper half (key greater than or equal to D8) or lower half (key less than D8) of the ordered list. In the pipelined binary search engine 400, the stage 1 memory 401 holds the value D7, which is the largest value in the lower half of the ordered list 100. The result from the stage 1 comparator still indicates if the key falls within the upper half (key greater than D7) or lower half (key less than or equal to D7) of the ordered list. Thus the result from stage 1, and each subsequent stage, of the pipelined binary search engines 200 and 400 are the same.
Although not shown in
A four-bit index may be used to identify the position of each value in the multi-parameter ordered list 500. It can be seen the most significant bit (MSB) of the index values for list A is zero, and the most significant bits of the index values for lists B and C are 10 and 11, respectively.
Referring now to
The preset logic 650 receives list select data indicating which list within a multi-parameter ordered list is to be searched. For example, the list select data may include data indicating a number of most significant index bits that are predetermined and data indicating the values of the predetermined bits. Continuing the example of
The preset logic 650 may use the list select data to override the results of comparisons made in the first stage or stages of the pipelined binary search engine 600. For example, to search list A, the preset logic 650 may force the result stored in the first stage result register 604 to be 0 regardless of the output of comparator 602. The preset logic may either set the result register 604 to 0 directly, or may force the output of the comparator 602 to 0 before the result is stored in the result register 604. Similarly, to search list B or list C, the preset logic 650 may force the result stored in the second stage result register 614 to be 10 or 11, respectively, regardless of the outputs of comparators 602 and 612. In this case, the actions (reading from the respective memories and performing the comparisons) within stage 1 and stage 2 may still be performed, although the results of those actions are subsequently overridden by the preset logic.
The pipelined binary search engine 600 can, with proper input of list select data, perform binary searches of different list configurations. Specifically, the pipelined binary search engine 600 can search a single 16-value ordered list, two 8-value ordered lists, four 4-value lists, eight 2-value lists or any combination of lists. The lists must be organized such that the index values for all of the elements in each list have the same most significant bits.
The stage 1 memory 701 may store a single word. The stage 1 comparator 702 may compare the word stored in the stage 1 memory 701 with a key value. The comparators (712, 722) in subsequent stages may compare the key value with a word read from the corresponding memory based on the comparison results from previous stages. In each stage, the results from the respective comparator, along with results from any previous stages, may be stored in the respective results store register (704, 714, 724). Stages 1 to N−1 may include a key store register (703, 713) to store the key value for use by the subsequent stage. Stage N may optionally include a key storage register 723.
The comparison result output from the stage 1 comparator 702 may indicate if the key value falls within the upper half or the lower half of the ordered list being searched. To this end, value stored in the stage 1 memory may be one of the largest value in the lower half of the ordered list or the smallest value in the upper half of the ordered list, depending on the logic of the comparator 702. The comparison result at each subsequent stage may divide the portion of the ordered list being searched in half.
The pipelined binary search engine 700 may include write logic 740 to store the elements of an ordered list or multi-parameter ordered list in the appropriate memories (701, 711, 721). The pipelined binary search engine 700 may also include preset logic 750 to allow selection of a specific list within a multi-parameter ordered list by setting one or more most significant bits of the index value in accordance with list select data. The preset logic may set the one or more most significant bits by setting the contents of the results store registers within one or more stages of the pipelined binary search engine 700 independent of the results from the respective comparators.
It should be understood that the pipelined binary search engines 200, 400, 600 of
Throughout this description, the embodiments and examples shown should be considered as exemplars, rather than limitations on the apparatus and procedures disclosed or claimed. Although many of the examples presented herein involve specific combinations of method acts or system elements, it should be understood that those acts and those elements may be combined in other ways to accomplish the same objectives. With regard to flowcharts, additional and fewer steps may be taken, and the steps as shown may be combined or further refined to achieve the methods described herein. Acts, elements and features discussed only in connection with one embodiment are not intended to be excluded from a similar role in other embodiments.
As used herein, “plurality” means two or more. As used herein, a “set” of items may include one or more of such items. As used herein, whether in the written description or the claims, the terms “comprising”, “including”, “carrying”, “having”, “containing”, “involving”, and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases “consisting of” and “consisting essentially of”, respectively, are closed or semi-closed transitional phrases with respect to claims. Use of ordinal terms such as “first”, “second”, “third”, etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements. As used herein, “and/or” means that the listed items are alternatives, but the alternatives also include any combination of the listed items.
