Efficient synthesis of repeat-until-success circuits in clifford + T basis

Abstract

Repeat-Until-Success (RUS) circuits are compiled in a Clifford+T basis by selecting a suitable cyclotomic integer approximation of a target rotation so that the rotation is approximated within a predetermined precision. The cyclotomic integer approximation is randomly modified until a modified value can be expanded into a single-qubit unitary matrix by solving one or more norm equations. The matrix is then expanded into a two-qubit unitary matrix of special form, which is then decomposed into an optimal two-qubit Clifford+T circuit. A two-qubit RUS circuit using a primary qubit and an ancillary qubit is then obtained based on the latter decomposition. An alternate embodiment is disclosed that keeps the total T-depth of the derived circuit small using at most 3 additional ancilla qubits. Arbitrary unitary matrices defined over the cyclotomic field of 8th roots of unity are implemented with RUS circuits.

Description

FIELD

The disclosure pertains to decomposition of quantum circuits in a Clifford+T basis.

BACKGROUND

One objective of compilation systems for quantum computing is the decomposition of any required single-qubit unitary operation into sets of gates that can implement arbitrary single-qubit unitary operations. Typically, gate sets that provide fault tolerance are preferred. One gate set that has been identified is referred to as the {H,T} gate set that includes the Hadamard gate and the T-gate. This gate set is universal for single-qubit unitaries (can realize arbitrary single-qubit unitary operations to required precision) and is fault tolerant.

The {H,T} gate set has been used to implement circuits, but historically resulting circuits had excessive cost. Significant progress has been made in the last two years in reducing the cost, but there is ample room for improvement. It has been shown that adding ancillary qubit(s), a two-qubit gate (for example, CNOT or CZ), and measurement operations to the gate set can result in lower cost computation. One approach is based on so-called Repeat-Until-Success (RUS) circuits in which an intended output state can be identified using a measurement of an ancillary qubit and a sequence of Clifford+T gates, where the Clifford+T gate set includes the two-qubit CNOT gate (or CZ gate), the Hadamard gate, and the T-gate. Paetznick and Svore, “Repeat-Until-Success: Non-deterministic decomposition of single-qubit unitaries,” available at http://arxiv.org/abs/1311.1074, describe methods for implementing rotations using the Clifford+T gates in combination with measurements and classical feedback. The RUS method achieves superior computation cost. However, these methods are based on an exhaustive search and require exponential runtime. Thus, these methods are limited in achievable precision and hence in applicability.

SUMMARY

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

Methods and apparatus are disclosed that permit decomposition of quantum computational circuits such as rotation gates into series of Clifford+T gates using one or more ancillary qubits. Typically, a single-qubit unitary is obtained by finding a cyclotomic integer z such that z*/z is rational and corresponds to the selected rotation within a desired precision. The cyclotomic integer z is then modified so as to solve a norm equation, and the modified or scaled value of z is used to define the single-qubit unitary in the Clifford+T basis. This intermediate single-qubit unitary is then expanded into a larger two-qubit unitary which serves as the basis of the circuit design. A Clifford+T decomposition of this two-qubit unitary is arranged as a Repeat-Until-Success (RUS) circuit in which a state associated with an ancillary qubit is measured to determine if the intended circuit operation has been realized on a primary qubit. If not, the primary qubit is restored to an initial state, and RUS circuit operations are repeated.

The foregoing and other features, and advantages of the invention will become more apparent from the following detailed description, which proceeds with reference to the accompanying figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a compilation method that synthesizes a repeat-until-success (RUS) circuit over a Clifford+T basis for implementing an axial rotation R_z (θ) to a precision ε>0.

FIG. 2 illustrates a random search method for obtaining values for a single-qubit unitary matrix.

FIG. 3 illustrates a method of obtaining a unitary matrix implementable in a Clifford+T basis.

FIG. 4 illustrates a representative RUS circuit.

FIG. 5 illustrates a method of obtaining a two-qubit unitary matrix.

FIG. 6 shows T-count statistics for 1000 target rotation angles randomly selected from the interval (0,π/2).

FIG. 7 shows T-count statistics for 40 rotation angles of the form π/2^k, k=2, . . . , 41.

FIG. 8 illustrates a representative method of producing a multiple qubit RUS circuit.

FIG. 9 is a block diagram of a representative computing environment in which the disclosed methods can be implemented.

FIG. 10 is a block diagram of a representative computing environment that includes classical and quantum processing.

FIG. 11 illustrates a method for implementing RUS circuits using 2 ancillas with total circuit depth equal to the circuit depth of rotation U.

FIG. 12 illustrates a method for implementing arbitrary unitary transformations with coefficients over the field of cyclotomic rationals Q(ω) using at most 2 ancillas.

DETAILED DESCRIPTION

As used in this application and in the claims, the singular forms “a,” “an,” and “the” include the plural forms unless the context clearly dictates otherwise. Additionally, the term “includes” means “comprises.” Further, the term “coupled” does not exclude the presence of intermediate elements between the coupled items.

The systems, apparatus, and methods described herein should not be construed as limiting in any way. Instead, the present disclosure is directed toward all novel and non-obvious features and aspects of the various disclosed embodiments, alone and in various combinations and sub-combinations with one another. The disclosed systems, methods, and apparatus are not limited to any specific aspect or feature or combinations thereof, nor do the disclosed systems, methods, and apparatus require that any one or more specific advantages be present or problems be solved. Any theories of operation are to facilitate explanation, but the disclosed systems, methods, and apparatus are not limited to such theories of operation.

Although the operations of some of the disclosed methods are described in a particular, sequential order for convenient presentation, it should be understood that this manner of description encompasses rearrangement, unless a particular ordering is required by specific language set forth below. For example, operations described sequentially may in some cases be rearranged or performed concurrently. Moreover, for the sake of simplicity, the attached figures may not show the various ways in which the disclosed systems, methods, and apparatus can be used in conjunction with other systems, methods, and apparatus. Additionally, the description sometimes uses terms like “produce” and “provide” to describe the disclosed methods. These terms are high-level abstractions of the actual operations that are performed. The actual operations that correspond to these terms will vary depending on the particular implementation and are readily discernible by one of ordinary skill in the art.

In some examples, values, procedures, or apparatus' are referred to as “lowest”, “best”, “minimum,” or the like. It will be appreciated that such descriptions are intended to indicate that a selection among many used functional alternatives can be made, and such selections need not be better, smaller, or otherwise preferable to other selections.

In some examples, the terms “unitary” or “unitary matrix” are used to refer to functions performed by quantum circuits that can be implemented in a variety of ways. In the following description, such matrices are also referred to as circuits for convenient description. Some commonly used quantum gates corresponding to single-qubit operators S, X, Y, and Z can be represented as:

$S=\left[\begin{array}{cc}1& 0\\ 0& i\end{array}\right]$ $X=\left[\begin{array}{cc}0& 1\\ 1& 0\end{array}\right],Y=\left[\begin{array}{cc}0& -i\\ i& 0\end{array}\right],Z=\left[\begin{array}{cc}1& 0\\ 0& -1\end{array}\right].$

Compilation of high-level quantum algorithms into lower-level fault-tolerant circuits is a critical component of quantum computation. One fault-tolerant universal quantum basis, referred to as the Clifford+T basis, consists of the two-qubit Controlled-NOT gate (CNOT), and two single-qubit gates, the Hadamard gate (H) and the T-gate T. The operation of these gates can be written as:

$\mathrm{CNOT}=\left(\begin{array}{cccc}1& 0& 0& 0\\ 0& 1& 0& 0\\ 0& 0& 0& 1\\ 0& 0& 1& 0\end{array}\right)$ $H=\frac{1}{\sqrt{2}}\left[\begin{array}{cc}1& 1\\ 1& -1\end{array}\right],\mathrm{and}$ $T=\left[\begin{array}{cc}1& 0\\ 0& e^{i\frac{\pi }{4}}\end{array}\right].$ These circuits can be combined to implement an arbitrary unitary operation. A one-qubit unitary operator can be expressed as a unitary 2×2 matrix with complex elements:

$\left[\begin{array}{cc}a& b\\ -b^{*}& a^{*}\end{array}\right],$ wherein a and b are complex numbers and the notation “x*” indicates a complex conjugate of x. Such a unitary 2×2 matrix U has the following property:

$U^{†}U={\mathrm{UU}}^{†}=I=\left[\begin{array}{cc}1& 0\\ 0& 1\end{array}\right],\mathrm{wherein}$ $U^{†}=\left[\begin{array}{cc}{a}^{*}& -b\\ b^{*}& a\end{array}\right].$ The adjoint U′ of a unitary matrix U is the complex-conjugate transpose of the unitary U and is the inverse of U, denoted U⁻¹.

While circuits can be compiled using the Clifford+T basis, compilation using conventional techniques as in Paetznick and Svore can require exhaustive searches and exponential classical runtimes. Alternative compilation methods, apparatus, and associated circuits based on the Clifford+T basis are disclosed herein. In typical examples described below, a few ancillary qubits and a few measurement operations are used along with purely unitary circuits.

A unitary operation is representable by a Clifford+T circuit if and only if the unitary operation is represented by a unitary matrix of the form 1/√{square root over (2)}^kU where U is a matrix with elements from □[ω] and k is a non-negative integer. □[ω] is a ring of cyclotomic integers of order 8, and consists of all numbers of the form aω³+bω²+cω+d wherein a, b, c, d are arbitrary integers and ω=_e^iπ/4. One choice for a basis of □[ω] is {ω³ω²,ω,1}. To be unitary, UU^†=2^k Id, where Id is an identity matrix. A matrix of such form can be represented as an asymptotically optimal Clifford+T circuit using at most two ancillary qubits. In other representations, no ancillary qubits are required for a single-qubit subject unitary or when Det(1/√{square root over (2)}^kU)=1. Any single-qubit circuit in the {H,T} basis can be expressed as a sequence of syllables of the form T^−kHT^k, k∈□ and at most one additional single-qubit Clifford gate. Any single-qubit unitary operation U can be decomposed into a sequence of axial rotations U=R_z(α) R_x(β) R_z(γ) in accordance with the Euler angle decomposition of U. Thus any single-qubit unitary operation can be decomposed using the techniques presented herein.

T-gates are much harder to perform in a fault-tolerant manner than any of the Clifford gates. In most architectures, a T-gate requires a so-called fault-tolerant “magic state” which is more than an order of magnitude harder to distill for typical quantum error correcting codes than a fault-tolerant Hadamard gate H. The T-gate can be up to two orders of magnitude harder to perform than a CNOT gate or any of the Pauli gates. Accordingly, a cost measure for a Clifford+T circuit (a T-count) is a number of T-gates in a circuit and this cost measure in used in the following description.

With reference to FIG. 1, a compilation method 100 is provided that synthesizes a repeat-until-success (RUS) circuit over a Clifford+T basis for implementing an axial rotation R_z(θ) to a precision ε>0. At 102, a rotation angle and a precision are selected. At 104, a phase factor e^iθ is approximated with a unimodal cyclotomic rational, i.e., with an algebraic number of the form z*/z wherein z∈□[ω]. A suitable approximation procedure based on solving an integer relation problem is discussed below. The value of z is defined up to an arbitrary real-valued factor. In general, a selected z-value may not be includable in a unitary matrix of the form

$\frac{1}{{\sqrt{2}}^L}\left(\begin{array}{cc}z& y\\ -y^{*}& z^{*}\end{array}\right)$ that is exactly representable in the Clifford+T basis.

At 106, several rounds of random modification z(rz), r∈□[√{square root over (2)}] are performed in search of r such that (a) the norm equation |y|²2^L−|rz|² is solvable for y∈□[ω],L∈□ and (b) the one-round success probability |rz|²/2^L is sufficiently close to 1. Suitable procedures are described below. At 108, the value of z is modified and at 110, a corresponding one-qubit circuit is defined. At 112, a two-qubit RUS matrix based on the one-qubit circuit is defined. At 114, a desired two-qubit RUS circuit in the Clifford+T basis is synthesized that implements the R_z(θ) rotation on success and an easily correctable Clifford gate on failure. While a Clifford gate based circuit is convenient for implementation of a correction operation, a correction circuit can include T-gates as well. At 116, a circuit specification for the rotation R_z(θ) is output. Example implementations of these steps are described in further detail below.

Cyclotomic Rational Approximation

As shown in FIG. 1, at 104, an initial approximation of e^iθ is obtained such that z*/z□e^iθ, wherein z is a cyclotomic integer. For a selected real θ and a cyclotomic integer z=aω³+bω²+cω+d, a,b,c,d∈□, |z*/z−e^iθ|≤ε if and only if: |a(cos(θ/2)−sin(θ/2))+b√{square root over (2)} cos(θ/2)+c(cos(θ/2)+sin(θ/2))+d√{square root over (2)} sin(θ/2)|<ε|z|. Thus e^iθ is representable exactly only if ε|z|=0. If ε|z| is small, then |z*/z−e^iθ| is small as well. An integer relation algorithm can be used to find a relation between a set of real numbers and a candidate vector defined by a set of integers a₁, . . . , a_n, not all zero, such that:a_ix₁+ . . . +a_nx_n=0.Most commonly an integer relation algorithm makes iterative attempts to find an integer relation until the size of the candidate vector a₁, . . . , a_n exceeds a certain pre-set bound or a₁x₁+ . . . +a_nx_n falls below a selected resolution level. Such an algorithm can be used to reduce the size of a₁x₁+ . . . +a_nx_n to an arbitrarily small value.

In one example, a so-called PSLQ relation algorithm is used to find an integer relation between (cos(θ/2)−sin(θ/2), √{square root over (2)} cos (θ/2), (cos(θ/2)+sin(θ/2)), √{square root over (2)} sin(θ/2) and terminates if and only if |z*/z−e^iθ|<ε. (The PSLQ algorithm is described in, for example, Helaman R. P. Ferguson and David H. Bailey, “A Polynomial Time, Numerically Stable Integer Relation Algorithm,” RNR Technical Report RNR-91-032 (Jul. 14, 1992), which is incorporated herein by reference.) Upon termination, the algorithm also provides the integer relation candidate vector {a, b,c,d} for which the integer relation is satisfied. Then, z=aω³+bω²+cω+d is the desired cyclotomic integer.

Lifting Phase Approximation to a Unitary: Randomized Search

Upon finding a cyclotomic integer z, the value of z is to be included in a unitary matrix of the form:

$\frac{1}{{\sqrt{2}}^L}\left(\begin{array}{cc}z& y\\ -y^{*}& z^{*}\end{array}\right),$

wherein y∈□[ω],L∈□. In addition, reasonably large values of |z|²/2^L are associated with one-round success probability of an eventual RUS circuit and are thus preferred. It is not clear that a particular value of z can be included in a unitary matrix such as shown above. A value of y∈□[ω] is needed that satisfies a norm equation (|y|²+|z|²)/2^L=1, or, alternatively |y|²=2^L−|z|².

To solve the above norm equation, it is convenient to note that the cyclotomic integer z obtained from a cyclotomic rational approximation of e^iθ is not unique, but is defined up to an arbitrary real-valued factor r∈□[√{square root over (2)}]. For any such r, (rz)*/(rz) is identical to z*/z but the norm equation |y|²=2^L−|rz|² can change dramatically. Thus, if suitable values of r are reasonably dense in □[√{square root over (2)}], random values of r can be selected until the norm equation |y|²=2^L−|rz|² is solvable. Selection of a particular value of y (and a particular unitary matrix) can be based on a ratio of circuit complexity (for example, T-count) and a probability of circuit success, wherein the probability of circuit success can be expressed as p(r)=|rz|²/2^L. Thus, a suitable value of r can be found and the value of z modified so that (rz)*/(rz)□e^iθ. With this modification of z, a y value can be obtained by solving the norm equation, and a single-qubit unitary defined.

Referring to FIG. 2, a method 200 of defining a unitary includes receiving a cyclotomic integer z=aω³+bω²+cω+d such that z*/z□e^iθ and receiving a number sz of samples of r to be evaluated at 202. At 204, a sample space S_M from which r-values are to be randomly selected is defined as S_M←{a+b√{square root over (2)},a,b∈□|0<a²+b²<M²}, wherein M is a sampling radius. Sample spaces of other shapes can be used, but a sampling radius M is convenient. At 206, a value of r is randomly selected without replacement from the sample space S_M, and at 208 an associated value of L is determined as L_r←j log₂(|rz|²)k, wherein j f k is a ceiling function having a value equal to the smallest integer that is greater than f. At 210, the norm equation |y|²=2^L′−|rz|² is evaluated to determine if it is easily solvable for the selected value of r. If the norm equation is not easily solvable, the method 200 determines if additional samples are to be evaluated at 220. If easily solvable, a value of y is obtained at 212 and a merit function is evaluated at 214 to determine if this value of y is preferable to previously obtained values. A representative merit function tc is a ratio of circuit T-count to probability of success p, i.e.,

$\mathrm{tc}\leftarrow \mathrm{Tcount}\left[\frac{1}{{\sqrt{2}}^{L_r}}\left(\begin{array}{cc}z& y\\ -y^{*}& z^{*}\end{array}\right)\right]/p.$

Upon computation of the merit function tc at 214, the computed value is compared with a value associated with a previous estimate of y at 216. If the value of the merit function is less than that associated with the previous estimate, stored values of r and y and the associated merit function value are updated at 218. It is then determined if additional samples of r are to be tried at 220. If the merit function found to have not been decreased at 216, then it is determined if additional samples of r are to be tried at 220 as well. If so additional samples are to be evaluated, an additional random value of r is obtained at 206 and the processing steps are repeated with this value of r. Otherwise, values of r and y are output at 222. In some instances, no suitable values of r are found, and the lack of suitable values is output instead at 222. Generally, if no values are found (i.e., Y=none), the procedure is repeated by reducing the value of precision by, for example, reducing the value by a factor of 2.

A particular merit function is used in the example of FIG. 2 and is based on a function:

$\mathrm{Tcount}=\mathrm{Tcount}\left[\frac{1}{{\sqrt{2}}^{L_r}}\left(\begin{array}{cc}z& y\\ -y^{*}& z^{*}\end{array}\right)\right].$ Methods of determination and/or estimation of a number of T-gates (i.e., circuit T-count) for a unitary as shown above are well known. However, other types of merit functions can be used based on one or more of T-count, success probability, or other factors. The T-count function is described in, for example, Bocharov and Svore, “A Depth-Optimal Canonical Form for Single-Qubit Quantum Circuits,” available at http://arxiv.org/abs/1206.3223, and Gossett et al., “An algorithm for the T-count,” available at http://arxiv.org/abs/1308.4134. Methods similar to the method of FIG. 2 are shown in greater detail in the pseudo-code for the procedures RAND-NORMALIZATION of Tables 1-2 below.

TABLE 1
Random Normalization (z, sz, M)
Input: z ∈   [w], sample size sz, M
1:  procedure RAND-NORMALIZATION(z, sz, M)
2:  cnt ← 0, Y ← None, Tc ← ∞
3:  SM ← {a + b {square root over (2)}, a, b ∈  |0 < a2 + b2 < M2}
4:  while (cnt ++) ≤ sz do
5:  Sample r without replacement from SM
6:  Lr ← ┌log2(|r z|2)┐
7:  if |y|2 = 2Lr − |r z|2 is easily solvable then
8:  p ← |r z|2/2Lr
9:  tc←Tcount⁢⁢(12Lr⁢(zy-y*z*))/p
10: if tc < Tc then
11: Tc ← tc, Y ← {r, y}
12: end if
13: end if
14: end while
15: end procedure

An alternative procedure is shown in Table 2 below. In this alternative procedure, a minimum success probability p_min is input along with a selected value of z and a sample radius M. The function card(S_M) is the cardinality of the set S_M.

TABLE 2
Random Normalization (z, pmin, M)
Input: z ∈  [ω], minimum success probability pmin, M
1:  procedure RAND-NORMALIZATION(z, pmin, M)
2:  cnt ← 0, Y ← None, Tc ← ∞
3:  SM ← {a + b {square root over (2)}, a, b ∈  |0 < a2 + b2 < M2}
4:  while (cnt ++) ≤ card(SM) do
5:  Sample r without replacement from SM
6:  Lr ← ┌log2(|r z|2)┐
7:  if |y|2 = 2Lr − |r z|2 is easily solvable then
8:  p ← |r z|2/2Lr
9:  tc←Tcount⁢⁢(12Lr⁢(zy-y*z*))/p
10: if p > pmin and tc < Tc then
11: Tc ← tc, Y ← {r, y}
12: end if
13: end if
14: end while
15: end procedure

Single-Qubit Circuit Synthesis

FIG. 3 illustrates a method 300 of defining a single-qubit circuit based on a selected rotation angle θ, a precision ε, a number of iterations sz, and a sampling radius M that are input at 302. At 304, a value of the precision is re-assigned, and at 306 a procedure for finding parameters for the corresponding unitary matrix is initiated. At 308, a suitable cyclotomic integer is found, and at 310 a random search/norm equation solution procedure such as those of Tables 1-2 is implemented. If a suitable value of Y={r,y} is found, a value of L is computed at 314, and the required unitary matrix is defined at 316. Pseudocode for such a method is shown in Table 3 below.

TABLE 3
Single-Qubit Circuit Determination
Input: angle θ, target precision ϵ, sample size sz, hyperparameter M
1:  procedure SINGLE-QUBIT-DESIGN(θ, ϵ, sz)
2:  ret ← None, ∈ ← 2ϵ
3:  while ret = None do
4:  ∈ ← ∈/2
5:  Compute z ∈  [ω] s.t. |z*/z − eiθ| < ∈
6:  Y ← RAND − NORMALIZATION(z, sz)
7:  if Y ≠ None then
8:  r ← first(Y); y ← last(Y)
9:  L ← log2(|rz|2 + |y|2)
10: ret←12L⁢⁢(rzy-y*rz*))
11: end if
12: end while
13: end procedure

Repeat-Until-Success Unitary Circuit Synthesis

With the above methods, a single-qubit unitary matrix for the rotation R(θ) in the Clifford+T basis is found of the form:

$V=\frac{1}{{\sqrt{2}}^L}\left(\begin{array}{cc}z& y\\ -y^{*}& z^{*}\end{array}\right),$ wherein y, z∈□(ω),L∈□. The unitary matrix V can be represented as an ancilla-free circuit in the single-qubit Clifford+T basis using a procedure described by Kliuchnikov et al., “Fast and efficient exact synthesis of single qubit unitaries generated by Clifford and T gates,” arXiv:12065236v4 (Feb. 27, 2013), which is incorporated herein by reference. The unitary matrix V can be decomposed by other methods as well. To find a two-qubit (RUS) circuit (i.e., with an ancilla), define a two-qubit unitary

$U=\left(\begin{array}{cc}V& 0\\ 0& V^{†}\end{array}\right).$ This two-qubit unitary can be incorporated into a RUS circuit with one ancilla so as to perform the rotation

$\left(\begin{array}{cc}1& 0\\ 0& z^{*}/z\end{array}\right)\hspace{1em}$ on a primary qubit on success and the Pauli Z operation on failure. The unitary matrix V that is included in U can be incorporated into a two-qubit Repeat-Until-Success (RUS) circuit with one ancillary qubit, such that the circuit performs the rotation

$\left(\begin{array}{cc}1& 0\\ 0& z^{*}/z\end{array}\right)\hspace{1em}$ upon success and a Pauli Z operator on failure, wherein

$Z=\left(\begin{array}{cc}1& 0\\ 0& -1\end{array}\right).$ For example, for a two-qubit design where qubit 1 is a primary qubit and qubit 2 is an ancillary qubit initialized with |0, if |Ψ=a|0+b|1 is the input state on the primary qubit then U(|Ψ⊗|0) is proportional to za|00−y*a|01+z*b|10+y*b|11. Therefore upon measuring the ancillary qubit, if the measurement result is 0, then the output state is equivalent to a|0+(z*/z)b|1 (i.e., success) and if the measurement result is 1 then the output state is equivalent to a|0−b|1 (i.e., failure).

A representative RUS circuit 400 with an ancillary qubit 402 is illustrated in FIG. 4. The ancillary qubit 402 is initialized in a state |0 and is coupled to an RUS circuit 406 along with a primary qubit 404 in a state |Ψ=a|0+b|1. At 408, an output state of the ancillary qubit 408 is measured. If the measurement of the ancillary qubit 402 is 0, the output state of the primary qubit corresponds to a|0+(z*/z)b|1 which is associated with the selected rotation (referred to as “success”). If the output state of the ancillary qubit is 1, then the output state of the primary qubit 404 is a|0−b|1, which does not correspond to the intended rotation operator (referred to as “failure”). In this case, the primary qubit 404 is coupled to a subsequent two-qubit circuit 414 having an ancillary qubit 409 that is initialized to state |0. The primary qubit 404 is coupled to a Z gate 412 that produces a state |ω=a|0+b|1 which is the same as the original input state to the RUS circuit 406 so that the Z gate 412 reverses the operation of the RUS circuit 406. The processing operations of the two-qubit circuit 414 can be repeated until success is achieved. The second RUS circuit 416 provides similar results at the RUS circuit 406 upon measurement at 418. Additional similar stages such as circuit 420 can be provided to increase the likelihood of success.

The two-qubit unitary U can be implemented as a series of Clifford+T gates but implementations in which circuit T-count is the same or only slightly greater than that of the corresponding optimal single qubit circuit are preferred. If V and W are single-qubit unitaries both representable by single-qubit ancilla-free Clifford+T circuits of the same minimal T-count t, then it can be shown that the two-qubit unitary

$U=\left(\begin{array}{cc}V& 0\\ 0& W\end{array}\right)$ is exactly and constructively representable by a Clifford+T circuit of T-count at most t+9. Generally, given two single-qubit Clifford+T circuits of the same T-count, either can be manufactured from the other by insertion and deletion of Pauli gates, along with the addition of at most two non-Pauli Clifford gates. The latter two gates are responsible for all potential T-count increases while lifting the V,W pair to the desired two-qubit circuit.

For convenience, a T code is defined as a circuit generated by TH and T^†H syllables. If c is a T code then Hc⁻¹H is a T code. A decorated T code is a circuit generated by syllables of the form PT^±1QH wherein P,Q∈{Id,X,Y,Z}, and Id is an identity operator. A decorated T code c₂ is referred to as a decoration of a T code c₁ if c₁ can be obtained from c₂ by removing all explicit occurrences of Pauli gates. A single-qubit, ancilla-free Clifford+T circuit can be constructively rewritten in the form g₁cg₂ where c is a T code and g₁, g₂ are single-qubit Clifford gates.

The following identities can also be useful:

XTH=T^†HZω

YTH=T^†HYω⁵

ZTH=THX

XSHTH=S^†HTHXω²

YSHTH=S^†HT^†HYω³

ZSHTH=SHT^†HZω

Canonical T, H circuits are defined as circuits representable as arbitrary compositions of TH and HTH syllables, and starting with a TH syllable. For any T code c₁ any single-qubit ancilla-free Clifford+T circuit c₂ of the same T-count can be constructively rewritten as g₃c′₁g₄ where c′₁ is a decoration of c₁ and g₃, g₄ are Clifford gates. If c₁ and c₂ are single-qubit Clifford+T circuits of the same T-count t, a T code c₃, one of its decorations c₄, and Clifford gates g₁, g₂, g₃, g₄ can be found such that c₁=g₁c₃g₂ and c₂=g₃c₄g₄.

A lift procedure is defined that converts a decorated T-code into a two qubit circuit. For any Pauli gate P, Lift(P)=Λ(P), where Λ(P) indicates a controlled-P gate. For any other gate g, Lift(g)=Id⊗g. Given a single-qubit Clifford+T circuit c=g₁ . . . g₄ wherein g_i∈{X,Y,Z,H,T,T^†} i=1, . . . , r, Lift(c)=Lift(g₁) . . . Lift(g_r). Informally, up to Clifford gate wrappers, any two single-qubit Clifford+T circuits are related via T code decoration.

If a single-qubit unitary U is represented as Hc₁ where c₁ is a T code of T-count t, then the two-qubit unitary

$\left(\begin{array}{cc}U& 0\\ 0& U^{†}\end{array}\right)\hspace{1em}$ is constructively represented by a two-qubit Clifford+T circuit of T-count of either t or t+1. The unitary matrix U^† can be decomposed into Hc₂ω^k, k∈□ wherein c₂ is a decoration of the circuit c₁. Since (Hc₁)⁻¹=(c₁)⁻¹H is H followed by a T code, the desired decomposition is Lift(Hc₂)(T^k⊗Id). The T-count of Lift(Hc₂) is t and the T-count of (T^kId) is either 0 or 1.

More generally, if V,W are single-qubit unitaries both representable by single-qubit ancilla-free Clifford+T circuits of the same minimal T-count t, then a two-qubit unitary

$U=\left(\begin{array}{cc}V& 0\\ 0& W\end{array}\right)$ is exactly and constructively representable by a Clifford+T circuit of T-count of at most t+9.The unitary W can be constructively represented as g₃g₁c′g₂g₄ wherein c′ is a decoration of c, and g₃, g₄ are Clifford gates. Defining c″=Lift (c′), U can be represented as Λ(g₃)(Id⊗g₁)c″(Id⊗g₂)Λ(g₄). Each occurrence of a controlled Clifford gate increases the T-count by at most 5. By applying a suitable global phase the T-count of Λ(g₃) is at most 4. For any Clifford gate g, the controlled gate Λ(g) can be can be represented as a product of Clifford gates and exactly one gate of the form Λ(h) wherein h∈{Id,ω⁻¹S,H,ω⁻¹SH,ω⁻¹HS}.

A representative method of obtaining a two-qubit unitary based on a single input unitary Vis shown in FIG. 5. At 502, a single qubit unitary V is input. At 504, V is represented as a product g₁cg₂ and at 506, V^† is represented as a product g₃c′g₄, wherein g₁, g₂, g₃, g₄ are Clifford gates, c is a T-code, and c′ is a decoration of c. At 508, additional Clifford gates are obtained based on the Clifford gates used in the product representations of V and V^†. At 510, a suitable two qubit unitary is returned as Λ(g₅)(Id⊗g₁)Lift(c′)(Id⊗g₂)Λ(g₆). Pseudocode for this method is found in Table 3 below.

TABLE 3
Pseudocode for determining a two-qubit unitary
with a primary and an ancillary qubit.
Input: single qubit unitary V   representable in Clifford+T
1: procedure PARSIMONIOUS-RUS-SYNTHESIS(V)
2: represent V as g1 c g2 where c is T code   g1, g2 are
Clifford gates
3: represent V† as g3 c′ g4 where c′ is a decoration of c
g3, g4 are Clifford gates
4: g5 ← g3 g1†, g6 ← g2†g4
5: ret ← Λ(g5)(Id   g1)Lift(c′)(Id   g2)Λ(g6)
6: end procedure
Output: ret

Example

Determination of a Clifford+T basis RUS circuit for a representative rotation is described below for a target rotation R_z(π/64) and a precision of 10⁻¹¹. A ratio z*/z is found that approximates e^iπ/64. In this example, z=1167ω³=218ω²−798ω−359 and an associated precision is about 3×10⁻¹², better than the target precision of 10⁻¹¹. Next, the value of z is modified using a randomized search to find a solvable norm equation so that z=18390ω³−4226ω²−11614ω−1814 and a one round success probability is 0.9885. Circuit synthesis then generates the RUS circuit design Λ(ω⁻¹ SH)coreΛ(ω⁻¹SH), wherein

• • core=id{circle around (/)}(T⁻¹ H T⁻¹ H) CNOT Id ⊗(T⁻¹ H T H) CNOT Id⊗(T H T H T³¹ H) CNOT Id ⊗(T⁻¹ H) CNOT Id⊗(T⁻¹ H) CNOT Id⊗(T⁻³ H) CNOT Id⊗(T⁻¹ H) CNOT Id⊗(T H) CNOT Id{circle around (/)}(T⁻³ H T³ H) CNOT Id⊗(T⁻¹ H T⁻¹ H T⁻¹ H) CNOT Id⊗(T H T H) CNOT Id⊗(T H T⁻³ H) CNOT Id{circle around (/)}(T³ H) CNOT Id⊗(T⁻³ H) CNOT Id⊗(T H T H) CNOT Id⊗(T⁻¹ H) CNOT Id⊗(T H T⁻¹ H) CNOT Id⊗(T⁻¹ H) CNOT Id⊗(T³ H) CNOT Id⊗(T⁻¹ H T⁻¹ H) CNOT Id⊗(T H T H) CNOT Id⊗(T⁻³ H T³ H T⁻¹ H) CNOT Id⊗(T H T⁻¹ H) CNOT Id⊗(T H) CNOT Id⊗(T⁻¹ H) CNOT Id⊗(T H) CNOT Id⊗(T⁻³ H) CNOT Id⊗(T H) CNOT T G T⁻¹ H T H CNOT Id⊗(T⁻¹ H T⁻¹ H) CNOT Id⊗(T⁻³ H S^†)The S-gate above corresponds to a square of the T-gate. The Λ(ω⁻¹ SH) operation has a T-count of 4 and the overall cost of the RUS circuit measured in T gates is 58. The expected T-cost is 58/0.9885<58.7. This circuit implements a z-rotation on success and Pauli Z gate operation on failure, which is Pauli-correctable. A final trace distance between R_z(π/64) and the rotation implemented by the RUS is 1.056×10⁻¹² which is better than the requested precision. Another version of this circuit is Λ(ω⁻²H)core(Id⊗S)Λ(H), which has an expected T-cost of 54.6, performs the same z-rotation on success and the phase gate Son failure. Application of the phase gate S is Clifford-correctable.

FIGS. 6-7 show mean and standard deviation across a set of expected T-count values of the RUS circuits generated algorithmically for each target rotation in the second test set for each precision. FIG. 6 shows T-count statistics for 1000 target rotation angles randomly selected from the interval (0,π/2). This set of target axial rotations was evaluated at 25 levels of target precision ε∈{10⁻¹¹, . . . , 10⁻³⁵}. A regression formula for T-count is 3.817 log₁₀(1/ε)+9.2=1.149 log₂(1/ε)+9.2. FIG. 7 shows T-count statistics for 40 rotation angles of the form π/2^k, k=2, . . . , 41. This set of target rotation angles (referred to as Fourier angles) was evaluated at 30 levels of target precision ε∈{10⁻¹¹, . . . , 10⁻⁴⁰}. A regression formula for T-count is 3.59 log₁₀(1/ε)+17.5=1.08 log₂(1/ε)+17.5.

n-Qubit RUS Circuits

Consider an n-qubit unitary of the form

$\frac{1}{z}V$ where z∈Z[√{square root over (i)}] and V is a 2ⁿ×2ⁿ matrix over Z[√{square root over (i)}]. This unitary can be implemented by a Clifford+T RUS with at most n+2 qubits. A method 800 for finding such a unitary is shown in FIG. 8. At 802, an integer L and an r∈Z[√{square root over (2)}] are selected such that a norm equation |y|²=2^L−|rz|² is solvable for y∈Z[√{square root over (t)}]. At 804, a 2ⁿ⁺¹×2ⁿ matrix

$W=\frac{1}{{\sqrt{2}}^L}\left[\begin{array}{cc}r& V\\ y& Id\end{array}\right]$ is defined which is to be completed to a 2ⁿ⁺¹×2ⁿ⁺¹ unitary matrix following a procedure described in Kliuchnikov et al., “Fast and efficient exact synthesis of single qubit unitaries generated by Clifford and T gates,” arXiv:12065236v4 (Feb. 27, 2013). At 806 the 2ⁿ columns of the matrix W are reduced to a half-basis by a Clifford+T circuit c that is synthesized using a procedure described in Brett Giles and Peter Selinger, “Exact synthesis of multi-qubit Clifford+T circuits,” Phys. Rev. A (2012), such that:

$\mathrm{cW}=\left(\begin{array}{c}{\mathrm{Id}}_{2^{″}}\\ 0_{2^{″}}\end{array}\right)$ It follows that c⁻¹ evaluates to a 2ⁿ⁺¹×2ⁿ⁺¹ unitary matrix that complements the half-square matrix W. The circuit c⁻¹ can intermittently use an ancillary qubit to perform the two-level primitive unitaries of the T-type. In any case, c⁻¹ is the desired RUS circuit and is output at 810. Indeed,

$c^{-1}(0\rangle \otimes \psi \rangle )=(0)\otimes \left(\frac{r}{{\left(\sqrt{2}\right)}^L}V\right)❘\psi \rangle )+(1\rangle \otimes \left(\frac{y}{{\left(\sqrt{2}\right)}^L}\mathrm{Id}\right)\psi \rangle ).$ The target operator

$\frac{1}{z}V$ is the unitarization of

$\frac{r}{{\left(\sqrt{2}\right)}^L}V$ and the unitarization of

$\frac{y}{{\left(\sqrt{2}\right)}^L}$ Id is Id.Thus, when the top qubit is measured,

$\frac{1}{z}V$ is returned for a 0 measurement and Id is returned for a 1 measurement. A one-round success rate for this circuit is |rz|²/2^L, therefore, values of L close to ┌log₂(|rz|²)┐ are preferred.

Reducing the Number of Entanglers in RUS Designs

RUS circuits synthesized as disclosed herein may include a large number of controlled-Pauli gates. In some cases, an RUS circuit design could contain 2t controlled-Pauli Pauli gates wherein t is the circuit T-count. Although a controlled-Pauli gate has zero T-count, in some examples, it is preferred to reduce the number of controlled-Pauli gates. Up to one half of the Pauli gates in a circuit can be constructively eliminated from a T-odd T, H, Pauli circuit using a set of signature-preserving rewrite rules. For a single-qubit Clifford+T circuit of the form g₀T^k1g₁, . . . , T^krg_r where g₀, g₄ are Clifford gates and for i=1, . . . , r 1 wherein g_i ∈{Id,X,Y,Z,H,XH,YH, ZH,HX,HY,HZ}, the series of integers {k₁, . . . , k_r} is referred to as a signature of the circuit. A unitary V^† can be represented as a Pauli decoration c′ of a circuit c representing V is so that the signatures of c and c′ are the same. Only the signature of the Pauli decoration circuit is of concern, and any equivalent transformations can be applied to such a decoration as long as those transformations preserve the signature. If the T-count of a decorated T code c is t, then the circuit can be rewritten in a form c′i^m, m∈□, wherein c′ is an equivalent decorated T code with no more than t+1 Pauli gates and the same signature as c. In some cases, one or more of the following rewrite rules is used:

Yω² XZ

XZω⁻²Y

ZXω²Y

XXempty

ZZempty

XHHZ

ZHHX

ZXω⁴ XZ

ZT^mT^mZ

Based on the commutation rules XH=HZ; YH=−YH; and ZH=XH, any term of the form PQH, wherein P,Q are Pauli gates can be reduced to H P′i^mm∈□, wherein P′ is a Pauli gate.

Computing Environments

FIG. 9 and the following discussion are intended to provide a brief, general description of an exemplary computing environment in which the disclosed technology may be implemented. Although not required, the disclosed technology is described in the general context of computer executable instructions, such as program modules, being executed by a personal computer (PC). Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. Moreover, the disclosed technology may be implemented with other computer system configurations, including hand held devices, multiprocessor systems, microprocessor-based or programmable consumer electronics, network PCs, minicomputers, mainframe computers, and the like. The disclosed technology may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

With reference to FIG. 9, an exemplary system for implementing the disclosed technology includes a general purpose computing device in the form of an exemplary conventional PC 900, including one or more processing units 902, a system memory 904, and a system bus 906 that couples various system components including the system memory 904 to the one or more processing units 902. The system bus 906 may be any of several types of bus structures including a memory bus or memory controller, a peripheral bus, and a local bus using any of a variety of bus architectures. The exemplary system memory 904 includes read only memory (ROM) 908 and random access memory (RAM) 910. A basic input/output system (BIOS) 912, containing the basic routines that help with the transfer of information between elements within the PC 900, is stored in ROM 908.

As shown in FIG. 9, computer-executable instructions for RUS synthesis are stored in a memory portion 916 and includes instructions for, for example, solving integer equations, evaluating and solving norm equations, and random sampling for determination of r values. In addition, a memory portion 918 stores RUS circuit definitions obtained using the disclosed methods. Computer-executable instructions are also stored for receiving rotation angles and precisions as well as communicating circuit definitions.

The exemplary PC 900 further includes one or more storage devices 930 such as a hard disk drive for reading from and writing to a hard disk, a magnetic disk drive for reading from or writing to a removable magnetic disk, and an optical disk drive for reading from or writing to a removable optical disk (such as a CD-ROM or other optical media). Such storage devices can be connected to the system bus 906 by a hard disk drive interface, a magnetic disk drive interface, and an optical drive interface, respectively. The drives and their associated computer readable media provide nonvolatile storage of computer-readable instructions, data structures, program modules, and other data for the PC 900. Other types of computer-readable media which can store data that is accessible by a PC, such as magnetic cassettes, flash memory cards, digital video disks, CDs, DVDs, RAMs, ROMs, and the like, may also be used in the exemplary operating environment.

A number of program modules may be stored in the storage devices 930 including an operating system, one or more application programs, other program modules, and program data. Storage of quantum syntheses and instructions for obtaining such syntheses can be stored in the storage devices 930 as well as or in addition to the memory 904. A user may enter commands and information into the PC 900 through one or more input devices 940 such as a keyboard and a pointing device such as a mouse. Other input devices may include a digital camera, microphone, joystick, game pad, satellite dish, scanner, or the like. These and other input devices are often connected to the one or more processing units 902 through a serial port interface that is coupled to the system bus 906, but may be connected by other interfaces such as a parallel port, game port, or universal serial bus (USB). A monitor 946 or other type of display device is also connected to the system bus 906 via an interface, such as a video adapter. Other peripheral output devices, such as speakers and printers (not shown), may be included. In some cases, a user interface is display so that a user can input a circuit for synthesis, and verify successful synthesis.

The PC 900 may operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 960. In some examples, one or more network or communication connections 950 are included. The remote computer 960 may be another PC, a server, a router, a network PC, or a peer device or other common network node, and typically includes many or all of the elements described above relative to the PC 900, although only a memory storage device 962 has been illustrated in FIG. 9. The personal computer 900 and/or the remote computer 960 can be connected to a logical a local area network (LAN) and a wide area network (WAN). Such networking environments are commonplace in offices, enterprise wide computer networks, intranets, and the Internet.

When used in a LAN networking environment, the PC 900 is connected to the LAN through a network interface. When used in a WAN networking environment, the PC 900 typically includes a modem or other means for establishing communications over the WAN, such as the Internet. In a networked environment, program modules depicted relative to the personal computer 900, or portions thereof, may be stored in the remote memory storage device or other locations on the LAN or WAN. The network connections shown are exemplary, and other means of establishing a communications link between the computers may be used.

With reference to FIG. 10, an exemplary system for implementing the disclosed technology includes computing environment 1000, where compilation into braid pattern circuits is separated from the quantum processing that consumes the compiled circuits. The environment includes a quantum processing unit 1002 and one or more monitoring/measuring device(s) 1046. The quantum processor executes quantum circuits that are precompiled by classical compiler unit 1020 utilizing one or more classical processor(s) 1010. The precompiled quantum circuits such as RUS circuits 1003 are downloaded into the quantum processing unit via quantum bus 1006.

With reference to FIG. 10, the compilation is the process of translation of a high-level description of a quantum algorithm into a sequence of quantum circuits. Such high-level description may be stored, as the case may be, on one or more external computer(s) 1060 outside the computing environment 1000 utilizing one or more memory and/or storage device(s) 1062, then downloaded as necessary into the computing environment 1000 via one or more communication connection(s) 1050. Alternatively, the classical compiler unit 1020 is coupled to a classical processor 1010 and an RUS compiler procedure library 1021 that contains some or all procedures necessary to implement the methods described above as well as an RUS circuit library 1003 that stores compiled circuits.

Having described and illustrated the principles of our invention with reference to the illustrated embodiments, it will be recognized that the illustrated embodiments can be modified in arrangement and detail without departing from such principles. For instance, elements of the illustrated embodiment shown in software may be implemented in hardware and vice-versa. Also, the technologies from any example can be combined with the technologies described in any one or more of the other examples. Alternatives specifically addressed in these sections are merely exemplary and do not constitute all possible

FIG. 11 illustrates an alternative circuit 1100 that implements a two-qubit unitary transformation of the form

$\left(\begin{array}{cc}U& 0\\ 0& U^{†}\end{array}\right)\hspace{1em}$ wherein U is a single qubit unitary 1130, Depending on a value of a flag bit b (established by a qubit 1121), the circuit 1100 implements a transformation of an input state of a qubit 1122 that is given by either U or U^\. The resulting state is obtained at the output 1155, wherein the output state is unentangled with all other qubits. The single-qubit unitary U 1130 is of the form R_z(θ)R_x(β)R_z(−θ), wherein θ and β are real numbers. The circuit 1100 uses two ancilla qubits 1123, 1124 initialized in 0 states.

The circuit 1100 consists of an initial preparation circuit 1110 that produces an Einstein-Podolsky-Rosen (EPR) state |00>+|11> which is then subjected to quantum routing circuits 1115 and 1140 that permute part of the EPR state and the input state of the qubit 1122 depending on the value of bit b. In a “b=0” branch, the input state of the qubit 1122 undergoes evolution by U and the remaining state |00>+|11> is an eigenstate of eigenvalue 1 of the tensor product operator U^\ with U. In a “b=1” branch, the input state of the qubit 1122 undergoes evolution by U^\ and the remaining state |00>−|11> is an eigenstate of eigenvalue 1 of the tensor product operator U with U.

The overall effect of the circuit 1100 is to achieve at the output 1155 a transformation of the input that corresponds to U in case b=0 and U^\ in case b=1. In either case, the 2 ancilla qubits 1123, 1124 are again returned in the 0 state. As a core circuit 1130 can be executed in parallel, the circuit 1100 has the feature that its overall circuit depth is no larger than the circuit depth of U, except for a constant additive overhead due to the EPR preparation 1110 and computation thereof as well as the routing operations of quantum routing circuits 1115, 1140.

With reference to FIG. 12, a circuit decomposition method 1200 for arbitrary unitary transformations over the cyclotomic field Q(ω) is disclosed that uses at most 2 additional ancilla qubits. At 1202, a unitary is input that can act on one, two, three, or more qubits, and is not limited to acting on a single qubit. At 1206, a selected unitary U is embedded into a unitary W of larger size of the form:

$W=\left(\begin{array}{cccc}\frac{\alpha }{2^{\ell /2}}U& \stackrel{\_}{\beta }{1}_{2^{″}}& \stackrel{\_}{\gamma }{1}_{2^{″}}& 0_{2^{″}}\\ {\mathrm{\beta 1}}_{2^{″}}& -\frac{\stackrel{\_}{\alpha }}{2^{\ell /2}}U†& 0_{2^{″}}& \stackrel{\_}{\gamma }{1}_{2^{″}}\\ {\mathrm{\gamma 1}}_{2^{″}}& 0_{2^{″}}& -\frac{\stackrel{\_}{\alpha }}{2^{\ell /2}}U†& -\stackrel{\_}{\beta }{1}_{2^{″}}\\ 0_{2^{″}}& {\mathrm{\gamma 1}}_{2^{″}}& -{\mathrm{\beta 1}}_{2^{″}}& \frac{\alpha }{2^{\ell /2}}U\end{array}\right)$

One convenient method of determine integer coefficients α, β, γ, δ at 1204 is a method based on a Four Square Decomposition of integers which is applicable for arbitrary matrices U over the cyclotomic field. Alternatively, methods solving norm equations over cyclotomic number fields and subfields can be used, and in some examples, suitable methods are based on particular properties of a selected U. Once the embedding matrix W is obtained at 1206, a Clifford+T factorization is obtained using methods for decomposition of unitary matrices over the ring of integers in Q(ω) at 1208.

In other examples, quantum circuits are defined by obtaining a four tuple of integers so that a given rotation matrix U over the cyclotomic field can be embedded into a unitary W over the ring of cyclotomic integers. The rotation matrix U is embedded into the unitary W, and W is decomposed using a suitable gate set, such as Clifford+T gates. In some examples, an initial RUS circuit is defined based on a plurality of ancilla qubits, and subsequently re-synthesized so as to be implementable with only 2 ancilla qubits.

In other examples, quantum circuits are defined to include two ancilla qubits and a control qubit so as to implement a RUS matrix for axial rotations with circuit depth equal to the circuit depth of the defining block U, wherein a transformation associated with the RUS matrix is associated with U or U^\ based on a value of a control qubit. A controlled routing operation is arranged to couple an input state to a unitary operation implementing either U or U^\ and a controlled preparation operation creates one of two available EPR states depending on whether an eigenstate of a tensor product of U with itself or a tensor product of U with its inverse is required. The circuit decomposition of U is lifted to provide a circuit for parallel execution of U and U^\ and having the same T-depth as a single application of U.

In some examples, quantum circuits such as two-qubit circuits are based on a plurality of gates selected from the group of Hadamard gates, CNOT gates, and T-gates selected in association with an arbitrary single qubit rotation matrix U, wherein entries of the matrix U are real or complex numbers, and U corresponds to a sequence of axial rotations such that U=R_z(α)R_x(β)R_z(γ), wherein R_z denotes a rotation about a z-axis and R_x denotes a rotation about an x-axis, wherein α, β, γ are Euler angles. Ancillary qubits and a primary qubit are coupled to the plurality of gates such that production of a first output state of the first ancillary qubit is associated with an output state of the primary qubit that is associated with the rotation R_z(α), a second output state of the second ancillary qubit associated with an output state of the primary qubit that is associated with the rotation R_x(β and a third output state of the third ancillary qubit associated with an output state of the primary qubit that is associated with the rotation R_z(γ). In some examples, the first ancillary qubit and the primary qubit are reused for production of the rotation R_x(β) and at least one of the second and third ancillary qubits and the primary qubit is reused for production of the rotation R_z(γ). In other examples, the decomposition of U into a sequence of axial rotations is based on Givens rotations.

Having described and illustrated the principles of the disclosed technology with reference to the illustrated embodiments, it will be recognized that the illustrated embodiments can be modified in arrangement and detail without departing from such principles. For instance, elements of the illustrated embodiments shown in software may be implemented in hardware and vice-versa. Also, the technologies from any example can be combined with the technologies described in any one or more of the other examples. It will be appreciated that procedures and functions such as those described with reference to the illustrated examples can be implemented in a single hardware or software module, or separate modules can be provided. The particular arrangements above are provided for convenient illustration, and other arrangements can be used.

Claims

1. A method of defining a quantum circuit, comprising: establishing a rational cyclotomic approximation of a target single-qubit unitary to a requested precision;expanding the rational cyclotomic approximation into a multi-qubit unitary that implements the target single-qubit unitary upon successful measurement;decomposing the multi-qubit unitary into a Clifford+T circuit; anddefining a Repeat-Until-Success (RUS) circuit based on the decomposition.

2. The method of claim 1, further comprising: establishing the rational cyclotomic approximation of the target single-qubit unitary so as to solve a required norm equation; anddefining the multiple-qubit unitary based on the rational cyclotomic approximation.

3. The method of claim 1, wherein the multi-qubit unitary is a multi-qubit unitary defined with respect to at least one ancillary qubit and a primary qubit.

4. The method of claim 2, wherein the target unitary is an axial rotation and is approximated by z*/z wherein z is a cyclotomic integer; and modifying z by randomly selecting at least one value of r∈[√{square root over (2)}] such that the norm equation is solvable for z replaced by rz.

5. The method of claim 4, wherein a single-qubit matrix defined by z and r is of the form

6. The method of claim 5, wherein at least one value of r is selected so as to boost the one-round probability of success p(r)=|rz|2/2L of the RUS circuit.

7. The method of claim 6, wherein the probability of success is proportional to a square of a magnitude of the product of r and z.

8. The method of claim 5, further comprising defining the multi-qubit unitary based on the single-qubit matrix.

9. The method of claim 8, further comprising expanding the single-qubit matrix corresponding to the target single-qubit unitary into a multi-qubit unitary, defining the multi-qubit unitary as a Clifford+T unitary by identifying the entangling two-qubit gates required for implementation of the RUS circuit.

10. The method of claim 9, further comprising decomposing the single-qubit matrix corresponding to the target single-qubit unitary into a product of axial rotations and implementing the multi-qubit unitary corresponding to each axial rotation as a Clifford+T circuit obtained from a product g3c′g4, wherein g1, g2, g3, g4 are Clifford gates, c is a T-code, and c′ is a decoration of c, and defining the two-qubit unitary as Λ(g5)(Id⊗g1)Lift(c′)(Id⊗g2)Λ(g6).

11. The method of claim 10, wherein the ancillary qubit or a plurality of qubits associated with the axial rotations are reused for the implementation of at least one additional RUS circuit.

12. The method of claim 9, further comprising decomposing the single-qubit matrix corresponding to the target single-qubit unitary, wherein the target single-qubit unitary performs a rotation around an axis in the x-y plane; implementing the multi-qubit unitary corresponding to the rotation around an axis in the x-y plane with a circuit obtained from a controlled routing operation, wherein the controlled routing operation directs an input state to a unitary operation implementing either U or U† and prepares one out of two possible EPR states on at least two ancillary qubits.

13. The method of claim 3, wherein the multi-qubit unitary is defined so as to be coupled to the ancillary qubits and the primary qubit, such that measurement of the ancillary qubits can be associated with success or failure of the multi-qubit circuit to produce a primary qubit state corresponding to the target single-qubit unitary.

14. The method of claim 13, further comprising defining a restoring circuit that returns the output state of the primary qubit to an input state of the primary qubit if the ancillary qubits indicate failure of the multi-qubit circuit.

15. The method of claim 1, further comprising receiving a rotation angle θ and the precision, and the cyclotomic approximation is associated with a phase factor eiθ.

16. The method of claim 15, wherein the cyclotomic rational is selected such that |z*/z−eiθ|<ε, wherein ε is the precision and z*/z is the cyclotomic rational.

17. The method of claim 15, wherein the RUS circuit includes at least one ancillary qubit and a primary qubit coupled to a plurality of gates such that production of a first output state of the at least one ancillary qubit is associated with an output state of the primary qubit that is associated with the rotation angle θ.

18. The method of claim 17, wherein a second output state of the at least one ancillary qubit is associated with an output state of the primary qubit that is not associated with the rotation angle θ.

19. The method of claim 18, wherein the RUS circuit includes a restoring circuit situated to be applied to the primary qubit if the ancillary qubits are measured to be in the second state.

20. A compiler for defining a quantum circuit, comprising: a processor; andat least one non-transitory computer-readable storage medium having computer-executable instructions for the method of claim 1.