Information
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Patent Grant
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6267604
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Patent Number
6,267,604
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Date Filed
Thursday, February 3, 200024 years ago
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Date Issued
Tuesday, July 31, 200123 years ago
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Inventors
-
Original Assignees
-
Examiners
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CPC
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US Classifications
Field of Search
US
- 439 61
- 439 65
- 439 74
- 439 75
- 439 761
- 439 79
- 439 108
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International Classifications
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Abstract
An electrical connector includes a housing (12) including a front housing portion (20) having a front wall (21) and a plurality of parallel apertures (22) extending through the front wall. A plurality of circuit boards (13) extend through respective ones of the apertures. Each of the circuit boards has a mating edge (42), and the mating edges are aligned forwardly of the front wall for connection with a mating electrical connector. The housing includes a separate organizer (30) attached to the front housing portion. The organizer has a plurality of slots (33) that are spaced-apart in correspondence with the plurality of apertures, and the circuit boards have mounting edges that are received in respective ones of the slots. The front housing portion comprises upper and lower grooved shrouds extending forwardly from the front wall. The circuit boards comprise a notch in the top edge which receives a corresponding projection. The front housing portion and the organizer are assembled by a post interference fitted in a hole.
Description
FIELD OF THE INVENTION
The invention relates to an electrical connector of the type having multiple rows and columns of conductive elements for connection with a circuit board.
BACKGROUND OF THE INVENTION
Electrical connectors for interconnecting a circuit board backplane to a daughterboard generally comprise two mating connector halves each having multiple rows and columns of conductive elements or contacts. It is known to provide each column of contacts as a separate module that includes a vertical array of contacts having an overmolded carrier. Multiple modules are installed in a connector housing to form a complete connector. See, for example, U.S. Pat. No. 5,066,236. Generally, all of the modules in such a connector are substantially identical. However, there are times when it would be desirable to have different types of modules in a connector in order to accommodate different electrical characteristics of signals through the connector. A problem results in that additional tooling and handling is required for the different types of modules, thereby increasing manufacturing costs.
The backplane to daughterboard connectors have a high contact density and are required to operate at relatively high electrical speeds. Due to continuing trends toward miniaturization and improved electrical performance by the electronics industry, requirements for greater contact density and higher electrical speeds are constantly being promulgated. These requirements lead to design conflicts, especially when electrical speeds are in the range of approximately 500 megahertz and above, due to the fact that increasing the contact density places the contacts in closer proximity to each other, thereby leading to crosstalk between neighboring contacts in different signal pairs.
SUMMARY OF THE INVENTION
It is an object of the invention to provide an electrical connector of simple and economical construction for mounting on a circuit board.
It is another object of the invention to provide an electrical connector having a modular construction.
It is a further object of the invention to provide an electrical connector having a high contact density which is suitable for use with very high speed electrical signals.
It is yet another object of the invention to improve the electrical performance of a circuit board mountable electrical connector.
It is still another object of the invention to provide a modular electrical connector that can be customized with modules having different electrical characteristics.
These and other objects are accomplished by an electrical connector comprising a housing including a front housing portion having a front wall and a plurality of parallel apertures extending through the front wall. A plurality of circuit boards extend through respective ones of the apertures. Each of the circuit boards has a mating edge, and the mating edges are aligned forwardly of the front wall for connection with a mating electrical connector. The housing includes a separate organizer attached to the front housing portion. The organizer has a plurality of slots that are spaced-apart in correspondence with the plurality of apertures, and the circuit boards have mounting edges that are received in respective ones of the slots.
According to another aspect, the front housing portion includes a top wall extending rearwardly from the front wall, and the top wall has slots that are aligned with respective ones of the apertures.
According to another aspect, each of the circuit boards has a top edge and a notch in the top edge, the top edge is received in a respective one of the slots in the top wall, and the notch receives a corresponding projection within said respective one of the slots in the top wall.
According to another aspect, the front housing portion includes upper and lower shrouds extending forwardly from the front wall, and each of the upper and lower shrouds has a plurality of grooves aligned with respective ones of the apertures.
According to another aspect, one of the front housing portion and the organizer has holes, and the other of the front housing portion and the organizer has posts that are interference fitted in the holes.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will now be described by way of example with reference to the accompanying drawings wherein:
FIG. 1
is a right front isometric view of an electrical connector according to the invention;
FIG. 2
is a side elevation view of the connector;
FIG. 3
is a partially exploded left front isometric view of the connector;
FIG. 4
is a partially exploded right rear isometric view of the connector;
FIG. 5
is an exploded isometric view of the connector and a mating electrical connector;
FIG. 6
is an isometric view of the connector and its mating electrical connector in mated condition;
FIG. 7
is an isometric cross-sectional view through a front housing of the connector;
FIG. 8
is an exploded left front isometric view of the connector;
FIG. 9
is an exploded right front isometric view of the connector;
FIG. 10
is a left side elevation view of a first type of circuit board that may be used in the connector;
FIG. 11
is a left side elevation view of a second type of circuit board that may be used in the connector;
FIG. 12
is a right side elevation view of the first type of circuit board;
FIG. 13
is a right side elevation view of the second type of circuit board; and
FIG. 14
is a partial cross-sectional view through three adjacent circuit boards in the connector, wherein pairs of signal tracks are opposed to each other on adjacent circuit boards.
DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT
As shown in
FIGS. 1-5
, an electrical connector
11
according to the invention comprises a dielectric housing
12
which holds a plurality of circuit boards or wafers
13
. Each of the wafers includes a dielectric substrate made of conventional circuit board substrate material, such as FR
4
, and conductive signal tracks
14
and ground tracks
15
on the substrate. The signal and ground tracks provide electrical paths through the connector from a mating interface
16
at one end of the connector which is adapted for connecting with a mating electrical connector
18
, shown in
FIG. 5
, to a mounting interface
17
at another end of the connector which is adapted for connecting with a daughterboard (not shown). Similarly, the mating electrical connector
18
has a mounting interface
19
which is populated by contacts
51
and is adapted for connecting with a motherboard (not shown). The connectors
11
and
18
, shown in mated condition in
FIG. 6
, serve to interconnect a daughterboard to a motherboard.
With reference to
FIGS. 3-5
and
7
, the housing
12
is a two-piece member including a front housing
20
and an organizer
30
. The front housing includes a front wall
21
having a plurality of parallel apertures
22
that extend through the front wall. The front housing also includes a top wall
23
that extends rearwardly from the front wall, and upper and lower shrouds
24
,
25
that extend forwardly from the front wall. The upper and lower shrouds
24
,
25
have grooves
26
,
27
which are aligned with the apertures
22
, and the top wall
23
has slots
28
which are aligned with the apertures.
Each of the circuit board wafers
13
has a mating edge
42
, a mounting edge
43
, a top edge
44
, a back edge
45
, a bottom edge
46
and a rearward edge
47
. A plurality of terminals
50
are secured to the mounting edge such as by soldering. The wafers
13
are installed in the front housing
20
by inserting the mating edges
42
of the wafers through the apertures
22
from the rear of the front wall. Each of the wafer top edges
44
has a notch
48
which receives a corresponding projection
49
, shown in
FIG. 7
, within a respective one of the slots
28
of the front housing.
The organizer
30
includes a bottom wall
31
and a back wall
32
which are formed with a series of horizontal slots
33
and vertical slots
34
that are aligned with and connected to each other at junction region
35
. These horizontal and vertical slots are spaced-apart in correspondence with the plurality of apertures
22
in the front wall
21
. Openings
36
extend from the horizontal slots
33
to an underside
41
of the bottom wall, as shown in
FIG. 4
, but there are no openings from the vertical slots
34
to rear face
37
of the back wall. The horizontal slots
33
are of two types that are arranged in an alternating sequence. The slots
33
of one type extend to a forward edge
38
of the bottom wall
31
to define lands
39
between the slots
33
and the underside
41
. The slots
33
of another type have ends that are spaced from the forward edge
38
by a web
40
at the forward edge, for a purpose that will be explained hereinbelow.
The organizer
30
is attached to the front housing
20
after the wafers
13
are installed in the front housing. The mounting and back edges
43
,
45
, of the wafers are received in the horizontal and vertical slots
33
,
34
, respectively. The terminals
50
of each wafer extend through respective ones of the apertures
36
and extend beyond the underside
41
of the bottom wall
31
where they are exposed for insertion into corresponding through-holes in a daughterboard (not shown). The terminals
50
are held in the apertures
36
by a slight interference fit, thereby stabilizing the terminals which form the mounting interface
17
of the connector. The organizer
30
has posts
54
along a top edge of the back wall
32
, and these posts are interference fitted in holes
56
in the top wall
23
of the front housing to secure the organizer thereto, thereby securely capturing the wafers
13
in the housing
11
.
According to one aspect of the invention as shown in
FIGS. 8 and 9
, the wafers
13
are of two different types that are arranged in an alternating sequence in the connector. The wafers have a keying feature to ensure proper loading in the housing. Keying is provided by either a horizontal recess
60
in the rearward edge
47
of the wafer, or a vertical recess
62
in the mounting edge
43
. The horizontal recess
60
is keyed to one of the lands
39
of the organizer, while the vertical recess
62
is keyed to one of the webs
40
of the organizer.
In the particular embodiment shown, there are ten wafers numbered consecutively 1-10, with the odd numbered wafers being of a first type and the even numbered wafers being of a second type. On the face of each wafer are alternating signal tracks
14
and ground tracks
15
, and the different types of wafers are distinguished by different layouts of the signal and ground tracks. In the present example, each wafer face has two signal tracks
14
which are flanked along substantially their entire lengths by the ground tracks
15
which are broad areas of conductive material. The ground tracks are spaced-apart from the signal tracks by gaps to prevent shorting.
With reference to
FIGS. 10-13
, the two types of wafers are shown in exemplary embodiments.
FIGS. 10 and 11
are plan views of the faces of two wafers which are adjacent in the connector, and
FIGS. 12 and 13
are plan views of two adjacent wafers from an opposite direction.
FIGS. 10 and 11
correspond to the visible faces of wafers
1
and
2
, respectively, in
FIG. 8
, and
FIGS. 12 and 13
correspond to the visible faces of wafers
9
and
10
, respectively, in FIG.
9
. It should be apparent, then, that
FIGS. 10 and 12
show opposite faces of the first wafer type, and
FIGS. 11 and 13
show opposite faces of the second wafer type.
Each of the wafers has nine terminals
50
at the mounting edge
43
, and nine contact pads adjacent to the mating edge
42
which are allocated as signal pads
64
and ground pads
65
. The signal pads
64
are electrically connected to the signal tracks
14
, and these pads
64
are all on one side or face of each wafer
13
. The ground pads
65
are electrically connected to the ground tracks
15
, and these pads
65
are all on the opposite side or face of each wafer. Conductive vias
66
provide electrical connections between signal and ground tracks
14
,
15
which are on an opposite side of the wafer from their associated signal pads
64
and ground pads
65
, respectively.
According to the invention, signal tracks on opposed faces of adjacent wafers are substantially mirror images of each other. With reference to
FIGS. 10 and 13
, first and second signal tracks
71
,
72
on the first type of wafer are substantially mirror images of third and fourth signal tracks
73
,
74
, on the second type of wafer. Similarly, with reference to
FIGS. 11 and 12
, fifth and sixth signal tracks
75
,
76
on the second type of wafer are substantially mirror images of seventh and eighth signal tracks
77
,
78
on the first type of wafer. Thus, adjacent wafers in the connector have signal tracks which are opposed to each other on opposed faces of the adjacent wafers. This provides a beneficial arrangement for use with paired electrical signals. According to the invention, pairs of tracks which are opposed to each other on adjacent wafers are dedicated to carry respective signal pairs. This aspect is illustrated in
FIG. 14
, wherein wafers
13
have signal tracks
14
and intervening ground tracks
15
. Adjacent wafers have pairs of opposed signal tracks
14
, each pair being enclosed within an imaginary ellipse
80
for illustration, and each of these pairs is dedicated to a respective electrical signal pair through the connector.
The disclosed arrangement of signal tracks promotes electrical coupling between the dedicated signal tracks of each signal pair due to their mutual proximity. An advantage of this arrangement is that, since the signal tracks in each pair are substantially mirror images of each other, the signal tracks in each pair have substantially identical length, thereby minimizing reflections of paired electrical signals.
It should be noted that successive signal tracks along each wafer couple to other signal tracks on successive alternate sides of the wafer. Thus, pairs of signal tracks are alternately staggered on opposite sides of each wafer. This provides the best possible electrical isolation of each signal pair from neighboring signal pairs.
In an alternative arrangement, multiple signal tracks on the same side of a single wafer may be paired with each other by routing pairs of the signal tracks in close mutual proximity, thereby promoting edge-wise electrical coupling between the signal tracks of each pair.
The invention provides a number of advantages. The circuit board wafers offer great design flexibility in that the layout of conductive tracks on the wafers can be selected for optimum electrical performance according to customer requirements and system characteristics. The wafers can be customized to provide desirable electrical characteristics for particular applications, and variations in electrical characteristics are easily accommodated. Custom wafers can be designed and manufactured simply and easily by changing the artwork on the wafer. These custom wafers can use the same contacts, housings and assembly equipment as any other wafer, thereby allowing custom wafers to be easily interchanged with existing wafers. Thus, a customizable electrical connector is provided at relatively low expense.
The invention having been disclosed, a number of variations will now become apparent to those skilled in the art. Whereas the invention is intended to encompass the foregoing preferred embodiments as well as a reasonable range of equivalents, reference should be made to the appended claims rather than the foregoing discussion of examples, in order to assess the scope of the invention in which exclusive rights are claimed.
Claims
- 1. An electrical connector comprising:a housing including a front housing portion having a front wall and a plurality of parallel apertures extending through the front wall, a plurality of circuit boards extending through respective ones of the apertures, each of the circuit boards having a mating edge, the mating edges being aligned forwardly of the front wall for connection with a mating electrical connector, the housing including a separate organizer attached to the front housing portion, the organizer having a plurality of slots that are spaced-apart in correspondence with the plurality of apertures, and the circuit boards having mounting edges that are received in respective ones of the slots.
- 2. The electrical connector of claim 1 wherein openings extend from the slots to an underside of the organizer, and the circuit boards have terminals along the mounting edges, the terminals extend through the openings in the organizer and extend below the underside of the organizer for connection with a daughterboard.
- 3. The electrical connector of claim 1 wherein the front housing portion includes a top wall extending rearwardly from the front wall, and the top wall has slots that are aligned with respective ones of the apertures.
- 4. The electrical connector of claim 3 wherein the front housing portion includes upper and lower shrouds extending forwardly from the front wall, and each of the upper and lower shrouds has a plurality of grooves aligned with respective ones of the apertures.
- 5. The electrical connector of claim 3 wherein each of the circuit boards has a top edge and a notch in the top edge, the top edge is received in a respective one of the slots in the top wall, and the notch receives a corresponding projection within said respective one of the slots in the top wall.
- 6. The electrical connector of claim 1 wherein one of the front housing portion and the organizer has holes, and the other of the front housing portion and the organizer has posts that are interference fitted in the holes.
- 7. The electrical connector of claim 6 wherein the front housing portion includes a top wall extending rearwardly from the front wall, and the holes are in the top wall.
US Referenced Citations (8)