1. Technical Field
The present disclosure relates to the field of voltage reference generators and, particularly, to the band-gap voltage reference circuits.
2. Description of the Related Art
As it is known, many electrical circuits employ a voltage reference circuit, which should exhibit little dependence on supply and process parameters and a well defined temperature behavior. A known reference generator technique is the band-gap reference which balances a negative temperature coefficient of a pn junction with a positive temperature coefficient of the thermal voltage, Vth=kBT/q, where kB is the Boltzmann's constant and q the electron's charge. Typically, the two terms having opposite temperature behaviors are the voltage base-emitter Vbe of a BJT (bipolar junction transistor) and the difference ΔVbe between two bipolar transistors. The generated voltage Vbg can be expressed as:
Vbg=K1Vbe+K2ΔVbe
wherein factors K1 and K2 represent ratio of resistors included in the voltage reference circuit, having the same temperature behavior.
It has been observed that many second order effects cause variation of the derivatives of Vbe and ΔVbe. Consequently, the temperature variations of the two terms indicated in the expression above are still linear, but their second order derivatives have a variable temperature behavior. This situation produces a voltage versus temperature curve (volts/° C.) showing a parabolic behavior as the one exemplary depicted in
Moreover, the statistical dispersion of silicon parameters during the manufacturing process causes a dependence of the temperature which can be different for each manufactured circuit. Therefore, it is necessary to calibrate a voltage reference circuit. In accordance with known techniques, the calibration occurs during a particular manufacturing step or, after the manufacturing process, in a testing step. The calibration consists in modifying both or one of the factors K1 and K2. The Applicants note that this type of calibration increases the costs of the manufacturing process and does not take into account the performance losses occurring during the circuit life.
Document U.S. Pat. No. 7,433,790 describes a circuit provided with a logic block performing a test algorithm to control trimming of a reference value generating circuit and a temperature measurement system.
Document U.S. Pat. No. 5,440,305 discloses an apparatus for calibration of errors in a monolithic reference including a band-gap voltage reference. Moreover, this document describes a calibration operation in which a temperature measuring system and a burn-in oven are employed and a calculation to determine compensation factors is performed.
According to an embodiment, a voltage reference generation circuit comprises:
a voltage generator integrated in a semiconductor chip and structured to generate an output voltage in accordance with a calibration parameter;
a heater operable to heat said voltage generator;
a control device configured to receive said output voltage, activate said heater and provide said calibration parameter to the voltage generator.
According to another aspect, a calibration method comprises:
providing a voltage reference generator integrated in a semiconductor chip and structured to generate output voltages in accordance with corresponding calibration parameters;
providing a heater integrated in the semiconductor chip and configured to adjust operating temperature of at least part of the voltage generator;
evaluating a first voltage value assumed by the output voltage generated at a first temperature and at a first calibration parameter;
evaluating a second voltage value of the output voltage generated at a second temperature and at the first calibration parameter;
comparing said first and second voltages to evaluate if the first calibration parameter satisfies a calibration criteria.
A further embodiment includes an electronic system comprising an electronic device and a voltage reference generator circuit.
Further characteristics and advantages will be more apparent from the following description of a preferred embodiment and of its alternatives given as a way of an example with reference to the enclosed drawings in which:
An example of the band-gap voltage reference circuit 50 is schematically illustrated in
The operational amplifier 51 comprises, further to the positive input +, a negative input − and an output 54 representing a positive terminal for a generated output voltage Vout. The operational amplifier 51 keeps substantially equal the voltages at a first node A and a second node B, respectively connected to the negative and positive inputs of the operational amplifier 51. Multiplier 52 includes a first resistor R1, a second resistor R2 and a third resistor R3. At least one of the resistors R1-R3 of the multiplier 52 can be trimmed or adjusted in accordance with a digital signal provided by the control device 60.
First resistor R1 is connected between the output 54 of the operational amplifier 51 and the first node A, while second resistor R2 is connected between the output 54 and the second node B. Third resistor R3 is connected between the first node A and the terminal 53 of the multiplier 52. At least one of the resistors R1-R3 included in multiplier 52 can comprise resistance elements (not shown) connected in a cascade configuration and provided with respective short-circuit switches (e.g., further transistors) so as to allow adjusting of their resistance values. The short-circuit switches can be activated or deactivated by corresponding digital signals provided by the control device 60 and forming a digital word setting the behavior of multiplier 52. Alternatively or in addition to resistance elements, multiplier 50 can comprise capacitance elements.
The band-gap voltage reference circuit 50 operates by balancing a negative temperature coefficient of a pn junction with a positive temperature coefficient of the thermal voltage, Vth=kBT/q, where kB is the Boltzmann's constant and q the electron's charge. In operation, the plurality of n first transistors T1 connected in parallel shows a base-emitter voltage V′BE and the second transistor T2 shows a corresponding base-emitter voltage VBE, different from V′BE. Considering that the voltage at the first node A is equal to the one at the second node B, on the third resistor R3 a voltage ΔVBE=VBE−V′BE is applied.
The values of the resistances of the first resistor R1, the second resistor R2 and the third resistor R3 can be chosen so as to obtain a same value of an electrical current circulating in the first resistor R1 and in the second resistor R2. However, said resistance values can be chosen to obtain any specific ratio between the electrical current circulating in the second resistor R2 and the one circulating in the first resistor. The resistance values of the first resistor R1, the second resistor R2 and the third resistor R3 set multiplier factors characterizing the function of the multiplier 52.
The behavior of output voltage Vout can be expressed by the following relation:
Vout=M1VBE+M2ΔVBE
wherein:
M1 and M2 are adjustable multiplier factors due to the action of the multiplier 52.
The adjustable multiplier factors M1 and M2 can be expressed as:
M1=(m1+K1A1),
M2=+(m2+K2A2)
wherein
m1, m2 (real numbers) are fixed components of the multiplier factors associated with the multiplier 52;
K1, K2 (integer numbers expressed by n bits) are calibration parameters which define a calibration word;
A1, A2 (real numbers) represent amplitudes of the calibration effect.
Therefore, K1 A1 and K2 A2 represent variable components of the multiplier factors M1 and M2 which can be adjusted by modifying two digital words provided by the control device 60 so as to adjust the resistances associated to one or more of the resistors included in the multiplier 52.
It has to be observed that alternatively to the band-gap voltage reference circuit 50 illustrated in
With further reference to
As an example, the integrated heating resistors, such as the illustrated resistor 71, can be obtained by a diffusion process in an area 103 of the chip 102 surrounding the region in which the band-gap voltage reference circuit 50 is integrated. Alternatively, the integrated heating resistors, such as the illustrated resistor 79, of the heater 70 can be manufactured by metal layers, such as the illustrated metal layer 81, laying in a metal level of the semiconductor chip in which the band-gap voltage reference circuit 50 is integrated. According to the example depicted in
The sample and hold device 65 is configured to receive a voltage signal generated by the band-gap voltage reference circuit 50 and sampling it so as to obtain corresponding samples to be sent to the control logic 63. The sample and hold device 65 can be realized in a known manner by using analogical components such as comparators and capacitors.
With reference to the calibration process, the control device 60, actives the heater 70 to heat the band-gap voltage reference circuit 50 and receives samples corresponding to the generated voltages at different temperatures. On the basis of said samples, the control device 60 valuates the calibration word K1, K2 according to a calibration criteria and sets accordingly the multiplier factors of multiplier 52.
Referring now to
In a heating step 603, the control logic 63 activates the heater 70 and the band-gap voltage reference circuit 50 assumes a second temperature value T2, included in an operation range of the band-gap voltage reference circuit 50. As an example, the second temperature values T2 is 20-30° C. greater than the first temperature value T1. Throughout the first heating step 603, the calibration word K1, K2 is maintained equal to the first trimming word K1-0, K2-0. The band-gap voltage reference circuit 50 generates a second voltage signal V1 which is sampled by the sample and hold device 65. At least a sample corresponding to the second voltage signal V1 is then provided to the control logic 63.
In a comparing step 604, the control logic 63 compares the samples corresponding to the first voltage signal V0 and the second voltage signal V1. If the absolute difference δ=|V0−V1| is lower than a threshold value δth—as an example, the threshold value is 1 mV—the first trimming word K1-0, K2-0 is chosen as calibration word (YES branch) and is stored in the register 64 (word storing step 605). The chosen calibration word will be used to set the multiplier factors M1 and M2 of the multiplier 52 throughout normal operation of the voltage reference generation circuit 100. The control logic 63 deactivates the heater 70 (heating deactivation step 606) and the generation circuit 100 can be employed as needed in the system 500 (
If in the comparing step 604 it is noticed that the absolute difference δ is greater than the threshold value (NO branch), the control logic 63 generates another trimming word K1-1, K2-1 (new word generation step 608) which is provided to the multiplier 52 during another calibration cycle in which activation step 602, heating step 603 and comparison step 604 are repeated. Before evaluating the voltage generated at the first temperature T1 for the other trimming word K1-1, K2-1, the heater 70 is deactivated in a deactivation step 609.
The iterative calibration process 600 terminates when a trimming word ensuring an absolute difference δ of the voltages at the two temperatures lower than the threshold value is found.
With reference to the criteria used in the calibration process 600,
The Applicants have observed that choosing a trimming word which minimizes the above defined difference δ allows to state that the band-gap voltage reference circuit 50 will work on the suitable voltage-temperature curve and therefore said circuit is corrected calibrated. Indeed, considering a voltage Vout satisfying the following conditions of the Rolle Theorem:
Vout:[T1,T2]→R
Vout shows a continuous behavior;
Vout is derivable in the range [T1, T2];
Vout(T1)=Vout(T2);
it can be stated that there is a value TM of temperature T included in the range [T1, T2] for which the voltage Vout shows a maximum or a minimum, the derivative on Vout is null: Vα(TM)=0. Therefore, by choosing the temperature values T1 and T2 sufficiently distant (e.g., temperature difference of 20-30° C.) and included in range of operation of the band-gap voltage reference circuit 50, the vertex of the curve voltage-temperature is included in such temperature range and said circuit 50 is calibrated.
The comparator 80 can be realized in a traditional manner by using analogical components and is activated by the control logic 63 during the comparison process to compare the voltage signal provided by the voltage generator circuit 50 with the one provided on a bus 91 by the comparison voltage generator 90. The comparator 80 is configured to send on a line 81 towards the control logic 63 a comparison signal representing the comparison results, such as the above voltage difference δ.
The calibration process performed by the voltage reference generation circuit 100 shown in
As an example, the voltage reference generation circuit 100 of
The voltage reference generation circuit 100 can be calibrated at any switching on of the system 500 so as the calibration process 600 allows to compensate the voltage generation dependence on the temperature also taking into account the characteristic and performance variations occurring in the voltage generator circuit 50 during its life.
The various embodiments described above can be combined to provide further embodiments. All of the U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications referred to in this specification and/or listed in the Application Data Sheetare incorporated herein by reference, in their entirety. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.
These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
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