1. Field of the Invention
The present invention relates generally to adjustable resistors and, more particularly, to polysilicon resistors that can be electrically adjusted to a precise resistance value.
2. Description of Related Art
Resistors with precise resistance values are useful for a variety of applications.
In practice, however, it is difficult to manufacture a polysilicon resistor with a precise resistance value. Polysilicon resistors are simple and inexpensive to fabricate, but their resistance values can change with applied voltage and temperature. Polysilicon resistors generally have resistance tolerances ranging from 15 to 20%. When the resistor ratios in the differential amplifier discussed above are not equal to each other, a common mode error (CME) will result. The magnitude of the CME is a measure of the inability of a differential amplifier to block common-mode components of a signal while amplifying the differential signal. CME is an important parameter in applications where the signal of interest is superimposed on a voltage offset or when relevant information is contained in the voltage difference between two signals.
Precise resistance values are important in other applications as well, including precision measurement devices, such as the ones described in the commonly-owned patents, U.S. Pat. No. 6,828,775, issued Dec. 7, 2004, entitled “HIGH-IMPEDANCE MODE FOR PRECISION MEASUREMENT UNIT,” and U.S. Pat. No. 7,154,260, issued Dec. 26, 2006, entitled “PRECISION MEASUREMENT UNIT HAVING VOLTAGE AND/OR CURRENT CLAMP POWER DOWN UPON SETTING REVERSAL,” which are incorporated herein, in their entireties, by reference. The precision measurement units described in these patents generally relate to the field of automatic test equipment for semiconductor devices. Precision resistors are helpful in obtaining the precision measurements required in the automatic test equipment.
Various methods have been used in the prior art to achieve precise resistance values. One method is to use an adjustable component such as a potentiometer, which is a type of variable resistor. A designer would use a potentiometer during testing until the desired function of the circuit had been reached. When used in a differential amplifier as shown in
Another method of obtaining a precise resistance value for thin-film metal resistors is through laser trimming. Laser trimming is the controlled alteration of a capacitor or resistor geometry by laser ablation. For a thin-film metal resistor, resistance is determined by the resistor's composition and physical dimensions. Laser trimming alters the shape of the resistor, which in turn alters the resistance. For example, a lateral cut in the resistor material by the laser narrows the current flow path and increases the resistance value. One advantage of laser trimming is the permanence of the process. In most cases, automated laser trimming only requires a one-time adjustment, so the process is less susceptible to error and re-work. Other advantages include high precision and reliability. Laser trimming, however, has some disadvantages as well. The cost of buying and operating laser trimming systems can be extremely high, and the process itself can be time-consuming. Laser trimming is also not useful for polysilicon resistors.
Thus, there exists a need for a polysilicon resistor that can be adjusted to a precise value in a cost-effective manner.
An electrically adjustable resistor is created from a polysilicon resistive layer by taking advantage of a property of polysilicon by which the resistance changes as a function of an applied voltage. All polysilicon exhibits a voltage coefficient of resistance (VCR) that describes the small change in resistance that occurs as a result of applied voltage. A typical polysilicon resistor exhibits a VCR in the neighborhood of 1×10−4 parts per million per volt (ppm/V), which is very small and does not allow for significant tuning of the resistance. However, in accordance with the present invention, a polysilicon resistor can be deposited onto a thin dielectric layer separating the polysilicon resistor from a doped substrate acting as an adjustment layer. When a voltage is applied to the adjustment layer, the VCR of the polysilicon resistor is enhanced by over an order of magnitude, and adjustments to the voltage applied to the adjustment layer will cause the resistance of the polysilicon layer to vary with sufficient magnitude to make the device useful as an electronically tunable variable resistor.
In an embodiment of a variable resistor in accordance with the present invention, a substrate is doped with ions to create an adjustment region. A thin dielectric is deposited over the adjustment region, and two metal contacts are forced through the dielectric to make electrical contact with the adjustment region near its edges. A polysilicon layer is then deposited on top of the dielectric layer, above the adjustment region and between the metal contacts. A voltage source is connected between the metal contacts such that a voltage can be applied across the adjustment layer. The polysilicon layer can be connected to an electrical circuit to act as a resistor. When the voltage source connected between the metal contacts is varied, changing the voltage applied across the adjustment region, the resistance of the polysilicon layer changes. The precise value of the resistance of the polysilicon layer can thus be actively controlled by controlling the voltage applied across the adjustment region.
In one embodiment of a variable resistor, the voltage source connected to the adjustment layer comprises a digital-to-analog converter (DAC) that can be digitally programmed to output a precise analog voltage. A DAC may be connected to each of the two metal contacts connected to the adjustment region in order to control the voltage applied to the adjustment region. Many DACs include both a standard output and a complementary output that are both controlled by the same digital control word. In this case, a single DAC can be used, the standard output connected to one of the metal contacts connected to the adjustment region, and the complementary output connected to the other.
For high-precision applications, it may be desirable to operate the DAC or other voltage source in such a way that the voltage applied across the polysilicon resistive layer by the circuit is tracked by the voltage applied by the DAC to the adjustment layer. In other words, the DAC may be operated to maintain a substantially constant offset voltage between the voltage applied to the adjustment layer and the voltage the circuit applies to the polysilicon resistor.
The substrate may comprise an n-type silicon material or a p-type silicon material, or any other substrate used in the manufacture of electronic circuits. If an n-type substrate is used, the adjustment layer will be doped with ions to create a p-type well. If a p-type substrate is used, the adjustment layer will be doped with ions to create an n-type well.
An embodiment of an electrically adjustable resistor in accordance with the present invention will generally include a dielectric layer that is between approximately 50 Angstroms and 5000 Angstroms thick, with thinner dielectric layers tending to cause a larger VCR in the adjustable polysilicon resistor. The thickness of the polysilicon resistive layer will typically be between 0.1 and 0.4 micrometers, with thinner layers resulting in higher resistance and a larger VCR. The resistance of the polysilicon layer is typically between 50 and 5000 Ohms per square.
In another embodiment of an electrically adjustable resistor in accordance with the present invention, the adjustability of the polysilicon resistor is increased by including a second dielectric layer and a second adjustment layer on top of the polysilicon resistive layer. In this embodiment, the polysilicon resistor is sandwiched between two layers of dielectric with a first adjustment region below and a second adjustment layer above the resistor, enhancing the VCR. The second dielectric layer is deposited on top of the polysilicon resistive layer and may extend beyond and wrap around the polysilicon layer. Metal contacts are forced through the second dielectric layer to make electrical contact with the polysilicon resistive layer so that it can be connected to an electrical circuit. The second adjustment layer is deposited on top of the second dielectric layer, above the polysilicon layer and between the metal contacts contacting the polysilicon resistive layer. A second voltage source is connected between one edge of the second adjustment layer and its other edge in order to apply a second voltage to the second adjustment layer. Operated independently, the first voltage source and the second voltage source are used to adjust the resistance of the polysilicon adjustment layer.
As in the first embodiment discussed above, the second voltage source may comprise a DAC having a standard output and a complementary output connected to corresponding edges of the second adjustment region. The second adjustment region may comprise n-type doped silicon or p-type doped silicon, or any other kind of doped semiconductor used in the manufacture of electronic circuits.
In still another embodiment of an electrically adjustable resistor, a pair of resistors is created by depositing two polysilicon layers onto a dielectric layer. In this embodiment, a substrate is doped with ions to create an extended adjustment region large enough that two or more polysilicon resistors can be placed above it. A dielectric layer is deposited onto the substrate above the extended adjustment region, and metal contacts are forced through the dielectric to make contact with the adjustment region. A first polysilicon structure and a second polysilicon structure are then deposited on top of the dielectric layer such that both polysilicon resistors are situated above the adjustment region but separated from each other. A voltage source is connected to the metal contacts making contact with the adjustment layer such that a voltage may be applied across the adjustment layer. When the voltage across the adjustment layer is varied, the resistances of the two polysilicon resistors change. Because the resistors share a common adjustment layer and are fabricated at the same time by the same process, they tend to be well matched and will vary similarly to one another with the voltage applied to the adjustment region. Thus, such a matched pair would be well suited for use in a differential amplifier circuit, for example, as resistors 16 and 18 of the circuit in
In still another embodiment of an electrically adjustable resistor in accordance with the present invention, a resistor pair including two resistors that are independently adjustable is achieved. Just like in the embodiment described previously, two polysilicon resistors are deposited on a dielectric layer above an extended adjustment region. However, in this case, an additional dielectric layer is deposited over the first polysilicon resistor and the second polysilicon resistor. Metal resistor contacts are forced through the additional dielectric layer to provide electrical contacts for the first and second resistors. A second adjustment layer is then deposited on top of the second dielectric layer above the first polysilicon resistor and a second voltage source is connected across this second adjustment layer. A third adjustment layer is deposited on top of the second dielectric layer above the second polysilicon resistor and a third voltage source is connected across this third adjustment layer. The resistances of the first and second polysilicon resistors are then controlled by a combination of the three voltages applied to the first, second, and third adjustment layers, respectively. The first voltage applied to the first adjustment layer affects the resistance of both the first and second resistor in the same way. The second voltage applied to the second adjustment layer affects only the resistance of the first polysilicon resistor. The third voltage applied to the third adjustment layer affects only the resistance of the second polysilicon resistor. Thus, the pair of electrically adjustable resistors can be controlled independently. More than two resistors can be created in a similar fashion by depositing more than two polysilicon resistive structures on top of the first dielectric and creating corresponding additional adjustment layers on top of each of the polysilicon resistors controlled by corresponding additional voltage sources.
Additional configurations of polysilicon resistive layers dielectrically isolated from and in close proximity to doped adjustment layers are also possible and would fall within the scope and spirit of the present invention. Other advantages and variations of the invention may become clear to those skilled in the art after studying the following detailed description and attached sheets of drawing that will first be described briefly.
The present invention satisfies the need for an improved and cost-effective way of adjusting resistance values in polysilicon resistors.
The resistance of polysilicon resistor layer 30 depends on the layer's length, width, and height, along with the specific polysilicon used to make the layer. Adjustment of the resistance value of the polysilicon resistor layer 30 can be performed by applying a DAC output voltage across the adjustment layer 32 through metal contacts 24 and 26. More specifically, only one DAC voltage source 37 is needed, where the standard DAC output voltage is applied to metal contact 24 while the complement of the DAC output voltage is applied to metal contact 26. The standard DAC output voltage and the complement of the DAC output voltage should track the voltage applied to the polysilicon resistor layer 30 to ensure a constant relative voltage difference between the polysilicon resistor layer 30 and adjustment layer 32.
The electrically adjustable resistor of the present invention takes advantage of a characteristic found in all polysilicon resistors known as the voltage coefficient of resistance (VCR). The VCR represents the unit change in resistance per unit change in voltage expressed as ppm/volt. VCR can be represented as follows:
VCR=(1/R)*(dR/dV)
where R is the resistance and V is the average voltage applied to the resistor, which is the sum of the voltages on each end of the resistor divided by two. Thus, the resistance of polysilicon resistor layer 30 will change as a voltage applied to metal contacts 20 and 22 changes. However, the VCR of polysilicon resistor layer 30 also depends on the relation between polysilicon resistor layer 30 and adjustment layer 32. More specifically, the VCR depends on the following: the material used in the polysilicon resistor layer 30, the material used in the adjustment layer 32, the material used in the dielectric layer 34, and the distance 36 between the polysilicon resistor layer 30 and adjustment layer 32.
A polysilicon resistor typically has a VCR of 1.0×10−4 ppm/v. More lightly doped resistors will have a larger VCR, so for example, an 80 Ω/square resistor has a VCR of about 3.0×10−5 while a 3000 Ω/square resistor of the same oxide thickness has a VCR of about 3.0×10−4. In most polysilicon resistor designs, it is desirable to keep the VCR small to limit the variations in resistance when the voltage changes. The electrically adjustable resistor of the present invention, however, has a VCR of about 4.0×10−3, which is much larger than the VCR in a typical polysilicon resistor. This larger VCR is made possible by a thin dielectric and a high sheet resistance. A larger VCR allows for the adjustment of the resistance of the polysilicon resistor layer 30 by the application of a voltage to the adjustment layer 32.
The dimensions and materials used to make the electrically adjustable resistor are as follows: the height 36 of dielectric layer 34 is preferably between 50 Å and 5,000 Å, and the composition of dielectric layer 34 can include any commonly known dielectric. The height 38 of the polysilicon resistor layer 30 is preferably between 0.1 μm and 0.4 μm, and the sheet resistance of polysilicon resistor layer 30 is preferably between 500 Ω/square to 5,000 Ω/square. The composition of the polysilicon resistor layer 30 can include any commonly known polysilicon that possesses these characteristics.
As in the previous embodiment, the resistance of polysilicon resistor layer 62 depends on the layer's length, width, and height, along with the specific polysilicon used to make the layer. In this embodiment, adjustment of the resistance value of the polysilicon resistor layer 62 can be performed by applying a DAC output voltage through a DAC voltage source 76 across the first adjustment layer 64 through metal contacts 48 and 50 and across the second adjustment layer 60 through metal contacts 40 and 42. Only one DAC voltage source 76 is needed, where the standard DAC output voltage is applied to metal contact 48 while the complement of the DAC output voltage is applied to metal contact 50. Likewise for the second adjustment layer 60, the standard DAC output voltage is applied to metal contact 40 while the complement of the DAC output voltage is applied to metal contact 42. The standard DAC output voltage and the complement of the DAC output voltage from the DAC voltage source 76 should track the voltage applied to the polysilicon resistor layer 62 to ensure a constant relative voltage difference between the polysilicon resistor layer 62 and adjustment layers 60 and 64. Having two adjustment layers allows for more precise adjustment of the resistance.
The dimensions and materials are similar to the dimensions and materials from the previous embodiment. The first height 70 and the second height 72 of dielectric layer 58 are both preferably between 50 Å and 5,000 Å, and the composition of dielectric 58 can include any commonly known dielectric. The height 74 of the polysilicon resistor layer 62 is preferably between 0.1 μm and 0.4 μm, and the sheet resistance of polysilicon resistor layer 62 is preferably between 500 Ω/square to 5,000 Ω/square. The composition of the polysilicon resistor layer 62 can include any commonly known polysilicon that possesses these characteristics.
As in the previous embodiments, the resistance of polysilicon resistor layers 80 and 82 depends on the layers' length, width, and height, along with the specific polysilicon used to make the layers. Adjustment of the resistance value of the polysilicon resistor layers 80 and 82 can be performed by applying a DAC output voltage through a DAC voltage source 106 across the adjustment layer 86 through metal contacts 98 and 100. More specifically, only one DAC voltage source 106 is needed, where the standard DAC output voltage is applied to metal contact 98 while the complement of the DAC output voltage is applied to metal contact 100. The standard DAC output voltage and the complement of the DAC output voltage should track the voltage applied to the polysilicon resistor layers 80 and 82 to ensure a constant relative voltage difference between the polysilicon resistor layers 80 and 82 and adjustment layer 86. The electrically adjustable resistor shown in
The dimensions and materials are similar to the dimensions and materials from the previous embodiments. Height 102 of dielectric layer 84 is preferably between 50 Å and 5,000 Å, and the composition of dielectric layer 84 can include any commonly known dielectric. The heights 104a and 104b of the polysilicon resistor layers 80 and 82 are both preferably between 0.1 μm and 0.4 μm, and the sheet resistance of polysilicon resistor layers 80 and 82 is preferably between 500 Ω/square to 5,000 Ω/square. The composition of the polysilicon resistor layers 80 and 82 can include any commonly known polysilicon that possesses these characteristics.
As in the previous embodiments, the resistance of polysilicon resistor layers 150 and 152 depends on the layers' length, width, and height, along with the specific polysilicon used to make the layers. In this embodiment, adjustment of the resistance value of the polysilicon resistor layers 150 and 152 can be performed by applying a DAC output voltage through a DAC voltage source 184 across the first adjustment layer 158 through metal contacts 140 and 142 and across the second and third adjustment layers 150 and 152 through metal contacts 120 and 126. Only one DAC voltage source is needed, where the standard DAC output voltage is applied to one metal contact while the complement of the DAC output voltage is applied to the other metal contact. The standard DAC output voltage and the complement of the DAC output voltage from the DAC voltage source 184 should track the voltage applied to the polysilicon resistor layers 154 and 156 to ensure a constant relative voltage difference between the polysilicon resistor layers 154 and 156 and adjustment layers 158, 150, and 152. As with the electrically adjustable resistor shown in
The dimensions and materials are similar to the dimensions and materials from the previous embodiments. Heights 170 and 174 of dielectric 162 are preferably between 50 Å and 5,000 Å, and the composition of dielectric 162 can include any commonly known dielectric. The heights 172a and 172b of the polysilicon resistor layers 154 and 156 are both preferably between 0.1 μm and 0.4 μm, and the sheet resistance of polysilicon resistor layers 154 and 156 are preferably between 500 Ω/square to 5,000 Ω/square. The composition of the polysilicon resistor layers 154 and 156 can include any commonly known polysilicon that possesses these characteristics.
Having thus described a preferred embodiment of an electrically adjustable resistor, it should be apparent to those skilled in the art that certain advantages of the described method and apparatus have been achieved. It should also be appreciated that various modifications, adaptations, and alternative embodiments thereof may be made within the scope and spirit of the present invention.
This application claims the benefit, pursuant to 35 U.S.C. §119(e), of U.S. provisional application Ser. No. 60/947,372, filed Jun. 29, 2007.
Number | Name | Date | Kind |
---|---|---|---|
5837592 | Chang et al. | Nov 1998 | A |
6087677 | Wu | Jul 2000 | A |
7199016 | Heston et al. | Apr 2007 | B2 |
20060054975 | Chen et al. | Mar 2006 | A1 |
Number | Date | Country | |
---|---|---|---|
20090002120 A1 | Jan 2009 | US |
Number | Date | Country | |
---|---|---|---|
60947372 | Jun 2007 | US |