BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a top down view illustrating a first prior art electrical fuse.
FIG. 2 is a top down view illustrating a second prior art electrical fuse.
FIG. 3 is a top down view illustrating an electrical fuse in accordance with a first embodiment of the invention.
FIG. 4 is a corresponding sectional view illustrating the electrical fuse of FIG. 3.
FIG. 5A is a schematic diagram illustrating a circuit connection of the fuse illustrated in FIGS. 3 and 4.
FIG. 5B is a timing diagram illustrating a voltage used to program or blow a fuse as illustrated in FIGS. 3 and 4.
FIG. 6 is a top down view illustrating an electrical fuse according to a particular embodiment of the invention.
FIG. 7 is a top down view illustrating an electrical fuse according to a variation of the embodiment of the invention illustrated in FIG. 6.
FIG. 8 is a top down view illustrating an electrical fuse according to a further variation of the embodiment of the invention illustrated in FIG. 6.
FIG. 9 is a top down view illustrating an electrical fuse according to a further embodiment of the invention.
FIG. 10 is a top down view illustrating an electrical fuse according to a variation of the embodiment of the invention illustrated in FIG. 9.
DETAILED DESCRIPTION
FIGS. 3 and 4 are a top-down view and a corresponding sectional view of an electrical fuse in accordance with an embodiment of the invention. The fuse illustrated in FIGS. 3 and 4, as well as all other fuses shown and described herein, is provided on a microelectronic element, e.g., a chip which includes integrated active semiconductor devices such as transistors, semiconductor diodes, etc. Alternatively, the fuse can be provided on an integrated passives chip, such as may include a relatively large number of passive devices (for example, resistors, capacitors, inductors and/or such fuses) integrated together on the chip.
FIGS. 3 and 4 illustrate a fuse in the unblown state, prior to having electrically programmed the fuse to a blown state. As illustrated therein, the fuse 100 includes a cathode 130 and an anode 110 conductively connected to the cathode by a fuse link 120 of length 140. When the fuse is programmed, the direction of current flow is from the anode 110 towards the cathode 130, also as illustrated. The width of the cathode 135 is greater than the width 125 of the fuse link. In the exemplary fuse illustrated in FIGS. 3 and 4, the width 125 of the fuse link is preferably less than or equal to about 120 nm.
As illustrated in FIG. 4, the fuse can be implemented with a structure including a multi-layer gate stack. The gate stack includes a layer of doped polysilicon 220 and a layer of silicide 230 overlying the silicide layer. In one embodiment, the doped polysilicon layer 220 is doped p+ and is disposed overlying an isolation region. The isolation region can be, for example, a shallow trench isolation (“STI”) region formed, for example, by etching a trench into a substrate, e.g., a silicon substrate or a silicon-on-insulator (“SOI”) layer of a substrate and then filling the resulting trench with an oxide, such as by a high density plasma (“HDP”) deposition. Alternatively, the isolation region can be formed by forming a field oxide at a major surface of a silicon substrate by local oxidation of silicon (“LOCOS”).
Preferably, as further illustrated in FIG. 4, an optional dielectric cap layer 240 overlies the silicide layer 230, the cap layer preferably including a material such as silicon nitride. Preferably, dielectric spacers 250 are also provided which overlie and extend outward from sidewalls 260 of the silicon layer 220 and silicide layer 230.
An interlevel dielectric (“ILD”) layer 256 is provided, overlying the silicide layer 230 and optional nitride cap layer 240. The ILD layer can have a planarizing function, acting to flatten topography in relation to the topography of the fuse structure 100. For that purpose, a planarizing dielectric such as doped or undoped silicate glass, e.g., borophosphosilicate glass (BPSG), spin-on-glass, or an organic dielectric can be provided. In a preferred embodiment such as illustrated in FIG. 2, the thickness of the silicide layer is preferably about 30 nm. The thickness 222 of the doped polysilicon layer 220 is preferably around 150 nm.
In an exemplary method of fabricating the fuse 100, the isolation region 210 is formed, after which a layer 220 of polysilicon is deposited, followed by a layer of metal, e.g., nickel, titanium, tungsten, titanium-tungsten, platinum, palladium, cobalt, among others or a combination of one or more of such metals, which is capable of forming a silicide with the polysilicon. A dielectric layer, preferably including silicon nitride, is then deposited as a cap layer 240 covering the metal layer. The cap layer is then patterned with the metal layer and polysilicon layer to form a structure having the desired contour and dimensions of the fuse as shown in FIG. 3. Thereafter, one or more dielectric layers are deposited and patterned to form the spacers 250. At some point, the metal layer is converted at least partially to a silicide layer 230 by reacting the metal therein with the polysilicon in layer 220. An interlevel dielectric layer (ILD) 256 is formed to overlie the fuse 100 and contact vias to the fuse are made through openings in the ILD 256.
FIG. 5A is a schematic illustrating connection of the electrical fuse 100 illustrated in FIGS. 3 and 4 within a circuit capable of programming the fuse 100. As illustrated therein, a programming current Ip flows in a direction from a voltage source (Vfsource) through the anode 110 and towards the cathode 130 when a programming transistor 300 is biased properly for conduction by a biasing voltage VGS having an appropriate value. As further illustrated in FIG. 5B, the fuse is programmable by raising the biasing voltage VGS to a proper value VGSP and maintaining it for a sufficient programming time phase tp. In a particular example, the programming time phase tp has a duration of about 200 μs.
A fuse 500 in accordance with a particular embodiment of the invention will now be described with reference to the top-down plan view of FIG. 6. As illustrated therein, in the as yet unblown state the fuse 500 includes a cathode 530 to which a fuse link 520 is conductively connected at a cathode junction 502. At another end of the fuse link 520 opposite from the cathode 530, the fuse link 520 conductively connects to an anode 510 at an anode junction 512. In a direction of a programming current Ip which can be applied to the fuse 500, the cathode has length 535, the fuse link has length 545 and the anode has length 555.
In the fuse 500 illustrated in FIG. 6, the cathode junction 502 is marked by a substantial and abrupt decrease in the width 522 of the fuse link 520 in relation to the width 532 of the cathode. On the other hand, in a direction from the fuse link 520 towards the anode 510, the width 522 of the fuse link increases only gradually.
In the particular structure illustrated in FIG. 6, the fuse link includes a first segment 521 which begins at the cathode junction, extending for a portion of the length 545 of the fuse link. Preferably, the width 522 of the first segment 521 of the fuse link stays constant from one end of the first segment at the cathode junction to the other end where the first segment meets the neck 524. The width of the fuse link then gradually increases from the width 522 of the first segment at a first end 526 of the neck 524 to the width 514 of the anode 510 at the anode junction 512. The neck 524, which can also be referred to as a second segment, has width which preferably increases monotonically from the first end 526 to the anode 510. Moreover, preferably, the peripheral edge of the neck does not make a large angle in relation to a peripheral edge of the anode to which it is joined. Preferably, such angle is less than 45 degrees.
The abrupt decrease in width at the cathode junction of the fuse link relative to the cathode provides an abrupt start location for electromigration during the programming of the fuse. The abrupt start location assures that high current crowding and temperature gradient is present for blowing the fuse. On the other hand, the gradual increase in the width of the fuse link 520 in the direction from the cathode towards the anode 510 provides a gradual stop location for the electromigration of metals during the programming of the fuse. The gradual stop location also assists in keeping the electromigrated material from going into the anode and, hence, assures that most of the fuse link becomes free of metal when blowing the fuse.
FIG. 8 illustrates a fuse 700 in accordance with a variation of the embodiment described with reference to FIGS. 6 and 7. In such variation, peripheral edges 712, 714 of the anode 710 are continuous, i.e., collinear, with corresponding peripheral edges 722, 724, respectively, of the fuse link. Preferably, the peripheral edges 722, 724 of the fuse link 720 are continuous and straight from the abrupt cathode junction 732 with the cathode 730 up to the anode junction 726 with the anode. In this case, the anode junction 726 between the fuse link 720 and the anode 710 is not identified by a particular geometrical feature. Rather, the location of the anode junction 726 is identified by the width 718 that the fuse link reaches at the anode junction 726. The width 718 at the anode junction 726 is at or close to the width 728 of the anode at its largest, final width.
In a particular embodiment as illustrated in FIG. 7, extension portions 633, 634 of the cathode 630 extend beyond the cathode junction 632 in a direction 624 towards the anode 610. Preferably, extension portions 633, 634 extend parallel to the fuse link 620. Preferably, a first portion 633 of the cathode 630 extends adjacent to a first peripheral edge 621 of the fuse link 620 and second portion 634 of the cathode 630 extends adjacent to a second peripheral edge 623 of the fuse link 620, the second peripheral edge 623 being remote from the first peripheral edge, i.e., widthwise across from the first peripheral edge. In the particular example illustrated in FIG. 7, each of the extension portions 633, 634 has a tip 643, 644, respectively. In addition, from the cathode junction 632, the widths of the extension portions decrease monotonically between the cathode junction and the tips.
A fuse structure in accordance with another embodiment of the invention will now be described with reference to FIG. 9. In the particular example illustrated therein, the fuse link portion 820 of a fuse 800 has width which increases stepwise between a first segment 851 having an initial width 822 and the anode 810 having a final width 812. The first segment has an initial width 822 which is a substantial and abrupt decrease in width from the width 831 of the cathode 830.
As further illustrated in FIG. 9, the width 822 of the fuse link 820 increases by a first step increase at a junction 824 between a first segment 851 of the fuse link and a second segment 852. The junction 824 occurs at a first location which preferably has a distance 840 from the anode junction 844 which is greater than half the length of the fuse link 820, i.e., greater than half the distance between the cathode junction 821 and the anode junction 844. Then, again the width 832 of the fuse link 820 increases by a second step increase at a junction 834 between the second segment 852 and a third segment 853. Finally, the width 842 of the fuse link 820 increases by a third step increase at the anode junction 844 between the third segment 853 and the anode 810. Preferably, the first segment 851 has constant width 822, the second segment 852 has a constant but different width 832 and the third segment 853 has another constant but different width 842. In a particular embodiment, segments of the fuse link, e.g., the second segment and the third segment, each have length greater than about 10% of the length of the fuse link.
FIG. 10 illustrates a further variation in which the cathode 930 includes extension portions 933, 934 as shown and described above with respect to FIG. 7, and the width of the fuse link 920 increases stepwise between the cathode and the anode 910 as shown and described above with respect to FIG. 9.
The particular fuse geometries shown and described above with respect to FIG. 3 and FIGS. 6 through 10 can be utilized with fuses having different material compositions than the polysilicon and silicon structure shown in FIG. 4. In one variation, the polysilicon layer 220 can be omitted and the fuse can consist essentially of silicide material. In a second variation, the polysilicon layer 220 can be omitted and the fuse can include the silicide layer 230 and another layer overlying or underlying the silicide layer, such other layer consisting essentially of one or more metals and/or one or more conductive compounds of metals. In such second variation, such layer can include, for example, one or more of tantalum nitride (TaN), titanium nitride (TiN) or tungsten (W). In a third variation, both the polysilicon layer 220 and the silicide layer 230 are omitted and the fuse can include a layer consisting essentially of one or more metals and/or one or more conductive compounds of metals, such as, by way of example, TaN, TiN or W.
While the invention has been described in accordance with certain preferred embodiments thereof, those skilled in the art will understand the many modifications and enhancements which can be made thereto without departing from the true scope and spirit of the invention, which is limited only by the claims appended below.
Patent Application
20070284693
