The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
Embodiments of the present invention will be described hereinafter with reference to accompanying drawings. Note that in descriptions of the embodiments and modifications described hereinafter, the same reference numerals are used for the same components and descriptions thereof are omitted or simplified.
In a case where a gray-scale level of an image signal in a preceding frame is “0” and a gray-scale level of an image signal in a succeeding frame is “64”, a response time of liquid crystal is 81 msec. Similarly, in a case where the gray-scale level of the image signal in the preceding frame is “0” and the gray-scale level of the image signal in the succeeding frame is “128”, “192”, or “255”, the response time of liquid crystal is 59 msec, 44 msec, or 24 msec, respectively. Similarly, as shown in
As is apparent from
According to the embodiments of the invention, in a case where a gray-scale level is changed to a halftone, a response speed of liquid crystal is improved by performing pulse-surface-area modulation using divided pixels without performing overdrive processing. Furthermore, according to the embodiments of the invention, a motion picture is improved in visual quality without a decrease in an aperture ratio by performing pulse-surface-area modulation so that the response speed of the liquid crystal is improved and by performing black data insertion processing.
Embodiment of the invention will now be described.
The electro-optical device 1 employs an MVA (multi domain vertical alignment) method and utilizes liquid crystal having negative anisotropy of dielectric constant (Δε<0).
As shown in
Here, a configuration of the pixel unit A will be described in detail. Note that each of the pixels according to the embodiment of the invention includes at least two adjacent subpixels as a group. Description will be made hereinafter for each of the pixels including two subpixels, that is, a first subpixel 20 and a second subpixel 30.
The first subpixel 20 includes, as shown in
The first switching device 24 is connected to the pixel electrode 21 through a first terminal (a source terminal or a drain terminal), is connected to one of the scanning lines Y through a second terminal (a gate terminal), and is connected to one of the data lines X through a third terminal (a drain terminal or a source terminal).
The second subpixel 30 includes, as shown in
The second switching device 34 is connected to the pixel electrode 31 through a first terminal (a source terminal or a drain terminal), is connected to one of the control lines W through a second terminal (a gate terminal), and is connected to the first terminal of the first switching device 24 through a third terminal (a drain terminal or a source terminal) similarly to the third terminal of the first switching device 24.
Arrangement of the subpixels in each of the pixels in the pixel unit A will now be described.
As shown in
According to the arrangement of the pixels, since, in each of the pixels, the first subpixel 20 and the second subpixel 30 are connected to each other in the horizontal direction, generation of flicker can be prevented.
As shown in
According to the arrangement of the pixels, since, for each of the pixels, the first subpixel 20 and the second subpixel 30 are connected to each other in the vertical direction, generation of flicker can be prevented. Furthermore, since a space necessary for arranging switching devices can be easily provided, a decrease in an aperture ratio which occurs due to an increase in the number of switching devices can be prevented.
The scanning line driving circuit 10 sequentially supplies selection signals to the scanning lines Y so that, in each of the pixels, the first switching device 24 is brought into a conduction state.
The common electrode driving circuit 11 supplies a first voltage and a second voltage having a potential higher than the first voltage to the common electrode 40 alternately every one horizontal scanning period. Furthermore, the common electrode driving circuit 11 inverts a voltage (Vcom) to be applied to the common electrode 40 every one horizontal scanning period. Accordingly, the liquid crystal is driven by an alternating current, and as a result, deterioration thereof can be prevented.
The data line driving circuit 12 supplies pieces of image data to the data lines X and writes, for each of the pixels, an image voltage generated in accordance with one of the pieces of image data to the pixel electrode 21 through the first switching device 24 which is in an on-state. Furthermore, the data line driving circuit 12 writes an image voltage generated in accordance with one of the pieces of image data to the pixel electrode 31 when the second switching device 34 is in an on-state.
Here, the data line driving circuit 12 performs positive-polarity writing in which pieces of image data which have potentials higher than that of the common electrode 40 are supplied to the data lines X and image voltages generated on the basis of the image signals having the positive polarities are written to the pixel electrodes 21 and 31, and performs negative-polarity writing in which pieces of image data which have potentials lower than that of the common electrode 40 are supplied to the data lines X and image voltages generated on the basis of the image signals having the negative polarities are written to the pixel electrodes 21 and 31. The positive-polarity writing and the negative-polarity writing are alternately performed every horizontal scanning line.
The signal supplying unit 13 supplies a certain signal to each of the control lines W connected to the corresponding second switching device 34 so that the second switching device 34 is turned on or off.
The control circuit 14 performs processing of insertion of a black screen, that is, black data insertion processing for all the pixels in a vertical retrace period so that blur of a motion picture is prevented. Note that the control circuit 14 functions as a timing controller, and generates predetermined timing signals and supplies the timing signals to the scanning line driving circuit 10, the common electrode driving circuit 11, and the data line driving circuit 12.
Here, the necessity of the black data insertion processing will be described. In a liquid crystal display device, an image displayed in a frame is retained by the time immediately before the frame is changed to the next frame. This is called a hold type display method. Therefore, from the nature of the human eyes, a residual image is generated when a motion picture is displayed resulting in an unclear displayed image (hereinafter referred to as blur of a motion picture). Note that, in a CRT (cathode ray tube) and a PDP (plasma display panel), since an impulse type display method in which an image is displayed using a light pulse is employed, such blur of a motion picture is not generated.
To reduce such blur of a motion picture, the control circuit 14 inserts a black screen every one frame in a vertical retrace period.
Specifically, as shown in
The electro-optical device 1 may be configured such that a circuit other than the data line driving circuit 12 is provided to generate signals to be supplied to the data lines X in a vertical retrace period so that the pixel electrode 21 and the pixel electrode 31 have potentials the same as that of the common electrode 40. In this case, the circuit is arranged opposite the data line driving circuit 12 through the pixel unit A. Furthermore, a switch unit is interposed between the circuit and the data line driving circuit 12. The switch unit is turned on in accordance with control of the control circuit 14, and predetermined voltages are supplied from the switch unit through the data lines X. For each of the pixels, predetermined voltages are supplied to the pixel electrode 21 and the pixel electrode 31 through the corresponding one of the data lines X.
The gray-scale-level detection unit 15 detects gray-scale levels of input image signals and supplies results of the detection to the determination unit 16. Note that in this embodiment, although the gray-scale-level detection unit 15 detects gray-scale levels of the image signals in 256 gray-scale levels, the present invention is not limited to this.
The determination unit 16 determines, for each of the gray-scale levels of the image signals supplied from the gray-scale-level detection unit 15, whether the gray-scale level is within a predetermined range (for example, a range from 64 to 128) considered to be a halftone. In a case where the determination is affirmative, the control circuit 14 controls the signal supplying unit 13 so that display using pulse-surface-area modulation is performed.
Specifically, when the first switching device 24 is turned on, the signal supplying unit 13 supplies certain signals to the control lines W, and for each of the pixels, turns off the second switching device 34 in accordance with control of the control circuit 14.
Accordingly, since the first switching device 24 is in an on-state, the first subpixel 20 performs display in accordance with a corresponding one of the certain voltages supplied to the data lines X. Furthermore, since the second switching device 34 is in an off-state, the second subpixel 30 retains a certain gray-scale level representing black which has been written in the vertical retrace period resulting in black display. By this, the first subpixel 20 performs high-gray-scale-level display and the second subpixel 30 performs low-gray-scale-level display whereby pulse-surface-area modulation is performed. Accordingly, halftone display is entirely achieved in each of the pixels.
For example, if a gray-scale level detected using the gray-scale-level detection unit 15 is “64”, an image signal is modulated so that the first subpixel 20 performs display with a gray-scale level of “192” and the second subpixel 30 performs display with a gray-scale level of “0” whereby pulse-surface-area modulation is performed. As described above, since the pulse-surface-area modulation is performed, response speed is improved while the entire pixel performs display with a gray-scale level of “64”. In this example, the response speed is 44 msec which realizes faster halftone display by 37 msec than the normal response speed (81 msec). According to the embodiment of the invention, halftone display is performed using pulse-surface-area modulation, and therefore response speed is improved.
In a case where the determination unit 16 determines that a gray-scale level is out of the range considered to be a halftone (for example, 0 to 63 and 129 to 255), the control circuit 14 does not perform pulse-surface-area modulation but controls the data line driving circuit 12. Specifically, the control circuit 14 controls the data line driving circuit 12 to turn on the first switching device 24 and the second switching device 34 or to turn off the first switching device 24 and the second switching device 34 so that the first subpixel 20 and the second subpixel 30 perform the same gray-scale-level display.
Accordingly, the electro-optical device 1 of this embodiment performs black data insertion processing for all the pixels in a vertical retrace period and entirely performs gray-scale display in each of the pixels utilizing the first subpixel 20 and the second subpixel 30. Accordingly, blur of a motion picture is suppressed (a motion picture is improved in visual quality) by the black data insertion processing while using the minimum number of switching devices in the pixel unit A. Consequently, halftone display can be performed without performing overdrive processing.
According to the embodiment of the invention, since a memory necessary for the overdrive processing can be eliminated, a size of the entire device and production cost thereof can be reduced, and a response speed of the liquid crystal can be improved. Furthermore, the amount of electric power required for the overdrive processing can be reduced.
Note that the first subpixel 20 and the second subpixel 30 may be configured in a different area ratio.
In the above-described first and second embodiments, although each of the pixels is constituted by two subpixels, the present invention is not limited to this. Alternatively, each of the pixels may be constituted by three or more subpixels. Furthermore, image signals may be supplied to subpixels at the same time or at different times. Moreover, in the above-described first and second embodiments, although an MVA method is employed as an example of a method for driving the liquid crystal, an ECB (electrically controlled birefringence) method may be employed.
An electronic apparatus to which the electro-optical device 1 according to the above-described embodiments is applied will be described.
Examples of such an electronic apparatus to which the electro-optical device 1 is applicable include, in addition to the apparatus shown in
The entire disclosure of Japanese Patent Application No. 2006-258774, filed Sep. 25, 2006 is expressly incorporated by reference herein.
Number | Date | Country | Kind |
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2006-258774 | Sep 2006 | JP | national |