Patent Application
20070004064
1. Field of the Invention
The invention concerns an electroluminescent device and more particularly an electroluminescent device fabricated from porous silicon material.
2. Discussion of Prior Art
Light emitting devices may emit light by a variety of processes. A conventional tungsten wire light bulb emits visible light when an element in the light bulb reaches a certain temperature. The emission of visible light from a substance at high temperature is termed incandescence. Luminescence is a phenomenon distinct from incandescence and is produced when electrons lose energy radiatively when moving from an excited energy state to a lower energy state which may be their ground state. Photoluminescence is luminescence from electrons which are excited into a high energy level by the absorption of photons. Photoluminescent porous silicon is described in U.S. Pat. No. 5,348,618. Electroluminescence is luminescence from electrons which are excited to higher energy levels by an electric field or an electric current. An example of electroluminescent porous silicon is described in United Kingdom Patent No. GB 2268333 B.
Light emitting diodes are an important class of electroluminescent devices. Light emitting diodes are commonly fabricated from semiconducting materials in the Ga1-xAlxAs, Ga1-xInxAs1-yPy, and GaAs1-xPx systems. A measure of the efficiency of a light emitting diode is its external quantum efficiency, which is defined as the number of photons emitted by the diode divided by the number of electrons entering the diode. Devices fabricated from these materials may have external quantum efficiencies greater than 10%. Electroluminescent devices fabricated from GaAs compounds suffer from the disadvantage that they are difficult to integrate monolithically with silicon based integrated circuit technologies. It has for many years been an important objective of workers skilled in the field of semiconductor technology to be able to produce an electroluminescent device which is compatible with silicon based integrated circuit technologies.
A world-wide interest in the possible use of porous silicon as a luminescent material in an electroluminescent device was generated by a paper by L. T. Canham in Applied Physics Letters, Volume 57, Number 10, 1990, pp 1046-1048. This paper reported efficient visible photoluminescence from quantum wires in porous silicon at room temperature. A silicon quantum wire may be defined as a physically continuous column of silicon of width not greater than 10 nm, having a length which is not less than twice its width, and whose boundaries are surrounded by a suitable passivation layer. A porous silicon electroluminescent device offers the advantage of potential compatibility with conventional silicon integrated circuit fabrication techniques for use in applications such as optical displays and optoelectronic integrated circuits.
As mentioned above, electroluminescent porous silicon is described in United Kingdom Patent No. GB 2268333 B. The world-wide interest in electroluminescent porous silicon has been evidenced by a large number of published scientific papers which describe electroluminescent devices incorporating porous silicon. However, the luminescence efficiencies reported for these devices have been disappointingly low. V. P. Kesan et al. in Journal of Vacuum Science and Technology A, Volume 11, Number 4, 1993, pp 1736-1738 have reported a p-n junction porous silicon electroluminescent device having an efficiency in the range 0.04% to 0.1%. The Kesan et al. device however has a threshold current density of 30 000 Am−2 before electroluminescence is observable. Such a high threshold value would seem to be incompatible with the stated efficiency values. Also, there is no indication in the paper of Kesan et al. as to whether the quoted efficiency measurement is an external quantum efficiency figure or some other efficiency, such as internal quantum efficiency. If the quoted efficiency figure is an internal quantum efficiency, the external quantum efficiency figure would be significantly lower, perhaps of the order of a factor 10 lower.
F. Koziowski et al. in Sensors and Actuators A, Volume A43, No. 1-3, 1994, pp 153-156 report a light emitting device in porous silicon having a quantum efficiency of 0.01%. This paper however only provides details of the electrical characteristics of luminescent devices having quantum efficiencies in the range 10−3 to 10−4%.
L. V. Belyakov et al. in Semiconductors, Volume 27, No. 11-12, 1993, pp 999-1001 have reported luminescence efficiencies of up to 0.3% for cathodically biased electroluminescent porous silicon devices incorporating a liquid electrolyte. They reported the observation of electroluminescence at a current density of 200 Am−2. A device incorporating a liquid electrolyte would be difficult to integrate with a conventional silicon based microcircuit.
W. Lang et al. in Journal of Luminescence, Volume 57, 1993, pp 169-173 describe an electroluminescent device which has a thin gold top electrode. Lang et al. observes electroluminescence above a current threshold of 1.1 Am−2 and measured an external quantum efficiency of 0.01%. They estimate that their device had an internal efficiency which was greater than 0.1%. An external efficiency value is a measure of the efficiency of generating photons external to a device and is distinct from internal efficiency values which are measures of the efficiency of generating photons within the device. The internal efficiency value will be higher than the external efficiency value because of internal absorption and scattering mechanisms.
Virtually all scientific papers published on porous silicon light emitting diodes have been concerned with device performance during operation in ambient air. An exception to this is a paper by Badoz et al. published in Proceedings 7th International Symposium on Silicon Materials Science and Technology, Electrochemical Society Inc. Pennington, New Jersey, Proc. Volume 94-10, pages 569-574D, 1994. They demonstrate that the stability of inefficient (external quantum efficiency 10−4%) porous silicon light emitting diodes is dramatically improved when operated in dry nitrogen gas rather than ambient air. They suggest that degradation arises from electrically enhanced oxidation of the silicon skeleton.
Scientific papers have been published which suggest that when p-type silicon is anodized n-type porous silicon is produced. N. J. Pulsford et al. in Journal of Luminescence, Volume 57, 1993, pp 181-184 reported the anodization of 25 Ωcm p-type silicon substrates to produce photoluminescent porous silicon. From measurements of the electrical characteristics of the porous silicon, they came to the conclusion that their results were consistent with the porous silicon being n-type. Amisola et al. in Applied Physics Letters, Volume 61, Number 21, 1992, pp 2595-2597 reported scanning tunnelling microscopy measurements of porous silicon produced from p-type silicon which showed that at least the surface of the porous silicon behaved like n-type material.
Measurements of the spreading resistance of a layer of porous silicon having a porosity of 30% produced from heavily doped p-type silicon, using a method described in U.S. Pat. No. 5,348,618, show that the spreading resistance of the porous silicon increases with increasing depth. This corresponds to an increase in resistivity with increasing depth. This is opposite to the behaviour of porous silicon produced from heavily doped n-type silicon, and is indicative of a n-p junction being formed at the porous silicon-silicon interface. It is concluded that previously published work describing the production of electroluminescent devices by the anodization of p-n silicon structures does not result in a p-n junction being formed within the porous silicon at a position corresponding to the original p-n interface but instead results in a heterojunction between the porous silicon and the bulk silicon.
It is an object of the invention to provide an alternative electroluminescent device.
The present invention provides an electroluminescent device biasable to produce electroluminescence and comprising a porous silicon region and electrical connections to the porous silicon region, characterized in that electroluminescence is detectable when the device is biased such that a current having a current density of less than 1.0 Am−2 flows through the device.
The invention provides the advantage that a low threshold current is required to produce electroluminescence. A low threshold current is advantageous in applications where power conservation is at a premium, for example battery powered electronics.
The devices of the present invention may be fabricated by a method which includes anodizing a silicon wafer after it has received a dopant implant but without the wafer being annealed after the implantation. In general, silicon wafers are annealed after they have received a dopant implantation in order to activate electrically the dopant species and to anneal any damage to the crystal structure caused by the implantation process. Anodizing a wafer after a dopant implantation with no intervening anneal stage would be considered surprising to those familiar with silicon processing techniques.
The device may exhibit electroluminescence when biased such that an electrical current having a current density of less than 0.1 Am−2 flows through the device. Electroluminescence from the device may be visible to an unaided human eye when the current density is less than 0.1 Am−2. Electroluminescence may be detectable when the current density is less than 0.01 Am−2 and as low as 0.0001 Am−2. The external quantum efficiency of the electroluminescence may be greater than 0.1%. External quantum efficiencies as high as 0.4% have been measured for devices operating at 200 K (−73° C.). The combination of high efficiency and low threshold current are particularly advantageous. A device of area 1 mm2 operating under an applied bias current density of 0.0001 Am−2 would require a bias current of only 10−10 amps, or 0.1 nA, to produce detectable luminescence.
In another aspect, the invention provides a solid state electroluminescent device comprising a porous silicon region and electrical connections to the porous silicon region, characterized in that the device is biasable to produce electroluminescence with an external quantum efficiency greater than 0.01%.
A high external quantum efficiency is advantageous since for a given luminescent intensity, the more efficient a device, the less power it requires.
The solid state device of the invention may exhibit electroluminescence with an external quantum efficiency greater than 0.1%. The external quantum efficiency may be in the range 0.01% to 0.18% and may be at least 0.4%.
The solid state device of the invention may comprise a p-type porous silicon region and an n-type porous silicon region with a p-n junction therebetween. As stated previously, there are indications that conventionally produced porous silicon is n-type even if the starting material was p-type silicon. It therefore follows that previous electroluminescent porous silicon devices which allegedly contained a p-n junction within porous silicon may have had some other form of junction either between a top contact and the porous silicon or at the interface between the porous silicon and the unanodized bulk silicon.
At least one of the p-type and n-type porous silicon regions may be surface doped. Surface doped porous silicon is porous silicon which has been doped by dopant species deposited on the surfaces of the silicon structures forming the porous silicon. These dopant species may either remain at the surface or diffuse into the silicon. The p-type porous silicon may be surface doped, and the surface dopant may be boron. The device may electroluminesce with an external quantum efficiency greater than 0.1%.
The device of the invention may incorporate an injector layer for injecting holes into a luminescent region of the porous silicon. This injector layer may be a surface layer of porous silicon. It has been found that the surface region of the porous silicon may have raised levels of oxygen, carbon, and fluorine and so may have a wider band gap than the luminescent region of porous silicon and so would act as an efficient hole injector.
Preferably the device of the invention is produced by light assisted anodization in aqueous hydrofluoric acid. It is known that light assisted anodization in ethanoic hydrofluoric acid generally results in mesoporous porous silicon. Mesoporous porous silicon has pore sizes greater than 20 Å wide and less than 500 Å wide. It is known that light assisted anodization of an n− silicon substrate may also generate some degree of macroporosity. Macroporous porous silicon has pore sizes greater than 500 Å wide. The anodization conditions of the device of the invention avoid the creation of both macroporous and mesoporous porous silicon. The active portion of the device is microporous with pore sizes less than 20 Å wide.
The electroluminescent device may comprise an n-type bulk silicon region, an n-type porous silicon region adjacent the n-type bulk silicon region, a p-type porous silicon region adjacent the n-type porous silicon region, and electrical contacts to the bulk silicon region and the p-type porous silicon region.
The device of the invention may be operable to produce a modulated light output. The light output may be modulatable at a frequency greater than 10 kHz. Modulation of the optical output of the device has been observed at modulation frequencies up to 1 MHz. The device of the invention may have an electroluminescence intensity maximum at a wavelength which is greater than 400 nm and less than 900 nm. The intensity maximum may be at a wavelength in the range 520 nm to 750 nm.
The device of the invention may be an encapsulated device, whereby the porous silicon is protected from the environment since the operating efficiency of an unencapsulated device may degrade upon exposure to water vapour and/or oxygen. The encapsulation may be provided by a vacuum chamber or some other form of encapsulation arrangement such as an impermeable top contact to the porous silicon which may be of indium tin oxide.
The device may be integrated with other silicon devices as part of an opto-electronic integrated circuit. The electroluminescent device of the invention may be combined with further devices of the invention to form a display which may produce a light output having a plurality of colours.
In another aspect, the invention provides a method of fabricating an electroluminescent device including the steps of:
In a further aspect, the invention provides a method of fabricating an electroluminescent device including the steps of:
In a further aspect, the invention provides a method of fabricating an electroluminescent device including the steps of:
In a further aspect, the invention provides a method of fabricating an electroluminescent device including the steps of:
In a further aspect, the invention provides a method of fabricating an electroluminescent device including the steps of:
In a yet further aspect, the invention provides p-type porous silicon, characterized in that the porous silicon has a porosity greater than 30%. The porosity may be greater than 60% and the porous silicon may comprise quantum wires.
The invention further provides substantially wholly microporous visibly luminescent porous silicon, characterized in that the porous silicon is derived from n-type bulk silicon.
In another further aspect, the invention provides an electroluminescent device comprising a porous silicon region and electrical connections to the porous silicon region, characterized in that the porous silicon region contains a p-n junction therein.
The invention further provides an electroluminescent device comprising a porous silicon region and electrical connections to the porous silicon region, characterized in that the porous silicon region is a wholly microporous visibly luminescent region fabricated from n-type bulk silicon.
In order that the invention may be more fully understood, embodiments thereof will now be described, by way of example only, with reference to the accompanying drawings, in which:
a shows light output measurement equipment;
b shows light output measurement equipment for measuring an output efficiency of the
c shows schematically an arrangement for calibrating the
Referring to
The device 10 is fabricated as follows. In a first step, the heavily doped ohmic contact region 28 is formed. The formation of a heavily doped region to form an ohmic contact is a standard silicon integrated circuit process. A back face of a 75 mm diameter wafer of lightly doped n-type, denoted n−, (100) silicon of resistivity in the range 10-20 Ωcm is implanted by ion implantation at an energy of 70 keV in a Varian 350 RD ion beam implanter with a donor impurity. The donor impurity is phosphorous which is implanted at a dose of 5×1015 cm−2. Following the ion implantation, the implanted wafer is cleaned by washing the wafer in two chemical baths. The wafer is immersed in a first bath containing 300 ml of 35% NH3 solution, 300 ml of 30% H2O2 solution and 1500 ml of deionized water at a temperature of 88° C. for 15 minutes and then immersed in a second bath containing 300 ml of 35% HCl solution, 300 ml of 30% H2O2 solution and 1500 ml of deionized water at a temperature of 88° C. for 10 minutes. After immersion in the two baths, the wafer is rinsed in de-ionised water and dried. After cleaning, the implanted wafer is annealed in argon-2% oxygen at 1050° C. for 30 minutes which results in the formation of a thin surface oxide layer on each face of the wafer having a thickness of approximately 60 Å.
In a second step a front face of the silicon wafer is implanted with an acceptor impurity. The acceptor impurity dopant is boron. The boron is implanted in a Varian 350 RD ion beam implanter with an ion beam of energy 35 keV and a beam current of 250 μA and a beam size of approximately 0.2×1.0 mm2. The ion beam is scanned over the front face of the silicon wafer in a complex scan pattern which ensures uniform dosing of the surface. Each scan takes approximately 1 second. The wafer receives an implantation having a total implantation time of 10 minutes during which the wafer receives a total dose of 1×1016 cm−2. During the implantation, the wafer is held on a thermal sink which prevents the temperature of the silicon rising excessively due to the implantation. The temperature of the wafer rises to no more than 120° C. during the second ion implantation step and it is estimated that the temperature of the wafer rises to between 30° and 40° C.
In conventional integrated circuit processing, a silicon wafer would be annealed after ion implantation to recrystallise and then anneal out any point defects introduced during the ion implantation and to activate electrically the dopant. Electrical activation of the boron dopant occurs when the dopant atoms occupy substitutional sites within the silicon lattice. However, in the present fabrication process, the wafer is not annealed after ion implantation. This lack of an anneal after the ion implantation process would be considered undesirable and surprising to those skilled in the field of silicon integrated circuit processing since the dopant has low electrical activity and the silicon remains in a damaged state.
Measurements of the sheet resistivities of the heavily doped region 28 after annealing and of the front face after ion implantation have been made. The region 28 had a sheet resistivity of 16 Ω per square, which compares with an estimated value for a fully activated dopant implant of 10 Ω per square. Therefore, within experimental error, the dopant in the heavily doped region 28 is fully activated. After ion implantation, the front face had a sheet resistivity of 1800 Ω per square, compared with an estimated value of 10 Ω per square if the dopant had been fully activated. The conductivity of the unannealed implanted boron layer is less than 1% the expected conductivity if the dopant had been fully electrically activated. Transmission electron microscopy has indicated that the crystalline structure of the implanted silicon is heavily damaged by the boron ion implantation.
The ion implanted silicon wafer has been measured using secondary ion mass spectroscopy (SIMS) to determine a distribution of boron within the silicon.
Following the second ion implantation step, the porous silicon region 22 is produced by a light assisted anodization process. Anodization in the context of the production of porous silicon is a generally accepted term for electrolytic selective dissolution of silicon. Referring to
The anodization process is light-assisted. In order to illuminate a first face 220 of the wafer 110, the anodizing cell 212 has a polycarbonate window 222 and an 800 W tungsten-halogen lamp 224 is positioned 24 cm from the face 220 and 14 cm from the polycarbonate window 222. A water cooled infrared absorbing filter 226 is placed between the lamp 224 and the window 222. The first face 220 corresponds to the front face of the silicon wafer implanted with p-type dopant. Measurements of the light intensity at the window 222 were made using a calibrated silicon photodiode detector system comprising a Newport model 840-C meter together with an 818-ST detector. The meter gave a reading of 130 mWcm−2 with a detector control unit set at a wavelength compensation of 900 nm.
Each of the baths 214 and 216 contains a respective platinum electrode 230 and 232. The electrode 232 is in the form of a gauze in order to allow the transmission of light through it. In operation, the electrode 232 is biased negatively, forming a cathode and the electrode 230 is biased positively to form an anode. A constant current source is connected between the anode and the cathode. In operation, an anodizing current with an anodizing current density of 3 mAcm−2 at the silicon wafer face 220 is passed between the electrodes. The electrolyte is maintained at a temperature of between 16° and 17° C. The silicon wafer is anodized for 4 minutes. In the anodization process, a porous silicon region is created which extends through the p-type region 114 into the n-type region 116.
The anodized silicon wafer is left in the HF containing electrolyte 218 for a further one minute after the anodization is completed and the anodizing current switched off but still under illumination. The wafer is removed from the electrolyte and the wet wafer is then dried by spinning in air at a speed of 2500 rpm for a duration of thirty seconds. The spinning process is repeated six times. Under these fabrication conditions, no evidence of macroporous (pores greater than 50 nm in diameter) silicon has been observed using scanning electron microscopy.
The thickness of the porous silicon region after drying has been measured by viewing a cross section of the silicon wafer in a SEM and also by chemically stripping part of the porous silicon region from the silicon wafer using a NaOH solution and measuring a resulting step height between the stripped region and the unstripped region using a scanning probe height measuring instrument. The thickness of the porous silicon region 22 was measured to be 0.4 μm±0.1 μm across the wafer. The average porosity of the porous silicon region was measured using gravimetric techniques to be 70%±5%.
Following creation of the porous silicon region 22, a piece of wafer having a size of 20 mm by 15 mm is cleaved from the centre of the silicon wafer. The top and bottom electrodes 24 and 26 are then deposited onto this piece of wafer. The top electrode 24 is deposited onto the porous silicon region 22 by rf magnetron sputtering using a two inch sputter target comprising a hot pressed and calcined mixture of 90% In2O3 and 10% SnO2 available from CERAC Limited. The sputtering was performed at room temperature using an rf frequency of 13.56 MHz and a sputtering power of 50 watts in a flowing sputtering gas of 0.09% oxygen in argon at a pressure of 8×10−3 mbar with the silicon wafer being 6 cm from the target. A film of indium tin oxide (ITO) is deposited through a shadow mask to form dots of diameter between 1 and 2 mm and a thickness of 0.1 μm over a deposition period of 15 minutes, during which the piece of wafer warms to a temperature of approximately 60° C. It may be possible to deposit ITO of the required characteristics in a sputtering gas having an oxygen content in the range 0.01% to 0.3% with the balance being argon, in a pressure range of 2×10−3 to 1.6×10−2 mbar, with a target wafer separation in the range 1 to 15 cm.
The deposited ITO film has a typical optical transmission coefficient of 85% for light of wavelength in the range 400-900 nm and has a permeability which is dependent on its thickness. The ITO film has been measured to determine its characteristics using Hall measurements and has been found to be n-type with an electrical resistivity of 1.6 mΩcm. FTIR absorption measurements through the ITO contact show that the silicon-hydrogen bonds present in the as anodised material are still present after ITO deposition. In addition there is no evidence for significant oxidation of the structure during ITO deposition. The ITO layer may be permeable depending on its thickness. Chemography measurements of samples with a 0.1 μm thick ITO layer have indicated that the ITO is permeable whereas samples with a 0.2 μm thick layer showed significantly less permeability. This technique is described by L. T. Canham et al. in Advanced Materials, Volume 6 Number 11, 1994, pages 865-868. In the chemography measurements, a piece of unexposed photographic film is placed in contact with the sample in the dark for a period of time and then developed. When porous silicon is placed in contact with the photographic film, silane produced by a reaction between the porous silicon and moisture in the air reacts with the photosensitive chemicals on the photographic film so that after development a dark “image” is formed. The production of an image with the ITO covered samples indicates that the ITO is permeable and at least silane is passing through the ITO, probably together with water vapour in the opposite direction.
The bottom electrode 26 is deposited onto the bottom of the piece of wafer using a thermal evaporation process. The aluminium is evaporated in a vacuum of approximately 10−6 mbar to a thickness of 0.5 μm. In conventional integrated circuit manufacture, an evaporated ohmic contact would be annealed in forming gas, a mixture of nitrogen and hydrogen, at 425°-450° C. This annealing procedure is not carried out in the creation of an ohmic contact to the device 10. The deposition of a bottom electrode is not a critical step in the manufacture of a porous silicon electroluminescent device. A device may be made to luminesce with direct electrical contact to the heavily doped region 28.
In order to obtain luminescence from the device 10, electrical contact is made to the top and bottom electrodes 24 and 26. Referring to
Referring to
In order to obtain measurements of the output efficiency of the device 10, the imaging system 420 is replaced by a detection system 440, as shown in
The combination of the optical fibre 450 and the spectrometer 452 was calibrated for sensitivity as a function of wavelength using an arrangement shown in
The light output from the light source 456 was previously calibrated to obtain a measure of the output as a function of wavelength, L(λ), in units of watts m−2 nm−1 for a distance of 0.5 m from the source. The output at a distance d, Ld(λ), is obtained by multiplying L(λ) by (0.5/d)2, where d is in metres.
The measured signal in channel n corresponds to a power density at the input face 454 of Ld(λ)·Δλ. having units of watts m−2. The power sensitivity of channel n, SP(n,λn), is given by
SP(n,λn)=(Ld(λn)·Δλ)/IN(n,λn),
where Δλ is the spectral width of each channel of the detector in nm. SP(n,λn) is in units of watts m−2/(counts per second).
The sensitivity of channel n of the detection system 440 in terms of photon flux density, SQ(n,λn), is given by
SQ(n,λn)=(Ld(n,λn)·Δλ/Epλn)/IN(n,λn).
where Epλn is the energy of a photon of wavelength λn and is given by
Epλn=h·c/λn,
where h is Planck's constant and c is the velocity of light. The units of SQ(n,λn) are photons sec−1m−2/(counts per second).
From measurements of the light output by the device 10 at a distance x an intensity spectrum, IND(n,In), is obtained in counts per second. The number of photons output at position x per m2 per second, Qx, is given by
Qx=ΣnIND(n,λn)·SQ(n,λn),
where the summation is over n, the number of channels of the detector.
The dependence of the output of the device 10 as a function of angle has been measured up to angles of ±45°. It was found that in this angular range, the intensity of the output was Lambertian, i.e. proportional to Cos(θ), where θ is the angle to the device normal. It is assumed that the output is also Lambertian for the angles 45°<θ<90°.
The total number of photons output per second from a Lambertian source. Qtot, is given by
Qtot=Qx·π·x2.
The output external quantum efficiency, EQE, in percent representing the percentage of photons emitted from the device per electron injected is given by
EQE=(100·Qtot)·q/I,
where q is the charge per electron and the current through the device, I, is in amps.
Referring to
The results of the electroluminescence measurements, obtained by passing a dc electrical current through the device 10, are shown by a line 520. An electroluminescence peak in output intensity 522 was observed at a wavelength of 590 nm. The photoluminescence peak 512 thus occurs at a longer wavelength than the electroluminescence peak 522. Typically, electroluminescence output intensity peaks are measured to be in a range 520-750 nm with a full width half maximum spectral width in a range from 60 nm to 150 nm.
Electrical measurements of the device 10 have shown it to be rectifying and that it is forwards biasable by the application of a positive voltage to the top electrode 24. This polarity dependence is the same as that which would be obtained from a device with a p-n junction within it, such that the p region of the p-n junction is on the porous silicon side of the wafer. Referring to
A p-n junction diode may be characterized by an ideality factor, n, where
n≡(q/kT)·(∂V/∂(ln J)),
where J is the current density and V is the potential difference across the diode. In an ideal case, a p-n junction diode has an ideality factor of unity. For the device 10 at values of applied bias less than 0.5 V, the diode ideality factor of the device is 2. For forward biases greater than 2 V, voltage dependent ideality factors greater than 10 have been measured.
Electroluminescence from the device 10 has been detected using the measuring equipment 400 at an applied current density of 0.01 Am−2, which from
Referring to
The above efficiency results were obtained for a device operating in a vacuum at a pressure of 0.05 mbar. Referring now to
For electroluminescent devices having the ITO replaced by a gold top electrode, the gold must be thin to be semitransparent. However, chemography measurements have shown that a gold thickness of greater than 1000 Å is required to stop ingress of moisture leading to degradation of the device. This thickness of gold is too great for obtaining efficient luminescence through the top contact.
Electroluminescent devices having ITO top electrodes which are thicker than 0.1 μm exhibit luminescence characteristics which differ only slightly between operation in air and operation in vacuum.
Measurements of the external quantum efficiency of the electroluminescent devices as a function of temperature have shown a maximum external quantum efficiency of 0.4% at a temperature of 200 K (−73° C.).
Referring to
In order to determine how the boron dopant is distributed in the device 10, SIMS has been used to measure the distribution of boron through the porous silicon region 22.
As a comparison to
From a comparison of
If transportation of boron takes place during the anodization process, the following mechanism for the creation of a p-n junction within the porous silicon is envisaged. Once pores have been created in the p-type region 114, the porosity extends into the region 116. As formed, porous silicon in the region 116 is n-type in nature. As the anodization progresses and the depth of the porous silicon region increases, the n-type porous silicon is doped by boron transported from the p-type region 114 so that it becomes p-type porous silicon. In consequence, near to the advancing interface between bulk silicon and porous silicon, it is considered that there is a newly formed n-type porous silicon region and further towards the surface of the wafer the porous silicon is doped p-type by the transported boron. This would produce a p-n junction in the porous silicon region. When the anodization process is terminated, a region of n-type porous silicon would remain close to the bulk silicon-porous silicon interface and so the p-n junction in the porous silicon region would remain after the anodization process has finished. Luminescent porous silicon is only created when the anodization front extends into the region 116. Thus it is believed that a p-n junction is created within a region of luminescent porous silicon.
In order to investigate the formation mechanism for the p-n junction in the porous silicon region, experiments have been carried out to investigate the effect of changing the anodization time. Samples were anodized for different times. t. and after anodization, the samples were left in the anodizing electrolyte, with the illumination left on, for 5-t minutes after anodization to ensure that once a porous silicon region is formed it receives the same leaching effect as it does when a wafer is anodized for five minutes. In the production of the device 10, the preferred anodization time is four minutes followed by a one minute leach. After fabrication, photoluminescence and electroluminescence measurements were carried out on devices fabricated from the anodized silicon. These measurements are summarized in Table 1.
The following conclusions may be reached from the information provided by Table 1. Table 1 shows that a device fabricated from the anodized wafer becomes strongly rectifying after anodization for more than two minutes. This suggests that the feature of the device 10 responsible for the rectifying behaviour, a p-n junction, is at a depth at least equal to that corresponding to the depth of porous silicon formed after two minutes of anodization, or approximately 0.15 μm. There is also a marked change in the values of the electrical power required for detectable electroluminescence between two and three minutes anodization.
Electroluminescent devices have been fabricated from silicon wafers which had been subject to a boron ion-implantation different from that for the device 10. The wafer for the device 10 received a boron dose of 1×1016 cm−2. Devices made from a wafer which received a dose of 3×1016 cm−2 had an approximate maximum external quantum efficiency of 0.026%. Devices made from a wafer which received a dose of 3×1016 cm−2 had an approximate maximum external quantum efficiency of 0.062%. The devices made from wafers which had received boron doses which were greater than or less than the dose for fabricating the device 10 thus had significantly lower efficiencies. However since there are a large number of processing conditions which may be altered individually, changing other processing conditions in combination with a change in the boron dose may result in devices of even higher efficiency.
When ion implantation of the boron is carried out at a beam current of 25 μA rather than the standard 250 μA, with the same total dose, both electroluminescence and photoluminescence from a device have a deep red appearance to the eye rather than the usual red-orange appearance. Also, a device fabricated according to the preferred procedure which initially displayed electroluminescence which had a red-orange appearance to the eye displayed electroluminescence which was green-yellow in appearance after being stored in air for a week. These observations indicate the possibility of tuning the fabrication process to produce electroluminescent devices suitable for colour displays. Since the device 10 is fabricated from a wafer of silicon, it would be a relatively straight forward procedure to integrate the device 10 with other non-luminescent silicon devices, such as transistors, on a single piece of silicon to form an optoelectronic integrated circuit. Since the silicon is not annealed after the acceptor impurity ion implantation, it would be feasible to fabricate these other silicon devices prior to the fabrication of the electroluminescent device 10, with regions of the silicon wafer containing the non-luminescent devices being masked off by for example silicon nitride deposited by a low temperature plasma enhanced chemical vapour deposition process.
Materials other than ITO have been used for the top electrode. Gold, indium and aluminium have been used and whilst devices incorporating top electrodes of these materials do exhibit electroluminescence, the efficiencies are reduced. The bottom electrode 26 is not critical to the operation of the device 10. Electroluminescent devices in which the bottom electrode is absent have been operated with little difference in the device d.c. electrical characteristics from those of the device 10, though it is likely that the high frequency behaviour would be significantly different.
Electroluminescent devices have also been fabricated by anodizing a wafer of n− silicon to form a porous silicon region and then immersing the porous silicon in a solution of boric acid. SIMS measurements confirmed that boron had been introduced into the porous silicon at high concentrations but electroluminescence efficiencies from devices made by this method were low, having external quantum efficiencies of the order 0.002%.
From the sheet resistivity measurements, it is estimated that less than 1% of the implanted boron is electrically active in the region 114 after ion implantation. The electrical measurements of the device 10 show p-n junction diode behaviour. It can therefore be concluded that the boron dopant is electrically active after the anodization process. Since there is no annealing carried out after the boron ion implantation, it is possible that the electrical activity of the boron dopant after the anodization process is due to surface doping of quantum wires in the porous silicon by transported boron. The term surface doping refers to the deposition of dopant species on the surface of the quantum wires. Since the quantum wires are less than 30 Å in width, these dopant species may remain on the surface and modify the band structure of the silicon or they may diffuse the short distance into the quantum wires.
The surface doping scenario is supported by the experiments involving immersion of n-porous silicon in boric acid. Referring to
Transmission electron microscopy of the porous silicon region 22 after ion-milling has identified that the porous silicon comprises quantum wires of width less than 3 nm and surprisingly small pores having a diameter of approximately 7 Å. Pore widths in a range from 15 Å to 30 Å have been observed previously. It is possible that the exceedingly fine porosity could play an important) role in the performance of the device. As discussed by Canham and Groszek in Journal of Applied Physics, Volume 72, Number 4, 1992, pp 1558-1565, microporous silicon has pores of size less than 20 Å wide. Microporous silicon has been subdivided into supermicroporous silicon with a pore size of approximately 10-20 Å wide and ultramicroporous silicon with a pore size of less than approximately 10 Å wide. The pores in the freshly etched device structure are probably supermicroporous, becoming ultramicroporous upon skeleton oxidation.
It is known to be difficult to dry porous silicon structures which have a pore size less than 20 Å. SIMS measurements indicate a high level of fluorine in the porous silicon. It is therefore possible that HF trapped in the pores could protect the internal surface of the porous silicon against oxidation prior to device operation.
SIMS data indicates that a surface region of the porous silicon region 22 has significant levels of oxygen, carbon and fluorine in addition to boron. It is therefore possible that the surface region, although not strongly luminescent, has a comparable or wider band gap to an active luminescent region below it. It would therefore act as an efficient hole injection layer for the device 10. Hole injection efficiency may be quantified by a minority carrier injection ratio, g, defined as the ratio of the minority carrier current to the total current passing across the relevant junction, as described by S. M. Sze in “Physics of Semiconductor Devices”, Wiley and Sons, New York, 1981, page 268. An efficient hole injection layer might have a minority carrier injection ration, g, of more than 10−3 at bias voltages below 5 volts. It is thought that an external quantum efficiency of 0.1% corresponds to an internal quantum efficiency of approximately 1%, which implies a value of g of at least 10−2.
Referring now to
A line 1002 represents the conduction band, a line 1004 represents the valence band and a line 1006 represents the Fermi level. The n-type bulk silicon has a band gap of 1.15 eV, as indicated by a region 1010 of the band structure 1000. The n-type porous silicon band structure is indicated by a region 1012 and the p-type porous silicon region band structure is indicated by a region 1014. The ITO is n-type with a band gap of 3.7 eV, as shown by a region 1016. The simulation predicts a p-n junction in the porous silicon at a depth of 400 nm from the ITO/porous silicon interface.
| Number | Date | Country | Kind |
|---|---|---|---|
| 9505569.5 | Mar 1995 | GB | national |
| PCT/GB95/02211 | Sep 2005 | WO | international |
This application is a Continuation of application Ser. No. 10/931,218 filed Sep. 1, 2004, which in turn is a Division of application Ser. No. 10/051,059, filed Jan. 22, 2002, which in turn is a divisional of application Ser. No. 08/913,414 filed Sep. 17, 1997, which is the U.S. national phase of international application PCT/GB96/00589, filed in English on 15 Mar. 1996, which designated the US. PCT/GB96/00589 claims priority to GB Application No. 9505569.5 filed 20 Mar. 1995. The entire contents of these applications are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 10051059 | Jan 2002 | US |
| Child | 10931218 | Sep 2004 | US |
| Parent | 08913414 | Sep 1997 | US |
| Child | 10051059 | Jan 2002 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 10931218 | Sep 2004 | US |
| Child | 11455932 | Jun 2006 | US |
