Patent Application
20080258255
The present invention relates generally to fuse structure in integrated circuits (ICs), and more particularly to electrical fuse structures.
Fuses in an IC are convenient nonvolatile memories for permanently storing information such as “chip-ID”, etc. An electrical fuse is a fuse that can be programmed by applying excessive current or long stress time. One semiconductor material for making such electrical fuse is silicided polysilicon. After stressing the silicided polysilicon material by applying a moderately high current density, typically about 600 mA/um2, for a certain period of time, its resistance may rise due to electromigration (EM). The EM is a phenomenon that electrons in an electrical field impacting fixed ions in the fuse, which creates voids and eventually opens a circuit after a prolonged stress. The initial low resistance and the after-stress high resistance may be used to represent two different logic states, commonly known as HIGH and LOW.
In addition to EM, there are two other fuse programming mechanisms, i.e., silicide agglomeration and rupture. The silicide agglomeration happens when the fuse temperature is higher than 850° C., which is beyond the silicide formation temperature. The rupture is physically breaking a fuse when the temperature gradient causing different thermal expansion in different parts of the fuse that causes the break.
For an electrical fuse that has initial resistance of 100 ohm, after an EM programming, its after-stress resistance may range from 500 to 10K ohm. If the same fuse is programmed by silicide agglomeration, its final resistance may reach 100K to 1M ohm. If the fuse is simply ruptured after programming, its final resistance may be more than 10M ohm.
Structures of electrical fuses also affect their programming effectiveness.
Kothandaraman, et al. in “Electrically Programmable Fuse Using Electromigration in Silicides”, IEEE Elec. Dev. Lett. Vol. 23, No. 9, September 2002, pp. 523-525, proposed a structure using small anode and large cathode. This structure actually resists the EM effect. The rationale of this structure is to suppress the EM effect such that the rupture could happen at a higher programming voltage that results in a higher resistance state. Alavi et al. in “A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process,” IEDM 1997, pp. 855-858, designed a symmetrical fuse structure for electrical fuses, which provides no aggravation to the EM effect. Kalnitsky, et al. in “CoSi2 integrated fuses on poly silicon for low voltage 0.18 um CMOS applications,” IEEE IEDM 1999, pp. 765-768, reported another electrical fuse using EM effect, but it is still based on symmetrical structure.
As such, what is desired is an electrical fuse structure that can aggravate the EM effect which makes a fuse structure easier to be programmed and has a larger resistance differentiation between a before and after programming.
In view of the foregoing, the present invention provides a fuse structure with an aggravated electromigration effect. In one aspect of the invention, the fuse structure comprises an anode area overlaying a first plurality of contacts that are coupled to a positively high voltage during a programming of the fuse structure, a cathode area overlaying a second plurality of contacts that are coupled to a complementary low voltage during a programming of the fuse structure, and a fuse link area having a first and second end, wherein the first end contacts the anode area at a predetermined distance to the nearest of the first plurality of contacts, and the second end contacts the cathode area at the predetermined distance to the nearest of the second plurality of contacts, wherein the cathode area is smaller than the anode area for aggravating electromigration effects.
According to another aspect of the present invention, a reverse biased PN junction is formed in the body of the fuse link area to shun current to the surface of the fuse structure for further aggravating the EM effect.
According to yet another aspect of the present invention, the cathode area overlaying the second plurality contacts by a smaller distance than specified by a predetermined design rule for restricting current density at the second plurality of contacts, and therefore, aggravating the EM effect at the same time.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
The following will provide a detailed description of a fuse structure that provides greater resistance differentiation between before and after programming through aggravating electromigration (EM) effects in the fuse structure. The EM effects from which the present invention benefits include a cathode depletion effect and a reservoir effect. The cathode depletion effect refers to a phenomenon that during a programming, the cathode area is more prone to have voids than the anode area. The reservoir effect refers to a phenomenon that the larger the cathode area the more resistant the fuse structure to the EM stress.
Although electrical fuse structure 200 is commonly made of polysilicon material, one having skills in the art would appreciate other materials, such as silicided polysilicon and diffusion or a combination of them, may also be used. Besides, the electrical fuse structure 200 is not limited to be on top of a field oxide. The underneath material may be thin gate oxide, as a programming voltage of such electrical fuse structure 200 is low enough not to cause damage to the gate oxide.
Although the silicided polysilicon is used to illustrate the second embodiment of the present invention, one having skills in the arts would recognize that the principle of the present invention may be applied to other structures, such as silicide over silicon and anti-fuse structure, as long as a reverse biased PN junction can be formed underneath a layer which is subject to EM effects.
Beside the aforementioned functionality advantages, the present invention may also be a cost down solution for anyone needing a fuse in an IC, as the poly fuse structure may be fabricated in a normal logic process without employing any additional mask.
Although the silicide on top of the polysilicon is described as embodiments of the present invention, one having skills in the arts would appreciate the bottom polysilicon layer may be replaced by other materials, such as diffusion, as long as a PN junction can be formed therein. Forming the top silicide layer may also be substituted by other processes as long as the top layer is subject to the EM effect. In another aspect, the layer subject to the EM effect may be at the bottom and the layer with reverse biased PN junction may be on the top.
The above illustration provides many different embodiments or embodiments for implementing different features of the invention. Specific embodiments of components and processes are described to help clarify the invention. These are, of course, merely embodiments and are not intended to limit the invention from that described in the claims.
Although the invention is illustrated and described herein as embodied in one or more specific examples, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention, as set forth in the following claims.
