Patent Application
20070046174
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C.§119 from an application for ELECTRON EMISSION DISPLAY DEVICE, earlier filed in the Korean Intellectual Property Office on the 30th of Aug. 2005 and there, duly assigned Serial No. 10-2005-0080010.
1. Field of the Invention
The present invention relates to an electron emission display, and more particularly, to an electron emission display, in which a width of a phosphor layer has been optimized to improve light emission uniformity of pixel regions and to improve luminescence.
2. Description of Related Art
Generally, electron emission elements are classified into those using hot cathodes as an electron emission source, and those using cold cathodes as the electron emission source. There are several types of cold cathode electron emission elements, including Field Emitter Array (FEA) elements, Surface Conduction Emitter (SCE) elements, Metal-Insulator-Metal (MIM) elements, and Metal-Insulator-Semiconductor (MIS) elements.
The FEA element includes electron emission regions and cathode and gate electrodes that are driving electrodes. The electron emission regions are formed of a material having a relatively low work function or a relatively high aspect ratio, such as a carbonaceous material or a nanometer-size material, so that electrons can be effectively emitted when an electric field is applied thereto under a vacuum atmosphere.
The electron emission elements are arrayed on a first substrate to establish an electron emission unit. The electron emission unit is associated with a second substrate, on which a light emission unit having a phosphor layer, a black layer and an anode electrode is formed, to establish an electron emission display.
In the electron emission display, some of the electrons emitted from an electron emission region do not travel straight towards a phosphor layer of a corresponding pixel but rather spread out toward a phosphor layer of an adjacent pixel.
In order to prevent the electrons from spreading out, a focusing electrode is provided. The focusing electrode is insulated from the driving electrodes by an insulating layer and is disposed on the driving electrodes. The focusing electrode is provided with openings through which electrons pass. As the electrons pass through the openings, the electrons are focused into an electron beam.
The electron emission display can realize a high quality display when the electron beam spot accurately strikes the phosphor layer of the corresponding pixel.
That is, when the electron beam spot diverges in a direction where phosphor layers of differing colors are arranged, a phosphor layer of an undesirable color is excited to deteriorate the color purity of the screen. When the electron beam spot diverges in a direction where phosphor layers of an identical color are arranged, the luminescence is deteriorated. When the electron beam spot is smaller than a width of the phosphor layer, the light emission quality and the luminescent uniformity of the pixel regions are deteriorated.
Therefore, there is a need to optimize the relationship between the openings of the focusing electrode and the phosphor layers on which the electron beams land.
The present invention provides an electron emission display, in which a width of a phosphor layer is optimized to improve light emission uniformity of pixel regions and to improve luminescence and to prevent a phosphor layer of an undesirable color from being excited.
In an exemplary embodiment of the present invention, an electron emission display includes: first and second substrates arranged to face each other; an electron emission region arranged on the first substrate; a plurality of driving electrodes arranged on the first substrate and adapted to control electron emission of the electron emission region; a focusing electrode arranged above the driving electrodes and including openings adapted to focus electrons passing therethrough; and phosphor layers arranged on the second substrate, the phosphor layers respectively corresponding to each pixel region on the first substrate. The openings and the phosphor layer satisfy the following inequality: F2<D2<(F2+2P1−D1−F1). F1 is a first width of the openings in a first direction of the first and second substrates, D1 is a first width of the phosphor layers in the first direction, F2 is a second width of the openings in a second direction perpendicular to the first direction, D2 is a width of the phosphor layers in the second direction, and P1 is a pitch between the pixel regions in the first direction.
The first direction is preferably a horizontal direction of the first and second substrates and the second direction is preferably a vertical direction of the first and second substrates.
The phosphor layers preferably include red, green and blue phosphor layers and the phosphor layers of differing colors are preferably alternately arranged in the first direction and the phosphor layers of an identical color are preferably arranged in the second direction.
Lateral axes of the openings and the phosphor layers are preferably in the first direction and longitudinal axes of the openings and the phosphor layers are preferably in the second direction.
The openings of the focusing electrodes preferably include one of a rectangular shape, an oval shape and a track shape.
The phosphor layers preferably include either a rectangular shape or a rectangular shape having rounded corners.
One of the openings on the focusing electrodes are preferably provided for each pixel region defined on the first substrate.
Two or more openings on the focusing electrodes are preferably provided for each pixel region defined on the first substrate and the second width F2 of the openings is preferably defined between upper and lower ends of the openings arranged at each pixel region in the second direction.
The driving electrodes preferably include first and second electrodes with an insulating layer interposed therebetween and the electron emission region is preferably electrically connected to one of the first and second electrodes.
The electron emission region preferably includes a material selected from the group consisting of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, C60, and silicon nanowires.
A more complete appreciation of the present invention and many of the attendant advantages thereof, will be readily apparent as the present invention becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings in which like reference symbols indicate the same or similar components, wherein:
The present invention is described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the present invention are shown.
Referring to
An electron emission unit 200 having an array of electric emission elements is formed on a surface of the first substrate 2 facing the second substrate 4. A light emission unit 210 is formed on a surface of the second substrate 4 facing the first substrate.
Cathode electrodes 6 are arranged on the first substrate 2 in a stripe pattern and a first insulating layer 8 is formed on the first substrate 2 to fully cover the cathode electrodes 6. Gate electrodes 10 are arranged on the first insulating layer 8 in a stripe pattern, the gate electrodes 10 crossing the cathode electrodes 6 at right angles.
The crossed regions of the cathode electrodes 6 and the gate electrodes 10 define pixel regions. One or more electron emission regions 12 are formed on the cathode electrodes 6 at each pixel region. Openings 81 and 101 corresponding to the electron emission region 12 are formed through the first insulating layer 8 and the gate electrodes 10 to expose the electron emission region 12.
The electron emission regions 12 are formed of a material that emits electrons when an electric field is applied in a vacuum. For example, the electron emission regions 12 can be formed of carbon nanotubes, graphite, graphite nanofibers, diamonds, diamond-like carbon, C60, silicon nanowires, or a combination thereof. The electron emission regions 12 can be formed through a screen-printing process, a Chemical Vapor Deposition (CVD) process, a direct growth process, or a sputtering process.
In the drawings, although the electron emission regions 12 and the openings 101 are formed in a circular shape and arranged in series in a longitudinal direction of the cathode electrodes 6 at each pixel region, the present invention is not limited thereto. That is, the number, shape and arrangement of the electron emission regions 12 can be varied.
In addition, although the gate electrodes 10 are disposed above the cathode electrodes 6 with the first insulating layer 8 interposed therebetween, the present invention is not limited thereto. For example, the cathode electrodes can be disposed above the gate electrodes with the first insulating layer interposed therebetween. In this case, the electron emission regions can be formed on side surfaces of the cathode electrodes.
A second insulating layer 16 is formed on the first insulating layer 8 to cover the gate electrodes 10 and a focusing electrode 14 is formed on the second insulating layer 16. Openings 161 and 141 through which electron beams pass are formed through the second insulating layer 16 and the focusing electrode 14.
The greater the height difference between the focusing electrode 14 and the electron emission regions 12, the stronger the focusing effect. Therefore, the second insulating layer 16 is formed to have a thickness greater than that of the first insulating layer 8.
In this embodiment, each pixel region corresponds to each of the openings 141 of the focusing electrode 14 so that electrons emitted from one pixel region can be focused while passing through the corresponding one opening 141. Each opening 141 has a pair of longitudinal sides formed in a longitudinal direction of the cathode electrode 6 and a pair of lateral sides formed in a lateral direction of the cathode electrode 6. That is, the openings 141 are formed in an oblong shape. In
The openings 141 can be formed in a rectangular shape, an oval shape, a track shape, or the like.
Phosphor layers 18, such as red (R), green (G) and blue (B) phosphor layers 18R, 18G and 18B, are formed on a surface of the second substrate 4 opposite to the first substrate 2 and black layers 20 for enhancing the contrast of the screen are arranged between the R, G and B phosphor layers 18R, 18G and 18B.
Each crossed region of the cathode and gate electrodes 6 and 10 corresponds to a single color phosphor layer. For example, phosphor layers of differing colors are arranged in a first direction (a direction of an X-axis in the drawing) of the second substrate 4 and the phosphor layers of an identical color are arranged in a second direction (a direction of a Y-axis in the drawing) perpendicular to the first direction.
In
An anode electrode 22 formed of a conductive material, such as aluminum, is formed on the phosphor and black layers 18 and 20. The anode electrode 22 functions to improve the screen luminance by receiving a high voltage required for accelerating the electron beams and reflecting the visible light rays radiated from the phosphor layer 18 to the first substrate 2 towards the second substrate 4, thereby improving the screen luminance.
Alternatively, the anode electrode 22 can be formed of a transparent conductive material, such as Indium Tin Oxide (ITO), instead of the metallic material. In this case, the anode electrode is placed on the second substrate 4 and the phosphor and black layers 18 and 20 are formed on the anode electrode. Alternatively, the anode electrode can include both a metallic layer and a transparent conductive layer.
Spacers 24 are disposed between the first and second substrates 2 and 4 to uniformly maintain a gap therebetween. The spacers 24 are arranged corresponding to the black layers 20 so that the spacers 24 do not block the phosphor layers 18.
The above-described electron emission display is driven when a predetermined voltage is supplied to the cathode, gate, focusing, and anode electrodes 6, 10, 14, and 22.
For example, one of the cathode and gate electrodes 6 and 10 serves as scan electrodes receiving a scan driving voltage and the other functions as data electrodes receiving a data driving voltage. The focusing electrode 14 receives 0V or a negative DC voltage of several to tens of volts. The anode electrode 22 receives a DC voltage of, for example, hundreds to thousands of volts to accelerate the electron beams.
Electric fields are formed around the electron emission regions 12 of pixel regions where a voltage difference between the cathode and gate electrodes 6 and 10 is equal to or greater than a threshold value and the electrons are thus emitted from the electron emission regions 12. The emitted electrons strike the phosphor layers 18 of the corresponding pixel due to the high voltage supplied to the anode electrode 22, thereby exciting the phosphor layers 18.
When the electron emission display operates, the shapes of the openings 141 and the phosphor layers 18 act as important factors determining the luminescence of the phosphor layers and the light emission uniformity of the pixel regions. Considering this, the vertical width Dv of each phosphor layer 18 is determined according to the following Inequality 1.
Fv<Dv<(Fv+2C) Inequality 1:
where, Fv is a vertical width of the opening 141 and C is a length of a diverging region of an electron beam spot from an end of the opening 141 of the focusing electrode in a longitudinal direction of the phosphor layer 18.
That is, the vertical width Dv of the phosphor layer 18 is formed to be greater than the vertical width Fv of the opening 141 of the focusing electrode 14 but less than the vertical width Fv+2C of the electron beam spot that diverges. When the vertical width Dv of the phosphor layer 18 is less than the vertical width Fv of the opening 141, the phosphor layer 18 cannot provide a sufficient light emission area, thereby reducing the luminescence. When the vertical width Dv of the phosphor layer 18 is greater than the vertical width Fv+2C of the electron beam spot, an ineffective light emission region is formed, thereby reducing the light emission efficiency of the phosphor layer and the light emission uniformity of the pixel regions.
Therefore, in this embodiment, the electron emission display is designed to satisfy the aforementioned condition and to thereby improve the electron beam utilizing efficiency. That is, the light emission efficiency of the phosphor layers 18 can be improved to enhance the luminescence of the screen and to improve the light emission uniformity of the pixel regions.
At this point, the length of the diverging region C is set considering a condition for preventing the electron beam from trespassing an adjacent phosphor layer 18 in the lateral direction of the phosphor layer 18 when the electron beam has a diverging region having horizontal and vertical lengths identical to each other.
In
Referring to
At this point, the horizontal width Fh+2C of the electron beam spot must be less than Dh+2b to prevent undesirable color emission. This can be expressed by the following Equation 1.
2C=2Ph−Dh−Fh Equation 1:
Therefore, with reference to Inequality 1 and Equation 1, the vertical width Dv of the phosphor layer 18 of the electron emission display of this embodiment can be set to satisfy the following Inequality 2 so that the light emission efficiency of the phosphor layers 18 can be improved to enhance the luminescence of the screen and the light emission uniformity of the pixel regions can be improved while suppressing undesirable color emission.
Fv<Dv<(Fv+2Ph−Dh−Fh) Inequality 2:
For example, when the horizontal pitch Ph between the pixel regions is 200 micrometers, the horizontal width Dh of the phosphor layer is 150 micrometers, and the horizontal and vertical widths Fh and Fv of the opening of the focusing electrode are respectively 30 micrometers and 200 micrometers, the vertical width Dv of the phosphor layer can be 200-420 micrometers according to Inequality 2. That is, in response to the luminescence required for the electron emission display, the vertical width of the phosphor layer is properly selected within the range of 200-420 micrometers.
Referring first to
Referring to
Referring to
Referring to
Although the electron emission display in the above exemplary embodiments have FEA elements, the present invention is not limited thereto. The present invention can be applied to an electron emission display having other types of electron emission elements.
Although exemplary embodiments of the present invention have been described in detail hereinabove, it should be clearly understood that many variations and/or modifications of the basic inventive concept taught herein still fall within the spirit and scope of the present invention, as defined by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2005-0080010 | Aug 2005 | KR | national |
