Patent Application
20120235113
The present invention relates to an electron emission element having a focusing electrode which focus electrons emitted from a surface emission portion and an imaging device having the same.
Recently, in technology where electrons are emitted by an electric field without heating a negative electrode (cathode electrode), a so-called electron emission element of a surface emission type has been proposed (see Patent Document 1). The electron emission element has an aperture (emission concave portion) which penetrates an insulation layer and a gate electrode layer stacked on an electron emission layer and a carbon layer stacked on the gate electrode layer and an inner surface of the aperture, and emits electrons from an electron emission layer exposed at a bottom of the aperture by applying voltage to the gate electrode layer.
[Patent Document 1] WO2007-114103
When the electron emission element is packed to mount in an imaging device, the electron emission element is disposed to face a substrate having an anode electrode and a photoelectric conversion layer via vacuum space therebetween, emitted electrons are coupled with holes in the photoelectric conversion layer and electric current at that time is detected as video signals. At this time, electron beams need to be focused on a surface of the photoelectric conversion layer in order to make the emitted electrons strike with holes in the photoelectric conversion layer efficiently.
In the above electron emission element of the surface emission type, it has been considered to provide a focusing electrode layer which focuses electrons using an electric field by applying voltage having electric potential different from that of the gate electrode layer so as not to broaden tracks of emitted electrons (electric beams). Such a structure may cause a trouble in which the gate electrode layer and the focusing electrode layer are conducted by the carbon layer film-formed on the inner peripheral surface of the emission concave portion at the end of a fabrication process. Thus, the gate electrode layer and the focusing electrode layer have same electric potential difference and sufficient electric potential difference is not generated therebetween, and a problem such that electrons can not be focused may be conceived.
It is an advantage of the invention to provide an electron emission element of a surface emission type in which a gate electrode layer and a focusing electrode layer can not be conducted through a carbon layer even the focusing electrode layer is provided and to provide an imaging device having the same.
According to an aspect of the invention, there is provided an electron emission element having an electron emission layer that emits an electron from a surface emission portion, a focusing electrode layer that is film-formed on a surface of the electron emission layer via a first insulation layer and focuses the emitted electron, a gate electrode layer that is film-formed on a surface of the focusing electrode layer via a second insulation layer, an emission concave portion that penetrates the gate electrode layer, the second insulation layer, the focusing electrode layer and the first insulation layer and opens in a concave shape on a surface of the surface emission portion, a carbon layer that is film-formed from a surface of the gate electrode layer over an inner peripheral surface of the emission concave portion, and a partial insulation portion that insulates the focusing electrode layer from the carbon layer.
According to another aspect of the invention, there is provided an electron emission element having an electron emission layer that emits an electron from a surface emission portion, a gate electrode layer that is film-formed on a surface of the electron emission layer via a first insulation layer, a focusing electrode layer that is film-formed on a surface of the gate electrode layer via a second insulation layer and focuses the emitted electron, a third insulation layer that is stacked on a surface of the focusing electrode layer, an emission concave portion that penetrates the third insulation layer, the focusing electrode layer, the second insulation layer, the gate electrode layer and the first insulation layer, and opens in a concave shape on a surface of the surface emission portion, a carbon layer that is film-formed from a surface of the third insulation layer to an inner peripheral surface of the emission concave portion, and a partial insulation portion that insulates the focusing electrode layer from the carbon layer.
With the structures described above, since the focusing electrode layer and the gate electrode layer are not conducted via the carbon layer by the partial insulation portion which insulates the focusing electrode layer from the carbon layer, voltage having different potential from that of the gate electrode layer can be applied to the focusing electrode layer, thereby it is possible to focus the electrons (electron beams) emitted from the surface emission portion.
The gate electrode layer and the focusing electrode layer are preferably made of tungsten (W) especially, and may be made of metal such as Si, Al, Ti, TiN, Cu, Ag, Cr, Au, Pt, C.
In this case, it is preferable that the partial insulation portion be made up of at least a side wall disposed between the carbon layer and the focusing electrode layer among side walls that are disposed between the carbon layer and the gate electrode layer, between the carbon layer and the second insulation layer, between the carbon layer and the focusing electrode layer, and between the carbon layer and the first insulation layer.
In this case, it is preferable that the partial insulation portion be made up of at least a side wall disposed between the carbon layer and the focusing electrode layer among side walls that are disposed between the carbon layer and the third insulation layer, between the carbon layer and the focusing electrode layer, between the carbon layer and the second insulation layer, between the carbon layer and the gate electrode layer, and between the carbon layer and the first insulation layer.
With these structures described above, it is possible to select where to form the side wall based on geometry of the emission concave portion or film-formation/etching processes. Further, since the side walls are formed between the carbon layer and layers other than the focusing electrode layer, it is possible to omit complex film formation/etching processes and to form the partial insulation portion which insulates the carbon layer from the focusing electrode layer easily.
In this case, film thickness (film width) of the side wall is formed to be approximately equal to thickness of the second insulation layer to achieve same insulation performance.
With the structure described above, the focusing electrode layer is sufficiently insulated from the carbon layer as well as the gate electrode layer, and it is possible to avoid that a purpose of the side wall can be spoiled by leak current from the second insulation layer. Thus, it is possible to insulate between the focusing electrode layer and the gate electrode layer properly. In a case that the side wall and the second insulation layer are made of same insulation material, it is preferable that film thickness (film width) of the side wall and that of the second insulation layer be the same.
Further, in these cases, it is preferable that the electron emission layer be made of amorphous silicon, and the partial insulation portion be made of oxide or nitride.
With the structure described above, the partial insulation portion promotes to oxidize the electron emission layer and electron emission performance of the surface emission portion can be enhanced. Oxide silicon (SiOx) is especially preferable for the oxide constituting the partial insulation portion, and metal oxide such as WOx, AlOx, TiOx, CuOx, AgOx, CrOx, MgOx and metallic composite oxide such as MgAl2O4, BaTiO3 may be used.
Further, in these cases, it is preferable that voltage be applied to the gate electrode layer and the focusing electrode layer respectively such that electric potential of the focusing electrode layer is lower than that of the gate electrode layer.
With the structure described above, since the focusing electrode layer can be functioned by lower voltage than that applied to the gate electrode layer, it is possible to provide the electron emission element which emits electrons by low voltage as a whole.
Further, in these cases, the electric potential of the focusing electrode layer may be negative electric potential.
With the structure described above, since electric potential difference between the gate electrode layer and the focusing electrode layer can be large, focusing effect by the focusing electrode can be sufficiently enhanced even the applied voltage is low in total.
Further, in these cases, it is preferable that the emission concave portion is formed to be larger in an electron emission direction.
With the structure described above, since layer end of each electrode layer and each insulation layer positioned above the emission concave portion do not block tracks of emitted electrons (attenuation of electron beams), the electrons can be emitted efficiently.
According to the other aspect of the invention, there is provided an imaging device having an electron emission substrate section that has the electron emission element described above and a cathode electrode, and a light reception substrate section that faces the electron emission substrate section having vacuum space therebetween and, has a photoelectric conversion layer and an anode electrode.
With the structure described above, it is possible to focus emitted electrons on a front surface of the photoelectric conversion layer efficiently and to provide the imaging device of a power saving type having high detection accuracy.
An electron emission element according to a first embodiment of the invention and an imaging device having the same will be explained with reference to accompanying drawings. The electron emission element is an electron emission element, as it is called, of a surface emission type having an electron source of a cold cathode type, and the imaging device is constructed by an electron emission element array in which a plurality of electron emission elements are disposed in a matrix shape and a photoelectric conversion film which faces the electron emission element array having vacuum space therebetween.
As illustrated in
When desired voltage is applied to the gate electrode layer 8 as having the cathode electrode layer 2 as ground potential, a strong electric field is generated at the surface emission portion 9 of the electron emission layer 3. Electrons in the electron emission layer 3 are accelerated by the generated electric field and are emitted from the surface emission portion 9 by tunnel effect. At this moment, if voltage having lower electric potential than that of the gate electrode layer 8 is applied to the focusing electrode layer 6 (having electric potential difference), the emitted electrons (electronic beams) are focused, and beam spots thereof are focused narrowly and are supplied to a rear surface of a photoelectric conversion layer 123 described later. The carbon layer 11 film-formed on the surface of the gate electrode layer 8 and the inner peripheral surface of the electron emission concave portion 10 electrically conducts the gate electrode layer 8 with the surface emission portion 9 and excites emission of electrons. Further, the carbon layer 11 cooperates with the electron emission layer 3 made of amorphous silicon to enhance electron emission performance of the surface emission portion 9. The side wall 12 insulates the focusing electrode layer 6 from the carbon layer 11, and avoids conduction between the gate electrode layer 8 and the focusing electrode layer 6 via the carbon layer 11 (described later for details).
The electron emission concave portion 10 has an upper emission concave portion 10a surrounded by a layer end of the gate electrode layer 8 film-formed on a top portion and a lower emission concave portion 10b surrounded by layer ends of the first insulation layer 5, the focusing electrode layer 6 and the second insulation layer 7, and is formed by double etching (described later for details). The upper emission concave portion 10a is formed such that the layer end of the gate electrode layer 8 recedes with respect to the layer ends of the first insulation layer 5, the focusing electrode layer 6 and the second insulation layer 7, and an upper portion of the electron emission concave portion 10 is formed larger than a lower portion thereof as a whole. This limits that the layer end of the gate electrode layer 8 projects (obstructs) on tracks of the electrons emitted from the surface emission portion 9.
The side wall 12 has an upper side wall 12a formed on the inner peripheral surface of the upper emission concave portion 10a (layer end of the receded gate electrode layer 8) and a lower side wall 12b formed on an inner peripheral surface (layer ends of the first insulation layer 5, the focusing electrode layer 6 and the second insulation layer 7) of the lower emission concave portion 10b. Since an etchback process is performed on the insulation material (SiOx) film-formed on the inner peripheral surface of the electron emission concave portion 10, the side wall 12 is thus divided. Further, the carbon layer 11 is evenly film-formed so as to cover the surface of the gate electrode layer 8, the upper side wall 12a and the lower side wall 12b. In the embodiment, the carbon layer 11 is not film-formed on the surface emission portion 9 as the bottom of the electron emission concave portion 10 to restrain undesired leakage current (leak) and heat by the carbon layer 11.
A material and film thickness of each layer film-formed on the electrode layer portion 4 will be explained. The gate electrode layer 8 is made of tungsten (W) and is film-formed having 60 nm (600 Å) film thickness. The focusing electrode layer 6 is made of tungsten as the gate electrode layer 8 and is film-formed having 50 nm (500 Å) film thickness which is thinner than that of the gate electrode layer 8. The gate electrode layer 8 and the focusing electrode layer 6 are preferably film-formed having film thickness ranging from 10 to 200 nm (100 to 2000 Å). Further, the gate electrode layer 8 and the focusing electrode layer 6 may be formed from metal such as Si, Al, Ti, TiN, Cu, Ag, Cr, Au, Pt, C instead of tungsten.
The first insulation layer 5 and the second insulation layer 7 are preferably made of same material (such as SiOx) as the side wall 12, and each of which is film-formed having 150 nm (1500 Å) film thickness. In other words, film thickness (of the second insulation layer 7) insulating between the gate electrode layer 8 and the focusing electrode layer 6 is 150 nm (1500 Å), and film thickness (of the first insulation layer 5, the focusing electrode layer 6 and the second insulation layer 7 in total) insulating between the gate electrode layer 8 and the electron emission layer 3 is 350 nm (3500 Å). The first insulation layer 5 and the second insulation layer 7 are preferably film-formed having film thickness ranging from 50 to 1000 nm (500 to 10000 Å).
The side wall 12 is made of oxide silicon (SiOx) described above and is film-formed having 150 nm (1500 Å) film thickness (width). In short, the side wall 12 (especially, the upper side wall 12a) has same thickness as the second insulation layer 7 insulating between the gate electrode layer 8 and the focusing electrode layer 6. Consequently, the focusing electrode layer 6 is insulated from the carbon layer 11 with same insulation performance by which the focusing electrode layer 6 is insulated from the gate electrode layer 8, and deterioration of the insulation performance by leak from the side wall 12 can be avoided. Further, when the electrons are emitted, the surface emission portion 9 is considered to be oxidized by heat of the generated strong electric field. The side wall 12 made of SiOx as an oxide promotes oxidation of the surface emission portion 9 made of amorphous silicon, thereby the electron emission performance of the surface emission portion 9 is enhanced. The side wall 12 may be made of metal oxide such as WOx, AlOx, TiOx, CuOx, AgOx, CrOx, MgOx instead of oxide silicon, metallic composite oxide such as MgAl2O4, BaTiO3, or nitride.
The voltage applied to the focusing electrode layer 6 is set lower than that applied to the gate electrode layer 8 (carbon layer 11). When electric potential of the gate electrode layer 8 is set at 20V, electric potential difference between concave spaces thereof is preferably 0V to 13V. Thus, voltage is applied to the focusing electrode layer 6 so that the focusing electrode layer 6 has sufficiently low electric potential than that of the gate electrode layer 8, and consequently, the applied voltage applied to the electron emission element 1 is held as low as possible in total. The voltage applied to the focusing electrode layer 6 may have negative electric potential to enhance focusing effect.
Referring to
Then, a photo resist layer 20 is coated on the gate electrode layer 8 film-formed at the top portion by a spin coat process or the like, exposure/development processes are performed, and a resist pattern 21 having a resist ablation portion of which size is same as aperture size of the upper emission concave portion 10a is formed on a portion where the electron emission concave portion 10 (see
Referring to
Since the side wall 12 is used for insulating between the focusing electrode layer 6 and the carbon layer 11, the side wall 12 is formed only between the focusing electrode layer 6 and the carbon layer 11, and the layer end of the gate electrode layer 8 and the carbon layer 11 are in a conductive state in this modification.
Referring to
The electron emission substrate section 110 has a silicon substrate 111, a drive circuit layer 112 formed on the silicon substrate 111 and a plurality of imaging elements 113 formed in a matrix shape on the drive circuit layer 112. Each imaging device 113 functions as one pixel and is made up of an electron emission element array 114 in which the plurality of electron emission elements 1 are disposed in a matrix shape. In other words, the electron emission element array 114 constituting one imaging element 113 is driven integrally. The drive circuit layer 112 is made up of a drive circuit (not illustrated) having a MOS transistor array (switch) which drives the electron emission element arrays 114 (electron emission elements 1) and a horizontal/vertical scanning circuit which controls the MOS transistor array on a silicon substrate. A plurality of electron emission element array 114 (imaging elements 113) are driven (scanned) by the drive circuit sequentially point by point.
The light reception section 120 has a transparent glass substrate 121, an anode electrode layer 122 (transparent electrode) stacked on a rear surface of the glass substrate 121 and a photoelectric conversion layer 123 stacked on a rear surface of the anode electrode layer 122. When voltage is applied to the anode electrode layer 122, holes generated in the photoelectric conversion layer 123 are accelerated by incident light from the glass substrate 121 side and a hole pattern (not illustrated) corresponding to an incident light image is formed around a rear surface of the photoelectric conversion layer 123. The mesh electrode 130 controls tracks of the emitted electrons and is disposed between the electron emission substrate section 110 and the light reception substrate section 120 to absorb surplus electrons. Although not illustrated, the light reception substrate section 120 also has circuits to supply signals or voltages needed for driving the light reception substrate section 120, to output detected video signals, and the like.
In the imaging device 100, the emitted electrons from the electron emission concave portion 10 of the electron emission substrate section 110 pass through bores 131 of the mesh electrode 130, and unite with the hole pattern grown around a front surface of the photoelectric conversion layer 123 of the light reception substrate section 120. Video images are captured by detecting current at the time of uniting as video signals. In other words, different video signals are detected in the photoelectric conversion layer 123 based on difference of accumulation amount of holes per imaging element 113 by the hole pattern which reflects the incident light image, and strength/weakness of the video signals is sensed as brightness/darkness. A color filter may be formed on a surface of the light reception substrate section 120 (glass substrate 121). In this case, capturing by color is available by taking images (videos) of R/G/B separately.
Referring to
As illustrated in
The electron emission concave portion 10 has the third insulation layer 50 film-formed at the top portion, the upper emission concave portion 10a surrounded by the layer ends of the focusing electrode layer 6 and the second insulation layer 7 and the lower emission concave portion 10b surrounded by the layer ends of the gate electrode layer 8 and the first insulation layer 5. In the upper emission concave portion 10a, the third insulation layer 50, the focusing electrode layer 6 and the second insulation layer 7 are formed such that the layer ends thereof are receded with respect to the layer ends of the gate electrode layer 8 and the first insulation layer 5, and the electron emission concave portion 10 is formed such that the upper portion is larger than the lower portion as a whole. This prevents the layer end of the gate electrode layer 8 from projecting to tracks of the emitted electrons from the surface emission portion 9. Further, the upper emission concave portion 10a is sufficiently receded by film thickness (film width) of the side wall 12 with respect to the lower emission concave portion 10b, and the carbon layer 11 and the gate electrode layer 8 are in contact with each other (conduction portion 51). This prevents the carbon layer 11 from being insulated from the gate electrode layer 8 surrounded by the side wall 12 as insulation layer.
The side wall 12 has the upper side wall 12a formed on the inner peripheral surface of the upper emission concave portion 10a (layer ends of the receded third insulation layer 50, the focusing electrode layer 6 and the second insulation layer 7) and the lower side wall 12b formed on the inner peripheral surface of the lower emission concave portion 10b (layer ends of the gate electrode layer 8 and the first insulation layer 5). Further, the carbon layer 11 is evenly film-formed to cover the surface of the gate electrode layer 8, the upper side wall 12a and the lower side wall 12b. The carbon layer 11 is not film-formed on the surface emission portion 9 as the first embodiment.
Each layer film-formed at the electrode layer portion 4 is made of same material as used in the first embodiment. The third insulation layer 50 which only the electrode layer portion 4 according to the embodiment has is made of same material as that of the first insulation layer 5 and the second insulation layer 7. Though film thickness of each layer is same as that of the first embodiment, only the first insulation layer 5 which insulates the electron emission layer 3 from the gate electrode layer 8 is film-formed having 350 nm (3500 Å) film thickness so as to sufficiently insulate therebetween.
Referring to
Since the side wall 12 is used for insulating between the focusing electrode layer 6 and the carbon layer 11, the side wall 12 is formed only between the focusing electrode layer 6 and the carbon layer 11 in the modification.
According to the structures above, in the electron emission element 1, since the side wall 12 which insulates the focusing electrode layer 6 from the carbon layer 11 prevents the focusing electrode layer 6 from conducting to the gate electrode layer 8 via the carbon layer 11, voltage having different electrical potential from that of the gate electrode layer 8 can be applied to the focusing electrode layer 6, thereby tracks of electrons can be efficiently focused. Especially, according to the embodiments except the modifications, the side wall 12 which insulates the carbon layer 11 from the focusing electrode layer 6 can be easily formed without complex film formation/etching processes. Further, since the focusing electrode layer 6 functions at lower voltage than that of the gate electrode layer 8, electrons can be emitted by low voltage as a whole.
Since the imaging device 100 having the electron emission elements 1 can focus emitted electrons on the surface of the photoelectric conversion layer 123 efficiently, it is possible to provide the imaging device 100 of a power saving type having high detection accuracy.
1: electron emission element 2: cathode electrode layer 3: electron emission layer 5: first insulation layer 6: focusing electrode layer 7: second insulation layer 8: gate electrode layer 9: surface emission portion 10: electron emission concave portion 11: carbon layer 12: side wall 12a: upper side wall 12b: lower side wall 50: third insulation layer 100: imaging device 110: electron emission substrate section 111: silicon substrate 120: light reception section 121: glass substrate 122: anode electrode layer 123: photoelectric conversion layer 130: mesh electrode
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2009/006958 | 12/17/2009 | WO | 00 | 5/31/2012 |
