Patent Application
20130106529
1. Field of the Invention
The present invention relates to electronic components and more specifically to electronic components including a built-in directional coupler.
2. Description of the Related Art
A chip-type directional coupler (hereafter, simply referred to as directional coupler) described in Japanese Unexamined Patent Application Publication No. 5-152814 is an example of a known electronic component of the related art. In this directional coupler, a multilayer structure is formed by stacking a plurality of rectangular electrode substrates on top of one another. In addition, a U-shaped stripline electrode which defines a main line (hereafter, simply referred to as a main line) and a U-shaped stripline electrode which defines a sub line (hereafter, simply referred to as a sub line) are provided on the electrode substrates. The main line is provided on a different electrode substrate than the sub line. That is, the main line and the sub line are arranged in the stacking direction. In addition, outer electrodes, to which the main line and sub line are connected, are provided on side surfaces of the multilayer structure.
There is a problem with the directional coupler described in Japanese Unexamined Patent Application Publication No. 5-152814 in that if an attempt is made to reduce the size of the directional coupler, manufacturing of the directional coupler becomes more difficult. In more detail, in the directional coupler, the outer electrodes are formed on the side surfaces of the multilayer structure. Accordingly, once a multilayer structure has been obtained by cutting a mother multilayer structure into pieces, the outer electrodes are formed on the multilayer structure by applying a conductive paste. Therefore, if the directional coupler is to be reduced in size, it is necessary to apply a conductive paste to a small multilayer structure and, therefore, it is difficult to form the outer electrodes.
In addition, there is a problem with the directional coupler described in Japanese Unexamined Patent Application Publication No. 5-152814 in that the degree of coupling between the main line and the sub line is relatively low. In more detail, the main line and the sub line are each provided on a single electrode substrate and coupled to each other in the stacking direction. Consequently, in order to increase the degree of coupling between the main line and the sub line, the layer between the main line and the sub line may be formed so as to be relatively thin so that the main line and sub line are as close to each other as possible. However, since there is a limit to how thin a dielectric layer can be made due to processing limitations, the degree of coupling between the main line and the sub line cannot be made sufficiently high.
To overcome the problems described above, preferred embodiments of the present invention provide an electronic component in which outer electrodes are easily formed and in which a main line and a sub line are coupled to each other with a high degree of coupling.
An electronic component according to a preferred embodiment of the present invention includes a multilayer body including a plurality of insulating layers that are stacked on top of one another, a main line including a first spiral-shaped portion having a first central axis that is parallel or substantially parallel to a stacking direction of the multilayer body, a sub line that is electromagnetically coupled to the main line such that a directional coupler is provided, and that includes a second spiral-shaped portion having a second central axis that is parallel or substantially parallel to the stacking direction, a first outer electrode and a second outer electrode that are provided on at least either one of end surfaces of the multilayer body disposed at opposed ends in the stacking direction and respectively electrically connected to two ends of the main line, and a third outer electrode and a fourth outer electrode that are provided on at least either one of the end surfaces of the multilayer body disposed at opposed ends in the stacking direction and respectively electrically connected to two ends of the sub line, wherein a first region in which the main line is provided and a second region in which the sub line is provided are superposed with each other in the stacking direction.
According to various preferred embodiments of present invention, outer electrodes are easily formed and a main line and a sub line are coupled to each other with a high degree of coupling.
The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings.
Hereafter, an electronic component according to various preferred embodiments of the present invention will be described.
Hereafter, the structure of an electronic component according to a preferred embodiment of the present invention will be described with reference to the drawings.
As illustrated in
As illustrated in
The multilayer body 12, as illustrated in
The outer electrodes 14a and 14b, as illustrated in
In addition, the outer electrodes 14c and 14d, as illustrated in
The main line ML is connected between the outer electrodes 14a and 14b and, as illustrated in
The signal conductors 18 are preferably made of a conductive material and are configured such that line-shaped conductors thereof have a bent shape. Hereafter, when viewed in plan from the positive side in the z-axis direction, an end portion of each signal conductor 18 on the upstream side in the clockwise direction will be referred to as an upstream end and an end portion of each signal conductor 18 on the downstream side in the clockwise direction will be referred to as a downstream end.
The via-hole conductors b2 to b6 respectively penetrate through the insulating layers 16b to 16f in the z-axis direction and connect the signal conductors 18 to each other. In more detail, the via-hole conductor b2 connects a downstream end of the signal conductor 18a and an upstream end of the signal conductor 18b to each other. The via-hole conductor b3 connects a downstream end of the signal conductor 18b and an upstream end of the signal conductor 18c to each other. The via-hole conductor b4 connects a downstream end of the signal conductor 18c and an upstream end of the signal conductor 18d to each other. The via-hole conductor b5 connects a downstream end of the signal conductor 18d and an upstream end of the signal conductor 18e to each other. The via-hole conductor b6 connects a downstream end of the signal conductor 18e and an upstream end of the signal conductor 18f to each other.
The via-hole conductor b1, as illustrated in
The via-hole conductors b7 to b12, as illustrated in
The sub line SL is connected between the outer electrodes 14c and 14d and is electromagnetically coupled with the main line ML such that a directional coupler is provided. The sub line SL, as illustrated in
The spiral-shaped portion Sp2 is preferably a signal line that has a spiral shape that extends from the negative side towards the positive side in the z-axis direction while looping counterclockwise when viewed in plan from the positive side in the z-axis direction. That is, the spiral-shaped portion Sp2 has a central axis Ax2 that is parallel or substantially parallel to the z-axis direction. The central axis Ax2, as illustrated in
The signal conductors 19 are each preferably made of a conductive material and are configured such that line shaped conductors thereof have a bent shape. Hereafter, when viewed in plan from the positive side in the z-axis direction, an end portion of each signal conductor 19 on the upstream side in the counterclockwise direction will be referred to as an upstream end and an end portion of each signal conductor 19 on the downstream side in the counterclockwise direction will be referred to as a downstream end.
The via-hole conductors b22 to b25 respectively penetrate through the insulating layers 16f, 16e, 16d and 16c in the z-axis direction and connect the signal conductors 19 to one another. In more detail, the via-hole conductor b22 connects a downstream end of the signal conductor 19a and an upstream end of the signal conductor 19b to each other. The via-hole conductor b23 connects a downstream end of the signal conductor 19b and an upstream end of the signal conductor 19c to each other. The via-hole conductor b24 connects a downstream end of the signal conductor 19c and an upstream end of the signal conductor 19d to each other. The via-hole conductor b25 connects a downstream end of the signal conductor 19d and an upstream end of the signal conductor 19e to each other.
The via-hole conductors b20 and b21, as illustrated in
The via-hole conductors b26 to b31, as illustrated in
In addition, in the electronic component 10a, the signal lines 18b, 18c, 18d, 18e and 18f and the signal conductors 19e, 19d, 19c, 19b and 19a are provided on the same insulating layers 16.
In the electronic component 10a, preferably, the outer electrode 14a is used as an input port, the outer electrode 14b is used as a main output port, the outer electrode 14c is used as a monitor output port and the outer electrode 14d is used as a 50Ω termination port, for example.
Next, a non-limiting example of a method of manufacturing the electronic component 10a will be described while referring to
First, ceramic green sheets that will become the insulating layers 16 are prepared. Next, the via-hole conductors b1 to b12 and b20 to b31 are formed in the ceramic green sheets that will become the insulating layers 16. When forming the via-hole conductors b1 to b12 and b20 to b31, via holes are formed by irradiating the ceramic green sheets that will become the insulating layers 16 with a laser beam. Next, the via holes are filled with a conductive paste preferably made of, for example, Ag, Pd, Cu, Au or an alloy of any of these metals using a method, such as printing.
Next, the signal conductors 18 and 19 are formed on the front surfaces of the ceramic green sheets that will become the insulating layers 16b to 16g by applying a conductive paste preferably including a main component of Ag, Pd, Cu, Au or an alloy of any of these metals, for example, by using a method, such a screen printing method or a photolithography method, for example. At the time of forming the signal conductors 18 and 19, filling of the via holes with a conductive paste may be performed.
In addition, the outer electrodes 14a to 14d are formed on the front surface of the ceramic green sheet that will become the insulating layer 16a and the back surface of the ceramic green sheet that will become the insulating layer 16h by applying a conductive paste preferably including a main component of Ag, Pd, Cu, Au or an alloy of any of these metals, for example, by using a method, such a screen printing method or a photolithography method, for example.
Next, the ceramic green sheets are stacked on top of one another. Specifically, the ceramic green sheets that will become the insulating layers 16a to 16h are stacked and press bonded together one at a time in order from the positive side to the negative side in the z-axis direction. A mother multilayer body is formed through the above-described steps. The mother multilayer body is subjected to permanent press bonding using, for example, a hydrostatic press.
Next, the multilayer body 12 having desired dimensions is obtained by cutting the mother multilayer body using a cutting blade. Thereafter, the yet-to-be-fired multilayer body 12 is subjected to de-binder treatment and is then fired.
A fired multilayer body 12 is obtained through the above-described steps. The multilayer body 12 is then subjected to barrel processing and chamfering.
Finally, Ni/Sn plating is performed on the front surfaces of the outer electrodes 14. The electronic component 10a illustrated in
In the electronic component 10a, the outer electrodes can be easily formed. In more detail, in the electronic component 10a, the outer electrodes 14 are provided on the end surfaces S1 and S2 of the multilayer body 12. Consequently, the outer electrodes 14 can be formed on the ceramic green sheets prior to stacking of the ceramic green sheets by using a method, such as screen printing, for example. That is, there is no need to form the outer electrodes 14 on a small post-cutting multilayer body 12. Consequently, the outer electrodes 14 can be easily formed.
In addition, in the electronic component 10a, it is possible for the main line ML and the sub line SL to be coupled to each other with a high degree of coupling. In more detail, in the electronic component 10a, as illustrated in
In addition, in the electronic component 10a, the central axis Ax1 and the central axis Ax2 are superposed with each other when viewed in plan from the z-axis direction. Consequently, most of the electric field and the magnetic field generated by the main line ML passes through the inside of the sub line SL and most of the electric field and the magnetic field generated by the sub line SL passes through the inside of the main line ML. As a result, the main line ML and the sub line SL are coupled to each other with a higher degree of coupling.
In addition, in the electronic component 10a, the signal conductors 18 that define the spiral-shaped portion Sp1 of the main line ML and the signal conductors 19 that define the spiral-shaped portion Sp2 of the sub line SL are preferably provided on the same insulating layers. Therefore, stray capacitances between the signal conductors 18 and 19 are greatly reduced. Consequently, capacitive coupling of the signal conductors 18 and the signal conductors 19 and deterioration of isolation characteristics are effectively prevented.
Hereafter, an electronic component 10b according to a first modification of a preferred embodiment of the present invention will be described with reference to the drawings.
In the electronic component 10a, the outer electrodes 14a to 14d are provided on the multilayer body 12. In contrast, in the electronic component 10b, as illustrated in
In addition, in the electronic component 10a, only the main line ML and the sub line SL are provided inside the multilayer body 12. In contrast, in the electronic component 10b, as illustrated in
The outer electrode 14e is arranged so as to be interposed between the outer electrodes 14a and 14b on the end surface S1. The outer electrode 14f is arranged so as to be interposed between the outer electrodes 14c and 14d on the end surface S2.
An insulating layer 16i is provided between the insulating layer 16a and the insulating layer 16b. Via-hole conductors b41 and b42 are provided in the insulating layer 16i. The via-hole conductor b41 connects the via-hole conductor b1 and the via-hole conductor b2 to each other. The via-hole conductor b42 connects the via-hole conductor b11 and the via-hole conductor b12 to each other.
In addition, the ground conductor 22a preferably has a rectangular or substantially rectangular shape and is provided on the front surface of the insulating layer 16i. The ground conductor 22a is connected to the outer electrode 14e via a via-hole conductor b43 provided in the insulating layer 16a. However, the ground conductor 22a is insulated from the via-hole conductors b41 and b42.
An insulating layer 16j is provided between the insulating layer 16g and the insulating layer 16h. Via-hole conductors b44 and b45 are provided in the insulating layer 16j. The via-hole conductor b44 connects the via-hole conductor b20 and the via-hole conductor b21 to each other. The via-hole conductor b45 connects the via-hole conductor b30 and the via-hole conductor b31 to each other.
In addition, the ground conductor 22b preferably has a rectangular or substantially rectangular shape and is provided on the front surface of the insulating layer 16j. The ground conductor 22b is connected to the outer electrode 14f via via-hole conductors b46 and b47 provided in the insulating layers 16j and 16h. However, the ground conductor 22b is insulated from the via-hole conductors b44 and b45.
In the electronic component 10b, preferably the outer electrode 14a is used as an input port, the outer electrode 14b is used as a main output port, the outer electrode 14c is used as a monitor output port, the outer electrode 14d is used as a 50Ω termination port, and the outer electrodes 14e and 14f are used as ground ports, for example.
In the electronic component 10b, the spiral-shaped portions Sp1 and Sp2 are interposed between the ground conductors 22a and 22b on either side in the z-axis direction. Consequently, intrusion of noise to the spiral-shaped portions Sp1 and Sp2 is prevented or minimized.
In addition, the impedances of the main line ML and the sub line SL can be set to desired values by adjusting the distance between the ground conductor 22a and the spiral-shaped portion Sp1 and the distance between the ground conductor 22b and the spiral-shaped portion Sp2, respectively.
Hereafter, an electronic component 10c according to a second modification of a preferred embodiment of the present invention will be described with reference to the drawings.
In the electronic component 10b, only the main line ML, the sub line SL, and the ground conductors 22 are provided inside the multilayer body 12. In contrast, in the electronic component 10c, as illustrated in
Insulating layers 16k and 16l are provided between the insulating layer 16i and the insulating layer 16b. Via-hole conductors b47 and b48 are provided in the insulating layer 16k. Via-hole conductors b49 and b50 are provided in the insulating layer 16l. The via-hole conductors b47 and b49 connect the via-hole conductor b41 and the via-hole conductor b2 to each other. The via-hole conductors b48 and b50 connect the via-hole conductor b42 and the via-hole conductor b11 to each other.
Capacitor conductors 24a and 24b are provided on the front surface of the insulating layer 16k. The capacitor conductors 24a and 24b face the ground conductor 22a such that the capacitors C1 and C2 are respectively defined. In addition, the capacitor conductors 24a and 24b are respectively connected to the via-hole conductors b41 and b42. In this manner, the capacitors C1 and C2 are connected between the two ends of the spiral-shaped pattern Sp1 and the outer electrode 14e.
A capacitor conductor 26 is provided on the front surface of the insulating layer 16l. The capacitor conductor 26 faces the capacitor conductors 24a and 24b and thereby the capacitor C3 is defined. In this manner, the capacitor C3, as illustrated in
The above-described capacitors C1 to C3 define a R type low-pass filter. Thus, noise generated by the main line ML is effectively prevented or minimized.
Hereafter, an electronic component 10d according to a third modification of a preferred embodiment of the present invention will be described with reference to the drawings.
In the electronic component 10b, only the main line ML, the sub line SL, and the ground conductors 22 are provided inside the multilayer body 12. In contrast, in the electronic component 10d, as illustrated in
Insulating layers 16k and 16l are provided between the insulating layer 16g and the insulating layer 16j. Via-hole conductors b51 and b52 and a connection conductor 30 are provided in and on the insulating layer 16k. Via-hole conductors b53 and b54 are provided in the insulating layer 16l. The via-hole conductors b51 and b53 connect the via-hole conductor b21 and the via-hole conductor b44 to each other. The via-hole conductors b52 and b54 and the connection conductor 30 connect the via-hole conductor b30 and the via-hole conductor b45 to each other.
Resistor conductors 32a and 32b, which define the resistors R1 and R2, are provided on the front surface of the insulating layer 16l. The resistor conductors 32a and 32b are preferably made of a high-resistance material and have a meandering shape, for example. One end of the resistor conductor 32a and one end of the resistor conductor 32b are respectively connected to the via-hole conductors b51 and b52. The other ends of the resistor conductors 32a and 32b are connected to each other. The other ends of the resistor conductors 32a and 32b are connected to the ground conductor 22b via a via-hole conductor b55 provided in the insulating layer 16. In this manner, the resistors R1 and R2 are respectively provided between the two ends of the spiral-shaped portion Sp2 and the outer electrode 14f.
A portion through which the outer electrode 14c and the sub line SL are connected to each other is connected to a ground electrode 14f via the resistor R1 and a portion through which the outer electrode 14d and the sub line SL are connected to each other is connected to the ground electrode 14f via the resistor R2. Here, the resistors R1 and R2 function as attenuators and signals output from the monitor output port and the 50Ω termination port are effectively attenuated to desired values.
Hereafter, an electronic component 10e according to a fourth modification of a preferred embodiment of the present invention will be described with reference to the drawings.
In the electronic component 10e, a signal conductor 19f and via-hole conductors b32 and b33 are added to the electronic component 10a. The signal conductor 19f is a line-shaped conductor that defines a portion of the sub line SL and is provided on the insulating layer 16b. That is, the signal conductor 19f is provided on the same insulating layer 16b as the signal conductor 18a.
Hereafter, when viewed in plan from the positive side in the z-axis direction, an end portion of each signal conductor 19 on the upstream side in the counterclockwise direction will be referred to as an upstream end and an end portion of each signal conductor 19 on the downstream side in the counterclockwise direction will be referred to as a downstream end. The via-hole conductors b32 and b33 penetrate through the insulating layer 16b in the z-axis direction. The via-hole conductor b32 connects a downstream end of the signal conductor 19e and an upstream end of the signal conductor 19f to each other. The via-hole conductor b33 connects a downstream end of the signal conductor 19f and the via-hole conductor b26 to each other.
As described above, the signal conductors 18a, 18b, 18c, 18d, 18e and 18f and the signal conductors 19f, 19e, 19d, 19c, 19b and 19a are preferably provided on the same insulating layers 16. That is, in the electronic component 10e, signal conductors 19 are preferably provided on all of the insulating layers 16 on which signal conductors 18 are provided.
In the electronic component 10e, signal conductors 19 are preferably provided on all of the insulating layers 16 on which signal conductors 18 are provided. Therefore, the main line ML and the sub line SL are coupled to each other with a higher degree of coupling.
Hereafter, an electronic component 10f according to a fifth modification of a preferred embodiment of the present invention will be described with reference to the drawings.
In the electronic component 10f, the two ends of the main line ML are respectively connected to the outer electrodes 14a and 14d. In addition, the two ends of the sub line SL are respectively connected to the outer electrodes 14b and 14c. That is, in the electronic component 10f, the two ends of the main line ML and the two ends of the sub line SL extend to the mutually opposing end surfaces S1 and S2.
By configuring the outer electrodes 14a to 14d of the electronic component 10f in this manner, the number of ways in which the electronic component 10f can be connected to a circuit board is increased while continuing to maintain a high degree of coupling. Consequently, the degree of freedom in designing the circuit board is increased.
The electronic components 10a to 10f described in the preferred embodiments are not limited to the described configurations and can be modified within the scope of the present invention.
In the electronic components 10a to 10f, the central axes Ax1 and Ax2 preferably coincide or substantially coincide with and are superposed with each other when viewed in plan from the z-axis direction. However, the central axes Ax1 and Ax2 need not coincide or substantially coincide with and be superposed with each other. For example, by not having the central axes Ax1 and Ax2 coincide or substantially coincide with each other when viewed in plan from the z-axis direction, but by rather adjusting the distance between the central axes Ax1 and Ax2, the degree of coupling between the sub line SL and the main line ML may be freely adjusted to a desired state. However, it is also preferable in this case that the spiral-shaped portions Sp1 and Sp2 be superposed with each other when viewed in plan from the z-axis direction.
In addition, preferably, the outer electrodes 14a and 14b are provided on the end surface S1 and the outer electrodes 14c and 14d are provided on the end surface S2, but the arrangement of the outer electrodes 14a to 14d is not limited to this. At least one of the outer electrodes 14a and 14b may be provided on the end surface S2 and at least one of the outer electrodes 14c and 14d may be provided on the end surface S1. As described above, preferred embodiments of the present invention are useful in electronic components and are particularly excellent in that outer electrodes can be easily formed and a main line and a sub line are coupled to each other with a high degree of coupling.
While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-153994 | Jul 2010 | JP | national |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2011/060957 | May 2011 | US |
| Child | 13721144 | US |
