1. Field of the Disclosure
Embodiments of the present disclosure relate to electronic devices, and particularly to an electronic device having a reverse connection protection circuit.
2. Description of Related Art
Many electronic devices are powered by direct current (DC) power supply. If the electronic devices are reversely connected to the DC power supply, the electronic device may be damaged. Thus, reverse connection protection circuits are used in the electronic device.
Referring to
However, the diode D1 has a large impedance, and, proportionally, a large voltage drop will be across the diode D1 under a low-input-voltage condition. Therefore, in order to drive the operation circuit 300, a voltage with a quite big value is inevitably to be provided, which is reverse to our energy saving idea today. Especially, the large impedance of the diode D1 will lead to high power consumption.
Therefore, an improved reverse connection protection device capable of protecting an electronic device from being damaged by a reverse connection to a power supply is needed to address the aforementioned deficiency and inadequacies.
Other advantages and novel features of the present invention will become more apparent from the following detailed description of preferred embodiment when taken in conjunction with the accompanying drawings.
References will now be made to the drawings to describe certain inventive embodiments of the present disclosure.
Referring to
The power input connector 500 is used for receiving and transmitting the input voltage Vin to the reverse connection protection circuit 600. The power input connector 500 includes a positive input terminal 502 and a negative input terminal 504 for connecting to the DC power supply to receive an input voltage Vin.
The reverse connection protection circuit 600 is connected between the power input connector 500 and the operation circuit 700. The reverse connection protection circuit 600 is configured for preventing the operation circuit 700 from damages caused by reverse current/voltages.
In this embodiment, the reverse connection protection circuit 600 includes a field effect transistor (FET) Q1 and a resistor R1. The FET Q1 is a P-Channel enhancement type FET. A source S of the FET Q1 is connected to the positive input terminal 502 of the power input connector 500. A drain D of the FET Q1 is connected to the operation circuit 700. A gate G of the FET Q1 is connected to a terminal of the resistor R1. The other terminal of the resistor R1 is connected to the negative input terminal 504 of the power input connector 500 and the operation circuit 700.
In operation, when the input voltage Vin is positive, a voltage difference between the source and gate of the FET Q1 is positive, and substantially equals to the input voltage Vin. Thus the FET Q1 turns on. Because an on-state drain-to-source impedance of an FET is very small, about 0.05 ohms, only a small proportion of a voltage drop will be supplied to the FET Q1 and is negligible. Thus, the input voltage Vin is substantially the same across the operation unit 700. Therefore the operation of the operation circuit 700 will not be affected. Furthermore, power consumption of the FET Q1 is low.
When the input voltage Vin is negative, the voltage difference between the source and gate of the FET Q1 is negative. Thus the FET Q1 turns off. No power is transmitted to the operation unit 700.
Because of an effect produced by a capacitance across the source and gate of the FET Q1, the FET Q1 may generate a surge current that flows through the source and gate of the FET Q1. The resistor R1 is used for reducing the surge current and protecting the FET Q1.
It is to be understood, however, that even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the present disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
Number | Date | Country | Kind |
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200810300223.4 | Jan 2008 | CN | national |