Patent Application
20080094380
For a better understanding of the invention, embodiments will now be described, purely by way of example, with reference to the accompanying drawings in which:
It should be noted that none of the Figures are to scale. Like or corresponding components are generally given the same reference numeral in different Figures.
In order to drive the liquid crystal cell 16 to a desired voltage to obtain a required grey level, an appropriate analogue signal is provided on the column conductor 12 in synchronism with a row address pulse on the row conductor 10. This row address pulse turns on the thin film transistor 14, thereby allowing the column conductor 12 to charge the liquid crystal cell 16 to the desired voltage, and also to charge the storage capacitor 20 to the same voltage. At the end of the row address pulse, the transistor 14 is turned off, and the storage capacitor 20 maintains a voltage across the cell 16 when other rows are being addressed. The storage capacitor 20 reduces the effect of liquid crystal leakage and reduces the percentage variation in the pixel capacitance caused by the voltage dependency of the liquid crystal cell capacitance.
The rows are addressed sequentially so that all rows are addressed in one frame period, and refreshed in subsequent frame periods.
As shown in
The row address circuitry operates to provide a desired row voltage waveform to the rows of pixels in turn. The row address circuitry generally comprises a row voltage generation part, which generates the different row voltage levels which form the basis of the row address signal, timing/control circuitry for generating the row address signal, and a latching circuit which operates to latch the row address signal to the rows of pixels in turn. The row address signal may be a two-level signal, but there are a number of different drive schemes, some of which require multiple level row address signal waveforms. These will be apparent to those skilled in the art.
The frame (field) period for active matrix display devices requires a row of pixels to be addressed in a short period of time, and this in turn imposes a requirement on the current driving capabilities of the active matrix pixel transistor in order to charge or discharge the liquid crystal material to the desired voltage level. In order to meet these current requirements, the gate voltage supplied to the thin film transistor may need to fluctuate between values separated by approximately 30 volts. This requirement needs the row driver circuitry to be implemented using high voltage components. The generation of multiple voltage levels within the row driver circuit is typically achieved using charge pump circuits. These may be considered to be part of the row or column driver circuitry or else they may be provided as separate elements.
The invention relates to electronic devices which include two (or more) array substrates. Devices of this type are becoming increasingly popular. For example, a mobile telephone may be provided with a smaller lower resolution display on an outside casing, which can be viewed with the telephone in a closed position, and a larger higher resolution display may be provided in an inside surface, and which is revealed when the telephone casing is opened up.
A part 60 of the circuitry of the first device 52 is provided on the on the first substrate 56, but another part 62 is provided on the second substrate 58. This part 62 may comprise part of the row and/or column driver circuitry, and/or it may comprise other circuit elements providing and/or processing signals associated with the rows and/or columns of pixels.
The control/drive circuitry for the first device 52 is thus distributed over two substrates. This can enable the costs associated with a defect in the row and column driver circuitry to be minimised. As shown in
The second device 54 may be smaller, and/or it may have lower resolution and/or it may be black and white instead of colour.
The control circuitry for the second device 54, namely row 64 and column 66 address circuits are provided on the second substrate 58, although there will be additional circuit functions performed by separate external integrated circuits 68. As shown schematically in
The first active matrix array device 52 will typically comprise an active matrix display, for example a liquid crystal display or an electroluminescent display. The second active matrix array device may also comprise a display, but it may be an image sensor device or a touch sensing device, such as a fingerprint sensor.
As shown, a part 62 of the row or column driver circuitry of the first device 52 is provided on the second substrate 58. In deciding which circuit functions will be transferred to the second substrate, the complexity of the interconnect between the substrates which would be required is taken into account. The complete row and column addressing circuitry is preferably not transferred because of the large number of signal connections that would be required. It is desirable to lower the complexity of the circuits carried on the first substrate, for example by transferring circuit functions such as digital to analogue converter circuits, charge pump circuits, control or timing circuits and memory circuits. These functions require relatively few connections but may significantly affect the yield of the first device 52.
Latching circuits or multiplexing circuitry (which have large numbers of outputs) may remain on the substrate 56 of the first device 52.
By reducing the complexity of the circuitry on the first substrate 56, the border width can be minimised. This first device will typically be the main full function display of a device, and for hand held devices, it is generally desirable for the display to occupy the maximum possible area. The border area of the second device will generally be less critical, and this area can be increased to accommodate the additional circuitry without compromising the design of the overall device.
The two pixel arrays may be formed using a low temperature polysilicon process, which is suitable for the integration of IC functions. The two pixel arrays may be formed using the same technology, but the technology may instead be optimised differently on the two substrates. For example, a higher performance technology with better design rules and improved TFT characteristics may be applied to the second substrate which carries the more complex circuitry even though this may also carry the array device with the lower performance requirements. For example, the first pixel array may formed using an amorphous silicon process (and which is less suitable for the formation of integrated circuit components) and the second pixel array is formed using a low temperature polysilicon process. Alternatively different types of LTPS process may be used for the two substrates.
The invention can be applied to devices with two displays, as in the example above, and these displays may be combinations of LCDs, polymer or organic LED display devices. The displays may be active matrix or passive matrix devices or a combination of these. The invention is not, however, limited to multiple display devices, and one or both of the devices may be an image sensing array, a fingerprint sensing array or a touch input device. The second device may also be a passive matrix device.
A device in accordance with the invention may have more than two array devices, and the sharing of circuitry may then be between more than two substrates.
One of the two array devices may be a linear array device (i.e. 1×N), for example a linear scanning array, and the term “array” used in this description and claims is intended to cover the possibility of at least one device being a linear array device.
Other examples will be apparent to those skilled in the art.
| Number | Date | Country | Kind |
|---|---|---|---|
| 0411314.8 | May 2004 | GB | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/IB05/51626 | 5/19/2005 | WO | 00 | 11/20/2006 |
