1. Technical Field
The present disclosure relates to electronic devices and, particularly, to an electronic device that can be controlled remotely.
2. Description of Related Art
Some electronic devices have remote control functions. To save power, such an electronic device often can work in a standby mode in which only a signal receiving module thereof is activated (thus consuming less power) for detecting incoming control signals and then all modules thereof are activated for normal working operations. However, it is not uncommon that the electronic devices can be activated by some random or unauthorized control signals, thus reducing the power efficiency of these electronic devices having this standby feature.
Therefore, it is desirable to provide an electronic device, which can overcome the above-mentioned limitations.
Many aspects of the present electronic device should be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present electronic device. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
Embodiments of the present electronic device will now be described in detail with reference to the drawings.
Referring to
The receiving module 10 is configured for receiving external wireless signals. In this embodiment, the receiving module 10 includes an antenna 12 and a filter 14. The antenna 12 is configured for receiving the wireless signals. The filter 14 is configured for filtering the wireless signals to remove noise.
The controller 20 is connected to the receiving module 10 and configured for processing the control signal and controlling the electronic device 100 to perform various functions according to the control signal. The controller 20 includes a clocker 22 and a decoder 24. The clocker 22 is configured for generating timing signals and sending the generated timing signals to the checking module 30. The decoder 24 is configured for decoding the control signal and sending the decoded control signal to back-end components (not shown) of the electronic device 100 for further processing or controlling. The controller 20 can control the electronic device 100 to work in a standby mode and a normal mode. In the standby mode, the decoder 24 and the back-end components of the electronic device 100 are deactivated and thus the electronic device 100 consumes less power. In the normal mode, the decoder 24 and the back-end components of the electronic device 100 are activated for normal working operations and thus the controller 20 consumes more power. The controller 20 is programmed to switch the electronic device 100 into the standby mode if no external signal is received by the receiving module 10 after a predetermined time period. The controller 20 switches the electronic device 100 into the normal mode when an activation signal is received.
The checking module 30 includes a first terminal 31, a second terminal 32, and a third terminal 33. The first terminal 31 is connected to the receiving module 10 for receiving the wireless signals. The second terminal 32 is connected to the clocker 22 for receiving timing signals. The third terminal 33 is connected to the decoder 24. The checking module 30 is configured for checking if the check codes of a current wireless signal match predetermined values and, if yes, generates the activation signal.
The activation signal is transmitted to the decoder 24 via the third terminal 33 to activate the controller 20. It is assumed that if the first three codes of the current wireless signal are all logic high levels “111”, the current wireless signal is the control signal and the activation signal is generated.
Referring to
The input terminals D of the register U1, U2, and U4 are connected to the first terminal 31. The output terminal Q of the second register U2 is connected to the input terminal D of the third register U3. The output terminal Q of the fourth register U4 is connected to the input terminal D of the fifth register U5. The output terminal Q of the fifth register U5 is connected to the input terminal D of the sixth register U6. The clocking terminals C of the registers U1˜U6 are connected to the second terminal 32. The output terminal Q of the registers U1, U3, and U6 are connected to input ends of the adder U7. The output end of the adder U7 is connected to the third terminal 33.
Thus, the checking module 30 sequentially samples codes of the current wireless signal and only when the first three codes of the current wireless signal turn out to be three high logic levels “111”, the output end of the adder U7 (i.e., the third terminal 33) outputs a high logic level “1” as the activation signal.
The checking module 30 is not limited to this embodiment but should be changed according to the structure of the checking codes of the control signal. For example, if the checking codes of the control signal only include the first code, then the circuits 35 and 36 can be omitted. If the check codes of the control signal only include the first two codes, then the third circuit 36 can be omitted. In all, if the checking codes of the control signal include the first n codes (n is a positive integer) the checking module needs to employ n circuits, wherein the i-th circuit includes i serially connected registers (i is a positive integer and i≦n).
It will be understood that the above particular embodiments and methods are shown and described by way of illustration only. The principles and the features of the present disclosure may be employed in various and numerous embodiment thereof without departing from the scope of the disclosure as claimed. The above-described embodiments illustrate the scope of the disclosure but do not restrict the scope of the disclosure.
Number | Date | Country | Kind |
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2009 1 0306824 | Sep 2009 | CN | national |
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5761617 | Yonekura et al. | Jun 1998 | A |
6920342 | Reiner | Jul 2005 | B2 |
7437132 | Hanabusa et al. | Oct 2008 | B2 |
Number | Date | Country | |
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20110057768 A1 | Mar 2011 | US |