1. Technical Field
The present disclosure relates to electronic devices, and particularly to an electronic device with an interface module.
2. Description of Related Art
Many electronic devices can exchange data with an external device using a wireless or a wired connection. In one such wired connection, the electronic device may be provided with a USB port to be connected to the external device. However even when the USB port is not in use, the electronic device still provides operating voltage to the USB port, thus energy is wasted.
Therefore, there is room for improvement in the art.
Many aspects of the embodiments can be better understood with references to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout two views.
Referring to
The power source 11 is used for providing an operating voltage.
The switch 12 is used for switching the processor 13 between a first mode and a second mode. When the switch 12 is turned off, the processor 13 switches to the first mode, and generates a first control signal and a driving signal. When the switch 12 is turned on, the processor 13 switches to the second mode, and generates a second control signal and stop generating the driving signal. In the embodiment, the first control signal is a low level signal, and the second control signal and the driving signal are high level signals.
The OPU 14 is used for emitting laser beams onto the optical disk 20 in response to the driving signal and receiving reflected laser beams from the optical disk 20 to reproduce information from the optical disk 20 or record information to the optical disk 20.
The switching module 16 is used for controlling an electrical connection between the power source 11 and the protecting module 17. In response to the first control signal, the switching module 16 is turned off. The switching module 16 cuts off the electrical connection between the power source 11 and the protecting module 17 and stops providing operating voltage to the protecting module 17. In response to the second control signal, the switching module 16 is turned on. The power source 11 connects with the protecting module 17 and provides operating voltage to the protecting module 17.
The interface module 18 is used for exchanging data with an external device. In the embodiment, the interface module 18 is a USB port.
The protecting module 17 is used for detecting whether a current flowing through the protecting module 17 is at least a predetermined value, and controlling the electrical connection between the switching module 16 and the interface module 18 based on the result. If the current is at least the predetermined value, the protecting module 17 establishes an electrical connection between the switching module 16 and the interface module 18. If the current is less than the predetermined value, the protecting module 17 cuts off the electrical connection between the switching module 16 and the interface module 18. In the embodiment, the predetermined value is 500 mA.
Referring to
The processor 13 includes a first pin A1 and a second pin A2. The first pin A1 is electrically connected to the switching module 16. The second pin A2 is electrically connected to the OPU 14.
The switching module 16 includes a first resistor R1, a second resistor R2, a first transistor Q1, and a second transistor Q2. The first resistor R1 is electrically connected between a collector of the first transistor Q1 and voltage source V1. The second resistor R2 is electrically connected between the first pin A1 and a base of the first transistor Q1. An emitter of the first transistor Q1 is grounded. A source of the second transistor Q2 is electrically connected to the voltage source V1. A drain of the second transistor Q2 is electrically connected to the protecting module 17. A gate of the second transistor Q2 is electrically connected to the collector of the first transistor Q1. In the embodiment, the first transistor Q1 is an NPN type bipolar junction transistor. The second transistor Q2 is a p-channel enhancement type metal oxide semiconductor field effect transistor.
The protecting module 17 includes a fuse P1, a capacitor C1, and a third resistor R3. The fuse P1 is electrically connected between the drain of the transistor Q2 and the interface module 18. The capacitor C1 is electrically connected between the drain of the transistor Q2 and ground. The third resistor R3 is electrically connected between an end of fuse P1 which is electrically connected with the interface module 18 and ground. In the embodiment, the fuse P1 is a recoverable fuse. When the current is at least 500 mA, the fuse P1 is switch to a high-impedance status. When the current is less than 500 mA, the fuse P1 is switch to a low resistance status.
The interface module 18 includes a third pin A3. The third pin A3 is electrically connected to the drain of the second transistor Q2 through the fuse P1. In the embodiment, the interface module 18 is a USB port.
When the switch S is turned off, the processor 13 generates the first control signal through the first pin A1 and the driving signal through the second pin A2. The OPU 14 is powered on based on the driving signal. The difference in voltage between the base of the first transistor Q1 and the emitter of the first transistor Q1 is less than 0.7V. The gate of the second transistor Q2 is pushed to voltage source V1. The difference in voltage between the gate of the second transistor Q2 and the source of the second transistor Q2 is equal to 0V. The second transistor Q2 is turned off. The third pin A3 is at a low level. As a result, the electronic device 100 can not exchange data with the external device.
When the switch S is turned on, the processor 13 generates the second control signal through the first pin A1. The difference in voltage between the base of the first transistor Q1 and the emitter of the first transistor Q1 is more than 0.7V. The transistor Q1 is turned on. The gate of the second transistor Q2 is pulled to ground. The difference between the gate of the second transistor Q2 and the source of the transistor Q2 is less than the 0V. The second transistor Q2 is turned on. The voltage source V1 supply is operating voltage to the third pin A3 through the fuse P. The third pin A3 is at a high level. Consequently, the electronic device 100 can exchange data with the external device.
When the processor 13 is in the second mode, if the voltage of the voltage source V1 rises to a high level, and the current flowing through the fuse P is at least 500 mA, the fuse P then switches to a high-impedance status, and the third pin A3 is at a low level. Thus, the electronic device 100 cannot exchange data with the external device.
As described, when there is no need to power on the interface module 18, the power source 11 will stop supplying operating voltage. Therefore, energy can be saved.
It is to be understood, however, that even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; and that changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
Number | Date | Country | Kind |
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201010612549.8 | Dec 2010 | CN | national |