Electronic device

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an equivalent circuit diagram illustrating an example of a configuration of an electronic device according to a first embodiment of the present invention.

FIG. 2 is a view schematically illustrating an example of a circuit arrangement according to the first embodiment.

FIG. 3 is a cross-sectional view taken along the line A-A′ in FIG. 2.

FIG. 4 is an equivalent circuit diagram illustrating an example of a configuration of an electronic device according to a second embodiment of the present invention.

FIG. 5 is an equivalent circuit diagram illustrating an example of a configuration of an electronic device according to a third embodiment of the present invention.

FIG. 6 is an equivalent circuit diagram illustrating an example of a configuration of an electronic device according to a fourth embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram illustrating an example of a configuration of an electronic device according to a fifth embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating an example of a configuration of an electronic device according to an eighth embodiment of the present invention and corresponds to a cross-sectional view taken along the line C-C′ in FIG. 2.

FIG. 9 is an equivalent circuit diagram illustrating an example of a configuration of a conventional RF power amplifier.

FIG. 10 is a view schematically illustrating an example of a circuit configuration of conventional RF power amplifiers.

FIG. 11 is an equivalent circuit diagram illustrating an example of a configuration of RF power amplifiers for a conventional multiband system.

FIG. 12 is a view illustrating an example of a configuration of a conventional hybrid integrated circuit including RF power amplifiers for five systems.

FIG. 13 is a cross-sectional view taken along the line B-B′ in FIG. 12.

DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1

Hereinafter, an electronic device according to a first embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is an equivalent circuit diagram showing an example of a configuration of the electronic device of this embodiment. As shown in FIG. 1, the electronic device of this embodiment includes RF power amplifiers 1, 2, 3, 4 and 5 for five systems. Each of the RF power amplifiers 1 and 2 for two systems has a three-stage amplifying configuration. Specifically, the RF power amplifier 1 includes transistors 6, 7 and 8, which are three bipolar transistors connected in series, and the RF power amplifier 2 includes transistors 9, 10 and 11, which are three bipolar transistors connected in series. Each of the RF power amplifiers 3, 4 and 5 for three systems has a two-stage amplifying configuration. Specifically, the RF power amplifier 3 includes transistors 12 and 13, which are two bipolar transistors connected in series, the RF power amplifier 4 includes transistors 14 and 15, which are two bipolar transistors connected in series, and the RF power amplifier 5 includes transistors 16 and 17, which are two bipolar transistors connected in series. In the RF power amplifiers 1 through 5, input matching circuits 18, 19, 20, 21 and 22 are connected to the respective input sides of the first-stage transistors and base bias circuits 23, 24, 25, 26 and 27 are connected to the respective base sides of the respective transistors. In addition, inter-stage matching circuits 28, 29, 30, 31, 32, 33 and 34 each for establishing matching between transistors at cascadable stages and bias circuits for supplying base current so as to obtain desired collector current from the respective transistors are provided. In this embodiment, the RF power amplifiers 1 through 5 for the five systems described above are integrated in a monolithic microwave integrated circuit and the integrated circuit is sealed in one package 35.

The electronic device of this embodiment is characterized by including an impedance converting circuit 36 having five input terminals disposed to face the output terminals of the respective RF power amplifiers 1 through 5 for the five systems. The impedance converting circuit 36 serves as an output matching circuit for the transistors 8, 11, 13, 15 and 17 at the last stages in the respective RF power amplifiers 1 through 5 for five systems and coverts input impedance of a low impedance (e.g., 1 through 30Ω) in order to secure maximum power amplification into a higher impedance of, for example, about 50Ω. In the impedance converting circuit 36, shunt capacitors 37, 38, 39, 40 and 41 for reducing the real part of impedance and serial inductors 42, 43, 44, 45 and 46 for adjusting the imaginary part of impedance according to the frequency band to be used are provided for the respective transistors 8, 11, 13, 15 and 17 at the last stages of the RF power amplifiers 1 through 5 for five systems. The impedance converting circuit 36 also includes: bias supplying circuits 52, 53, 54, 55 and 56 for supplying DC power supply voltages to the respective transistors 8, 11, 13, 15 and 17 at the last stages through the output terminals of the RF power amplifiers 1 through 5 for five systems and; series capacitors 47, 48, 49, 50 and 51 for preventing direct current supplied from the bias supplying circuits 52, 53, 54, 55 and 56 from flowing into the output side of the impedance converting circuit 36.

FIG. 2 is a view schematically illustrating an example of a circuit arrangement of the electronic device with the circuit configuration shown in FIG. 1. As illustrated in FIG. 2, monolithic microwave integrated circuits 59 and 60 in which RF power amplifiers for five systems are integrated are mounted on a die bonding pad 58 and are sealed in the plastic package 35. The plastic package 35 is mounted on a mother board 61 for the electronic device such as mobile equipment, together with a dielectric substrate 63 on which the impedance converting circuit 36 is integrated.

The plastic package 35 is provided with a plurality of lead terminals 73. The lead terminals 73 are electrically connected to the monolithic microwave integrated circuits 59 and 60 through a plurality of wires 74. The outputs of the transistors at the last stages of the RF power amplifiers for five systems are connected to input terminals 77A, 77B, 77C, 77D and 77E of the impedance converting circuit 36 through the wires 74 and the lead terminals (output terminals) 73A, 73B, 73C, 73D and 73E. The output terminals 73A through 73E of the RF power amplifiers for five systems and the input terminals 77A through 77E of the impedance converting circuit 36 are electrically connected to each other through lines 71 provided on the surface of the mother board 61. A pair of the output terminal 73A and the input terminal 77A, a pair of the output terminal 73B and the input terminal 77B, a pair of the output terminal 73C and the input terminal 77C, a pair of the output terminal 73D and the input terminal 77D and a pair of the output terminal 73E and the input terminal 77E are regularly arranged in parallel.

Chip capacitors 64 used as shunt capacitors and chip inductors 65 used as serial inductors are provided as components of the impedance converting circuit 36 on the dielectric substrate 63 on which the impedance converting circuit 36 is integrated. Electrical connection among the input terminals 77, the chip capacitors 64 and the chip inductors 65 is established by a metal interconnect layer 75. The impedance converting circuit 36 includes bias supplying circuits for supplying DC power supply voltages to the respective transistors at the last stages of the RF power amplifiers for five systems. Each of the bias supplying circuits includes a microwave transmission line 66 and an RF bypass capacitor 67 formed on the dielectric substrate 63. Alternating current is short-circuited at the terminal to which the RF bypass capacitor 67 is connected. The line length of the microwave transmission line 66 is determined in consideration of an electrical length at the frequency to be used so that the connection point between the microwave transmission line 66 and the impedance converting circuit 36 is sufficiently open. Series capacitors 68 are also connected to the impedance converting circuit 36 to prevent direct current supplied from the bias supplying circuits from flowing to the output side of the impedance converting circuit 36. The series capacitors 68 for five systems are arranged in parallel, the chip capacitors 64 used as shunt capacitors for five systems are arranged in parallel, the chip inductors 65 used as serial inductors for five systems are arranged in parallel, the microwave transmission lines 66 for five systems are arranged in parallel, and the RF bypass capacitors 67 for five systems are arranged in parallel. The microwave transmission lines 66 and the RF bypass capacitors 67 constitute the bias supplying circuits. Lines used for supplying DC power supply voltages to the bias supplying circuits for five systems are shared when necessary. The DC power supply voltages are supplied to the respective bias supplying circuits from outside the device by way of one terminal 69 provided on the impedance converting circuit 36 (i.e., the dielectric substrate 63).

FIG. 3 is a cross-sectional view taken along the line A-A′ in FIG. 2. As illustrated in FIG. 3, the monolithic microwave integrated circuit 60 and other components are mounted on the die bonding pad 58 in the plastic package 35. The plurality of lead terminals 73 are provided at the rim of the plastic package 35. The upper portion of, for example, the monolithic microwave integrated circuit 60 and the wires 74 for connection are protected by a sealing resin 76 for surface protection. The plastic package 35 is mounted on the mother board 61. The impedance converting circuit 36 is configured on the dielectric substrate 63. The dielectric substrate 63 has a multilayer interconnect structure in which metal interconnect layers 75A (an uppermost interconnection), 75B (a third-layer interconnection), 75C (a second-layer interconnection) and 75D (a first-layer interconnection) are placed in its dielectric. The chip capacitors 64 and the chip inductors 65, for example, are mounted on the surface of the dielectric substrate 63. The chip capacitors 64, for example, are protected on the dielectric substrate 63 by a sealing resin 78 for surface protection. Instead of the sealing resin 78, a metal case may be used.

In this embodiment, the metal interconnect layer 75A is used as a signal line and the metal interconnect layer 75B is used as a ground layer, thereby forming microstrip lines, which are an example of microwave transmission lines. The microstrip lines are used as the microwave transmission lines 66 for the bias supplying circuits. This allows DC power supply voltages to be supplied with a minimum loss of RF signals, so that power consumption of the electronic device such as mobile equipment is reduced.

In this embodiment, a dielectric is sandwiched between the metal interconnect layer 75C and each of the metal interconnect layers 75B and 75D, using the metal interconnect layer 75C as a signal line and the metal interconnect layers 75B and 75D as ground layers, thereby forming strip lines, which are an example of microwave transmission lines. The strip lines are used as means for converting impedance. This minimizes leakage and a loss of an RF signal so that the efficiency in converting an RF signal is enhanced. In addition, the strip lines may be used as microwave transmission lines for the bias supplying circuits, in the same manner as the microstrip lines.

In this embodiment, the metal interconnect layer 75C is used to unite terminals for supplying DC power supply voltages to a plurality of bias supplying circuits associated with a plurality of RF power amplifiers into one terminal. This eliminates the need for providing a plurality of complicated lines on the mother board 61 of the electronic device such as mobile equipment. However, as described above, the metal interconnect layer 75C also serves as microwave transmission lines and may be used as a part of the bias supplying circuits.

As described above, in the first embodiment, the monolithic microwave integrated circuits 59 and 60 forming RF power amplifiers for a plurality of systems are not mounted on the dielectric substrate 63 on which the impedance converting circuit 36 is integrated, so that the thickness of the monolithic microwave integrated circuits 59 and 60 is reduced. In addition, heat is dissipated from the back surfaces of the monolithic microwave integrated circuits 59 and 60 to the mother board 61 through a thin lead frame (i.e., the die bonding pad 58) without passing through the dielectric substrate 63, thus implementing highly-reliable RF power amplifiers exhibiting excellent heat dissipation. Furthermore, since the monolithic microwave integrated circuits 59 and 60 are not mounted on the dielectric substrate 63, the distance to the ground layer for grounding the circuits is reduced, so that RF power amplifiers having excellent RF characteristics are implemented with gain degradation suppressed.

Embodiment 2

Hereinafter, an electronic device according to a second embodiment of the present invention will be described with reference to the drawings.

FIG. 4 is an equivalent circuit diagram illustrating an example of a configuration of the electronic device of this embodiment. In FIG. 4, components also shown in FIG. 1 for the first embodiment are denoted by the same reference numerals, and thus description thereof will be omitted. As illustrated in FIG. 4, in the electronic device of this embodiment, as in the electronic device of the first embodiment including the RF power amplifiers for five systems shown in FIG. 1, a package 35 incorporating RF power amplifiers 1 through 5 (formed as a monolithic microwave integrated circuit) and an impedance converting circuit 36 are disposed to face each other.

The second embodiment is different from the first embodiment in that a serial inductor 86 for increasing an electrical length and a shunt capacitor 87 for reducing an electrical length are provided between an output terminal of the RF power amplifier 5 for one system out of the RF power amplifiers 1 through 5 for five systems and an input terminal of the impedance converting circuit 36 electrically connected to this output terminal.

With the foregoing characteristic, in actually mounting the package 35 incorporating a monolithic microwave integrated circuit and the impedance converting circuit 36 on a mother board of the electronic device such as mobile equipment, even if it is difficult to precisely adjust the electrical lengths necessary for connection of the respective five systems to optimum values by adjusting the positions of the package 35 and the impedance converting circuit 36, the electrical length changing means 86 and 87 shown in FIG. 4 enables the adjustment so that performances of the RF power amplifiers 1 through 5 for five systems are exhibited with stability.

Other aspects in which the second embodiment is different from the first embodiment are that a line connecting an input terminal of the impedance converting circuit 36 associated with the RF power amplifier 4 and an output terminal 89 of the impedance converting circuit 36 associated with the input terminal and a line connecting an input terminal of the impedance converting circuit 36 associated with the RF power amplifier 5 and an output terminal 88 of the impedance converting circuit 36 associated with the input terminal intersect with each other, and that the order of arrangement of input terminals of the impedance converting circuit 36 differs from the order of arrangement of corresponding output terminals of the impedance converting circuit 36.

With the foregoing characteristics, even when the output terminals of the impedance converting circuit 36 need to be arranged in different order from the arrangement of the RF power amplifiers 1 through 5 for five systems because of the connection position of, for example, antennas of the electronic device such as mobile equipment, the lines for the systems intersect with each other immediately before the output terminals of the impedance converting circuit 36 (after components substantially constituting the impedance converting circuit) so that only the order of arrangement of the output terminals of the impedance converting circuit 36 is allowed to be flexibly changed without a change of the order of arrangement of the output terminals of the package 35 and a change of the order of arrangement of components (except for lines) of the impedance converting circuit 36.

In the second embodiment, means for changing an electrical length is provided for an input terminal of the impedance converting circuit 36 associated with one system. Alternatively, means for changing electrical lengths may be provided for input terminals associated with two or more systems. Instead of, or in addition to, the means for changing an electrical length, means for changing input impedance may be provided. Specifically, if a capacitor is connected in parallel with a connection line between an output terminal of an RF power amplifier and an input terminal of the impedance converting circuit, input impedance is reduced. If either an inductor and a capacitor or a microwave transmission line and a capacitor are connected to the connection line, the input impedance is increased or reduced.

In the second embodiment, lines associated with two systems intersect with each other in the impedance converting circuit 36. Alternatively, lines associated with three or more systems may intersect with each other.

Embodiment 3

Hereinafter, an electronic device according to a third embodiment of the present invention will be described with reference to the drawings.

FIG. 5 is an equivalent circuit diagram illustrating an example of a configuration of the electronic device of this embodiment. In FIG. 5, components also shown in FIG. 1 for the first embodiment are denoted by the same reference numerals, and thus description thereof will be omitted.

As illustrated in FIG. 5, the third embodiment is different from the first embodiment in that the impedance converting circuit 36 of the first embodiment is replaced by an impedance converting circuit 90. As illustrated in FIG. 5, in the electronic device of this embodiment, output terminals of a package 35 incorporating RF power amplifiers 1 through 5 (configured as a monolithic microwave integrated circuit) and input terminals of the impedance converting circuit 90 are arranged to face each other, as in the connection relationship between the RF power amplifiers 1 through 5 and the impedance converting circuit 36 in the electronic device of the first embodiment illustrated in FIG. 1.

The internal configuration of the impedance converting circuit 90 of this embodiment is characterized in that directional couplers 91b and 92b are provided immediately before respective output terminals 91a and 92a (i.e., after components substantially constituting the impedance converting circuit) in order to detect a part of RF signals passing through the output terminals 91a and 92a out of a plurality of output terminals 91a, 92a, 93a, 94a and 95a for outputting RF signals subjected to impedance conversion, as shown in FIG. 5. The signals detected by the directional couplers 91b and 92b are output from the respective terminals 91c and 92c.

Another characteristic of this embodiment is that isolators 96, 97 and 98 for causing signals to pass only in one direction are connected to the respective output terminals 93a, 94a and 95a outside the impedance converting circuit 90. This eliminates the need for limiting the directivity of signals passing through the output terminals 93a, 94a and 95a. Accordingly, capacitors 93b, 94b and 95b provided immediately before the output terminals 93a, 94a and 95a (i.e., after components substantially constituting the impedance converting circuit) allow a part of signals passing through the output terminals 93a, 94a and 95a to be taken from terminals 93c, 94c and 95c.

In the third embodiment, it is possible to appropriately control signals output from the electronic device such as mobile equipment.

In the third embodiment, couplers for detecting RF signals or additional terminals for outputting the detected signals are provided for all the output terminals of the impedance converting circuit 90. However, the present invention is not limited to this, and it is sufficient to provide a coupler for detecting an RF signal or an additional terminal for outputting the detected signal for at least one output terminal at which signal detection is needed.

In this embodiment, based on the configuration of the first embodiment, couplers for detecting RF signals or additional terminals for outputting the detected signals are provided for the output terminals of the impedance converting circuit. Alternatively, based on the configuration of the second embodiment shown in FIG. 4, couplers for detecting RF signals or additional terminals for outputting the detected signals may be provided for output terminals of the impedance converting circuit.

Embodiment 4

Hereinafter, an electronic device according to a fourth embodiment of the present invention will be described with reference to the drawings.

FIG. 6 is an equivalent circuit diagram illustrating an example of a configuration of the electronic device of this embodiment. In FIG. 6, components also shown in FIG. 1 for the first embodiment are denoted by the same reference numerals, and thus description thereof will be omitted.

The fourth embodiment is different from the first embodiment in that as illustrated in FIG. 6, the impedance converting circuit 36 of the first embodiment is replaced by an impedance converting circuit 99. As illustrated in FIG. 6, in the electronic device of this embodiment, output terminals of a package 35 incorporating RF power amplifiers 1 through 5 (configured as a monolithic microwave integrated circuit) and input terminals of the impedance converting circuit 99 are arranged to face each other, as in the connection relationship between the RF power amplifiers 1 through 5 and the impedance converting circuit 36 in the electronic device of the first embodiment illustrated in FIG. 1.

As illustrated in FIG. 6, the internal configuration of the impedance converting circuit 99 of this embodiment is characterized in that protection diodes 101A and 102A are connected in parallel between a DC-power-supply-voltage supplying terminal 100A of a bias supplying circuit 52 and the ground. In the same manner, protection diodes 101B and 102B are connected in parallel between a DC-power-supply-voltage supplying terminal 100B of a bias supplying circuit 53 and the ground, protection diodes 101C and 102C are connected in parallel between a DC-power-supply-voltage supplying terminal 100C of a bias supplying circuit 54 and the ground, protection diodes 101D and 102D are connected in parallel between a DC-power-supply-voltage supplying terminal 100D of a bias supplying circuit 55 and the ground, and protection diodes 101E and 102E are connected in parallel between a DC-power-supply-voltage supplying terminal 100E of a bias supplying circuit 56 and the ground. In this manner, a protection circuit capable of bypassing a surge component having a relatively low frequency is configured for each of the bias supplying circuits 52 through 56.

In the fourth embodiment, a surge component having a relatively low frequency is allowed to be bypassed from the bias supplying circuits 52 through 56 designed to prevent leakage of amplified RF signals, thus ensuring protection of transistors used in the RF power amplifiers 1 through 5.

In the fourth embodiment, the protection circuit is provided between the DC-power-supply-voltage supplying terminal of each of the bias supplying circuits 52 through 56 and the ground. However, the present invention is not limited to this, and the protection circuit may be provided between the DC-power-supply-voltage supplying terminal of at least one bias supplying circuit and the ground.

In the fourth embodiment, the diodes connected between the DC-power-supply-voltage supplying terminals of the respective bias supplying circuits 52 through 56 and the grounds so as to configure protection circuits may be serially connected in multiple stages, may be arranged in parallel in opposite directions or may be arranged in parallel in one direction, according to assumed values of applied voltages, polarities and current to be bypassed, for example. Instead of protection diodes in a small number of stages, a semiconductor ceramic such as a positive temperature coefficient (PTC) thermistor whose resistance decreases upon application of a high voltage may be used as a component of a protection circuit.

In the fourth embodiment, based on the configuration of the first embodiment, the protection circuit is provided between the DC-power-supply-voltage supplying terminal of each of the bias supplying circuits and the ground. Alternatively, based on the configuration of the second embodiment shown in FIG. 4, the configuration of the third embodiment shown in FIG. 5 or a combination of these configurations, a protection circuit may be provided between the DC-power-supply-voltage supplying terminal of each of the bias supplying circuits and the ground.

Embodiment 5

Hereinafter, an electronic device according to a fifth embodiment of the present invention will be described with reference to the drawings.

FIG. 7 is an equivalent circuit diagram illustrating an example of a configuration of the electronic device of this embodiment. In FIG. 7, components also shown in FIG. 1 for the first embodiment are denoted by the same reference numerals, and thus description thereof will be omitted.

A first aspect in which the fifth embodiment is different from the first embodiment is that as illustrated in FIG. 7, an RF power amplifier 5 out of RF power amplifiers 1 through 5 forming a monolithic microwave integrated circuit in a package 35 is replaced by an RF power amplifier 103 for one system formed by a balanced circuit. Specifically, the RF power amplifier 103 has a three-stage amplifying configuration including: a pair of transistors 104 and 105 at the last stage; a balanced amplifier 106 at the second stage; and a balanced amplifier 107 at the first stage. An input matching circuit 108 formed by a balanced circuit is provided at the input side of the balanced amplifier 107. An inter-stage matching circuit 109 is provided between the balanced amplifier 106 and the balanced amplifier 107. An inter-stage matching circuit 110 is provided between the balanced amplifier 106 and each of the transistors 104 and 105. A bias circuit is incorporated in each of the balanced amplifiers 106 and 107. A bias circuit 118 for supplying base current to the transistors 104 and 105 is connected to the input sides of the transistors 104 and 105.

A second aspect in which the fifth embodiment is different from the first embodiment is that as illustrated in FIG. 7, an impedance converting circuit 111 is provided instead of the impedance converting circuit 36 of the first embodiment. As shown in FIG. 7, in the electronic device of this embodiment, output terminals of a package 35 incorporating the RF power amplifiers 1 through 4 and 103 and input terminals of the impedance converting circuit 111 are arranged to face each other, as in the connection relationship between the RF power amplifiers 1 through 5 and the impedance converting circuit 36 in the electronic device of the first embodiment shown in FIG. 1. Outputs from the transistors 104 and 105 of the RF power amplifier 103 are balanced outputs, so that two lines extend as a pair from the output terminals (i.e., a pair of terminals) to corresponding input terminals (i.e., a pair of terminals) of the impedance converting circuit 111.

In the impedance converting circuit 111 of this embodiment, as shown in FIG. 7, shunt capacitors 41A and 41B for reducing the real part of impedance, serial inductors 46A and 46B for adjusting the imaginary part of impedance according to the frequency band to be used and bias supplying circuits 56A and 56B for supplying DC power supply voltages to the respective transistors 104 and 105 of the RF power amplifier 103 are provided for respective input terminals of the equivalent circuit associated with output terminals of the balanced circuit of the RF power amplifier 103. The impedance converting circuit 111 of this embodiment further includes a balun 112 for converting balanced lines on which the signals are transmitted into one signal line after impedance conversion on signals input from the input terminals of the balanced circuit. This eliminates the need for balanced lines after the output terminals of the impedance converting circuit 111, so that line design on the mother board is simplified. In the impedance converting circuit 111 of this embodiment, a series capacitor 51 is placed after the balun 112 in order to prevent direct current supplied from the bias supplying circuits 56A and 56B from flowing toward the output side of the impedance converting circuit 111.

In the fifth embodiment, even in a case where transistors of the RF power amplifier 103 in the monolithic microwave integrated circuit produce balanced outputs of RF signals, since the monolithic microwave integrated circuit and the impedance converting circuit 111 are closely disposed to face each other, only setting the input side of the impedance converting circuit 111 to enable balanced inputs allows easy connection between the monolithic microwave integrated circuit and the impedance converting circuit 111.

In the fifth embodiment, lines associated with one system in the impedance converting circuit 111 are balanced lines. Alternatively, lines associated with two or more systems may be balanced lines.

In the fifth embodiment, based on the configuration of the first embodiment, balanced lines are used. Alternatively, based on the configuration of the second embodiment shown in FIG. 4, the configuration of the third embodiment shown in FIG. 5, the configuration of the fourth embodiment shown in FIG. 6, or a combination of two or more of the configurations of the second through fourth embodiments, balanced lines may be used.

Embodiment 6

Hereinafter, an electronic device according to a sixth embodiment of the present invention will be described with reference to the drawings.

FIG. 8 is a cross-sectional view showing an example of a configuration of the electronic device of this embodiment and corresponds to a cross-sectional view taken along the line C-C′ in FIG. 2 showing the circuit arrangement of the first embodiment. As illustrated in FIG. 8, an impedance converting circuit 36 includes impedance converting circuits 113, 114, 115, 116 and 117 associated with RF power amplifiers for five systems. A dielectric substrate 63 on which the impedance converting circuit 36 is integrated has a multilayer interconnect structure in which metal interconnect layers 75A (an uppermost interconnection), 75B (a third-layer interconnection), 75C (a second-layer interconnection) and 75D (a first-layer interconnection) are placed in its dielectric. Chip capacitors and chip inductors, for example, which are components of the impedance converting circuit 36, are mounted on the metal interconnect layer 75A at the surface of the dielectric substrate 63. The metal interconnect layer 75A is used as a signal line and the metal interconnect layer 75B is used as a ground line, thereby forming microstrip lines, which are an example of microwave transmission lines. The metal interconnect layer 75A serving as signal lines is divided between each adjacent two of impedance converting circuits 113, 114, 115, 116 and 117. The metal interconnect layer 75B serving as a ground layer is connected to the metal interconnect layer 75D through vias 123 and 124. The metal interconnect layer 75D is connected to lines 71 provided on the surface of a mother board 61 of the electronic device such as mobile equipment.

This embodiment is characterized in that the metal interconnect layer 75B serving as a ground layer is divided between each adjacent two of the impedance converting circuits 113, 114, 115, 116 and 117. The portions of the metal interconnect layer 75B in the respective impedance converting circuits 113 through 117 are connected to the metal interconnect layer 75D through the vias 123 and 124.

In the sixth embodiment, even in a case where microwave transmission lines for respective systems are closely located in the impedance converting circuit 36, the characteristics described above suppress interference among the microwave transmission lines for the systems through the metal interconnect layer 75B which cannot form ideal ground, i.e., suppress leakage of a signal from one microwave transmission line to another.

In the sixth embodiment, based on the configuration of the first embodiment, the ground lines forming microwave transmission lines are divided into portions associated with respective RF power amplifiers. Alternatively, the configuration of the second embodiment shown in FIG. 4, the configuration of the third embodiment shown in FIG. 5, the configuration of the fourth embodiment shown in FIG. 6, the configuration of the fifth embodiment shown in FIG. 7, or a combination of two or more of the configurations of the second through fifth embodiments, the ground lines forming microwave transmission lines may be divided into portions associated with respective RF power amplifiers.

Electronic device

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