Patent Application
20100093279
Bluetooth wireless technology enables short-range wireless communication among electronic devices. For example, Bluetooth technology may be used to enable wireless communication between a cellular phone and a wireless headset, between a laptop and a wireless mouse, and between other devices. Electronic devices that may use Bluetooth include, among others, cellular phones, personal digital assistance (PDA) devices, laptops, wireless headset, wireless mouse, and wireless keyboard.
Bluetooth enabled devices can be connected to one another in several different modes including active, hold, sniff, and park modes. Bluetooth enabled devices also include a page scan mode and an inquiry scan mode. In the page scan mode, a page scanning device periodically scans for page packets from other devices attempting to establish a connection with the device. A page packet includes the Device Access Code (DAC) of the device with which the paging devices is attempting to connect. When a page scanning device receives a page packet, the page scanning device demodulates the page packet to determine whether the message includes the device's DAC (i.e., whether the page message is directed to the device). In the inquiry scan mode, an inquiry scanning device periodically scans for inquiry packets from other devices attempting to discover the device. An inquiry packet includes the Inquiry Access Code (IAC). When an inquiry scanning device receives an inquiry packet, the inquiry scanning device demodulates the inquiry packet to determine whether the message includes the IAC. If the received packet includes the IAC, then the inquiry scanning device sends a response to the inquiring device.
A Bluetooth enabled device may operate in the page scan mode and/or inquiry scan most of the time. Therefore, systems and methods for reducing power in the page scan mode and inquiry scan are desired to extend the battery life of the device.
The following presents a simplified summary of various configurations of the subject technology in order to provide a basic understanding of some aspects of the configurations. This summary is not an extensive overview. It is not intended to identify key/critical elements or to delineate the scope of the configurations disclosed herein. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
In one aspect of the disclosure, an electronic device for communication comprises a processor. The processor comprises a power scan module configured to receive an energy detection signal identifying detection of energy of a page signal or an inquiry signal. The power scan module is further configured to provide, upon receiving the energy detection signal, an instruction to perform a page scan or an inquiry scan.
In another aspect of the disclosure, a machine-readable medium comprises instructions executable by a processor. The instructions comprise code for receiving an energy detection signal identifying detection of energy of a page signal or an inquiry scan, and upon receiving the energy detection signal, providing an instruction to perform a page scan or an inquiry scan.
In a further aspect of the disclosure, an electronic device for communication comprises an energy detection system comprising. The energy detection system comprises an amplifier configured to amplify a page signal or an inquiry signal received by an antenna, and an energy detector configured to receive the amplified page signal or amplified inquiry signal and to output a detection signal when energy of the amplified page signal or amplified inquiry signal is equal to or greater than a threshold.
In yet a further aspect of the disclosure, an electronic device for communication comprises means for receiving a page signal or an inquiry signal, means for amplifying the received page signal or inquiry signal, and means for outputting a detection signal when energy of the amplified page signal or the amplified inquiry signal is equal to or greater than a threshold.
In yet a further aspect of the disclosure, an electronic device for communication comprises a frequency synthesizer. The frequency synthesizer comprises a first reference signal generator configured to generate and output a first reference signal and a second reference signal generator configured to generate and output a second reference signal. The frequency synthesizer further comprises a Phase-Locked Loop (PLL) configured to generate a first oscillator signal from the first reference signal and to generate a second oscillator signal from the second reference signal, and a switch configured to input either the first reference signal to the PLL or the second reference signal to the PLL based on a control signal.
In yet a further aspect of the disclosure, an electronic device for communication comprises means for receiving a first reference signal and means for receiving a second reference signal. The electronic device further comprises means for inputting either the first reference signal or the second reference signal to a Phase-Locked Loop (PLL) based on a control signal, and means for generating a first oscillator signal when the first reference signal is inputted to the PLL or generating a second oscillator signal when the second reference signal is inputted to the PLL.
It is understood that other configurations of the subject technology will become readily apparent to those skilled in the art from the following detailed description, wherein various configurations of the subject technology are shown and described by way of illustration. As will be realized, the subject technology is capable of other and different configurations and its several details are capable of modification in various other respects, all without departing from the scope of the subject technology. Accordingly, the drawings and detailed description are to be regarded as illustrative in nature and not as restrictive.
The detailed description set forth below is intended as a description of various configurations of the subject technology and is not intended to represent the only configurations in which the subject technology may be practiced. The appended drawings are incorporated herein and constitute a part of the detailed description. The detailed description includes specific details for the purpose of providing a thorough understanding of the subject technology. However, it will be apparent to those skilled in the art that the subject technology may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts of the subject technology.
The Bluetooth enabled devices 10 and 15 may transmit and receive Bluetooth packets, for example, at around the 2.4 GHz Industrial, Scientific and Medical (ISM) frequency band. Each device 10 and 15 may transmit and receive Bluetooth packets using a frequency hopping scheme to reduce interference and fading. In one example, the devices 10 and 15 may use a scheme comprising 79 or fewer different hop frequencies spaced 1 MHz apart within a frequency range of 2.402 to 2.480 GHz. Each hop frequency may be referred to as a channel with 79 different channels in the example given above. These are merely examples, and the subject technology is not limited to these examples.
In a page scan mode, a page scanning device periodically scans for page packets from other devices attempting to establish a connection with the page scanning device. A page packet may be, for example, a type of Bluetooth packet that only comprises the access code 215 identifying the device being paged. Referring to the example in
In an inquiry scan mode, an inquiry scanning device periodically scans for inquiry packets from another device attempting to discover the presence of other Bluetooth enabled devices in its vicinity. An inquiry packet may be, for example, a type of Bluetooth packet that comprises the access code 215, where the access code 215 includes an Inquiry Access Code (IAC). The inquiry packet may have the same length (e.g., 68 μs) as a page packet. The inquiry packet may be transmitted using an inquiry channel hopping sequence, e.g., based on the IAC and a local clock of the inquiring device.
Examples of operations in a page scan mode will now be given with reference to
In one aspect, a page scanning device 10 may include a processing system 40 comprising a page scan module 42, a wakeup module 44, and a channel selector 46. The processing system 40 may be implemented using software, hardware, or a combination of both. Software shall be construed broadly to mean instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. By way of example, the processing system 40 may be implemented with one or more processors. A processing system is sometimes referred to as a processor. A processor may be a general-purpose microprocessor, a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Programmable Logic Device (PLD), a controller, a state machine, gated logic, discrete hardware components, or any other suitable entity that can perform calculations or other manipulations of information. A processor may include both the modem processor 35 and the processing system 40. A processor may include one or more processors.
The pages scanning device 10 may also include a machine-readable medium 45 that is operatively coupled to the processing system 40 and that can store information related to data processing. A machine-readable medium may be placed outside and/or inside the processing system 40 and/or the modem processor 35. A machine-readable medium may be one medium or a plurality of media.
A machine-readable medium may include storage integrated into a processor, such as might be the case with an ASIC, and/or storage external to a processor such as the machine-readable medium 45. By way of illustration, and not limitation, machine-readable media may include one or more of volatile memory, nonvolatile memory, a Random Access Memory (RAM), a flash memory, a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable PROM (EPROM), a register, a hard disk, a removable disk, a CD-ROM, a DVD, or any other suitable storage device. In addition, machine-readable media may include a transmission line or a carrier wave that encodes a data signal. A machine-readable medium may be a computer-readable medium encoded or stored with a computer program or instructions. The computer program or instructions may be executable by a transmitter or receiver device or by a processing system of a transmitter or receiver device.
In one aspect of the disclosure, the page scan module 42 may be configured to manage page scan operations of the page scanning device 10, as discussed further below. The wakeup module 44 may be configured to periodically wake up the receiver 30 and the modem processor 35 to perform a page scan in the page scan mode. The wakeup module 44 may keep track of time using, e.g., a Bluetooth clock and/or a software timer. Although shown separately from the page scan module 42, the wakeup module 44 may be part of the page scan module 42. The channel selector 46 may be configured to select the channel at which the receiver 30 scans for page packets, e.g., based on a page channel hopping sequence.
In one aspect of the disclosure, the wakeup module 44 periodically wakes up the receiver 30 and the modem processor 35 from a sleep state, e.g., once every 1.28 seconds, to perform a page scan for a page scan window, e.g., 11.25 ms. When the receiver 30 receives a page packet during a page scan, the modem processor 35 demodulates the page packet and recovers the data in the page packet. The page scan module 42 may then examine the recovered data to determine whether the page packet includes the device's DAC (i.e., whether the page packet is directed to the device 10). If so, then the page scan module 42 may start procedures for establishing a connection with the paging device 15. Examples of details for establishing a connection after a page scanning device has been paged may be found, e.g., at the Specification for the Bluetooth System, Volume 2, part B, Section 8.3.
The paging device 15 may transmit the page packet using a page hopping scheme, in which the page packet is transmitted on a sequence of different channels. For example, the paging device 15 may use 32 different channels for paging. In this example, the paging device 15 may transmit the page packet using two different page trains, where each page train comprises a sequence of 16 of the 32 channels. In this example, each page train may be 10 ms long, during which time the paging device 15 transmits the page packet on each of the 16 channels in the page train. The paging device 15 may repeat the same page train, e.g., every 10 ms. In this example, the paging device 15 may alternate between the two page trains, e.g., every 1.28 seconds. The paging device 15 may algorithmically generate a page train of 16 channels based on the Bluetooth Device Address (BD_ADDR) of the paging device is attempting to page and an estimate of the page scanning device's Bluetooth clock.
As discussed above, the wakeup module 44 may periodically wake up the receiver 30 and the modem processor 35 from a sleep state to perform a page scan, e.g., once every 1.28 seconds for a page scan window of 11.25 ms. In one aspect, the channel selector 46 may select a channel at each page scan wakeup based on a page channel hopping sequence. The channel selector 46 may generate a page channel hopping sequence based on, for example, the Bluetooth Device Address (BD_ADDR) and an estimate of the Bluetooth clock of the device 10. In one aspect, the page channel hopping sequence comprises 32 different channels. The channel selector 46 may hop channels at a rate of once every 1.28 seconds (e.g., interval between page scan wakeups). In this example, the page scan window of 11.25 ms corresponds to a page train interval of 10 ms to ensure that the page scan window covers all 16 channels of the page train. The page train interval of 10 ms and the page scan window of 11.25 ms are exemplary only, and other page train intervals and page scan windows may be used.
In one aspect, the device 10 may also scan for inquiry packets in an inquiry scan mode. In this aspect, the device 10 comprises an inquiry scan module 43 to manage inquiry scans of the device 10. The wakeup module 44 may be configured to periodically wake up the receiver 30 and the modem processor 35 to perform an inquiry scan. If the device 10 receives an inquiry packet from another device, then the inquiry scan module 43 may send a response with an address and clock of the device 10 so that the other device can establish a connection with the device 10.
An example of power consumption in a page scan mode will now be discussed with reference to
leakage_current+(RX_current*(window/interval)) (1)
where leakage_current is the leakage current of the receiver 30 and the modem processor 35, RX_current is the current consumption during a page scan, window is the length of a page scan window (e.g., 11.25 ms), and interval is the interval between page scans (e.g., 1.28 seconds). Power consumption in a page scan mode is proportional to the average current consumption in the page scan mode. In the example above, the page scanning device performs page scanning at a duty cycle of approximately 1% (11.25 ms/1.28 seconds).
Based on equation (1), there are at least three ways to reduce average current consumption, and hence power consumption, in a page scan mode. These may include the following:
1. Increase the interval between page scans;
2. Decrease the length of the page scan window; and
3. Decrease the current during a page scan.
Aspects of the disclosure may use one or more of the above ways to reduce power consumption in the page scan mode. The above discussion of power consumption in the page scan mode also applies to the inquiry scan mode. Thus, systems and methods for reducing power in the page scan mode can also be applied in the inquiry scan mode.
The Bluetooth enabled device 410 further comprises an energy detection system 460 coupled to the antenna 420 and configured to detect energy of a page packet received by the antenna 420. The energy detection system 460 may also detect the energy of an inquiry packet. The Bluetooth enabled device 410 also includes a processing system 440 comprising a page scan module 442, a low power scan module 448, a wakeup module 44, and a channel selector 446. The Bluetooth enabled device 410 may also include an inquiry scan module 443. The processing system 440 may be implemented using software, hardware, or a combination of both. Software shall be construed broadly to mean instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. By way of example, the processing system 440 may be implemented with one or more processors. A processing system is sometimes referred to as a processor. A processor may be a general-purpose microprocessor, a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Programmable Logic Device (PLD), a controller, a state machine, gated logic, discrete hardware components, or any other suitable entity that can perform calculations or other manipulations of information. A processor may include both the modem processor 435 and the processing system 440. A processor may include one or more processors.
The Bluetooth enabled device 410 also includes a machine-readable medium 445 that is operatively coupled to the processing system 440 and that can store information related to data processing. A machine-readable medium may be placed outside and/or inside the processing system 440 and/or the modem processor 435. A machine-readable medium may be one medium or a plurality of media.
A machine-readable medium may include storage integrated into a processor, such as might be the case with an ASIC, and/or storage external to a processor such as the machine-readable medium 445. By way of illustration, and not limitation, machine-readable media may include one or more of volatile memory, nonvolatile memory, a Random Access Memory (RAM), a flash memory, a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable PROM (EPROM), a register, a hard disk, a removable disk, a CD-ROM, a DVD, or any other suitable storage device. In addition, machine-readable media may include a transmission line or a carrier wave that encodes a data signal. A machine-readable medium may be a computer-readable medium encoded or stored with a computer program or instructions. The computer program or instructions may be executable by a transmitter or receiver device or by a processing system of a transmitter or receiver device.
In one aspect of the disclosure, the Bluetooth enabled device 410 may perform an energy scan, in which the energy detection system 460 is used to detect the energy of a page packet received by the antenna 420. The receiver 430 and/or the modem processor 435 may be powered off during the energy scan mode to conserve power. The Bluetooth enabled device 10 may also perform a page scan, in which the receiver 430 and the modem processor 435 are powered on to receive and demodulate (e.g., GFSK demodulate) a page packet to determine whether the device 410 is being paged. In this aspect, the wakeup module 444 may periodically wakeup the energy detection system 460 to perform an energy scan. When the energy detection system 460 detects the energy of a page packet, the energy detection system 460 may send a detection signal to the low power scan module 448. Upon receiving the detection signal, the low power scan module 448 may instruct the page scan module 442 to schedule a page scan, as discussed further below. An energy scan consumes less power than a page scan by detecting the energy of a received page packet instead of trying to demodulate the page packet to recover data in the packet, which requires more power.
The energy detection system 460 may detect the energy of a page packet, e.g., by detecting received energy that is above a predetermined threshold and that is within a predetermined frequency band. For example, the energy detection system may detect received energy within a frequency band centered at a channel selected by the channel selector 446. The term “predetermined threshold” may refer to, for example, a threshold that is determined prior to utilizing the threshold. In this example, the frequency band may correspond to the frequency band of a page packet, which may be 1 MHz. This has an advantage of removing out-of-band blockers from the received signal. This also has the advantage of reducing the energy of blockers having wider bandwidths than a page packet, such as WLAN signals which may have bandwidths of 20 MHz to 40 MHz. Thus, the energy detection system may employ band-pass filtering to remove blockers and therefore reduce the rate of false detections.
In another example, the energy detection system 460 may detect received energy having a similar shape to a page packet. For example, for a page packet having a length of 68 μs, the energy detection system 460 may be configured to detect received energy that is above a threshold for a duration of approximately 68 μs. This has an advantage of eliminating Bluetooth connection packets and/or most WLAN packets having packet lengths that differ from the length of a page packet.
Thus, the energy detection system 460 may be configured to detect received energy that is characteristic of a page packet (e.g., 1 MHz bandwidth, 68 μs length, or other bandwidth/length). Exemplary implementations of energy detection systems are given below.
In one aspect, the energy detection system 460 may also detect the energy of an inquiry packet. An inquiry packet may have the same or similar length (e.g., 68 μs), packet structure and/or bandwidth as a page packet. Thus, the energy detection techniques for detecting the energy of a page packet can be applied to detect the energy of an inquiry packet. In this aspect, the low power scan module 448 may be configured to instruct the inquiry scan module 443 to perform an inquiry scan when the energy of an inquiry packet is detected in an inquiry scan mode.
The wakeup module 444 may be configured to periodically wake up the energy detection system 460 from a sleep state to perform an energy scan. For example, the wakeup module 460 may periodically wake up the energy detection system 460, e.g., once every 1.28 seconds for a duration of 11.25 ms. The receiver 30 and the modem processor 35 remain in the sleep state while the energy detection system 460 performs an energy scan. This is depicted in
Examples of processes that may be performed by the low power scan module 448 will now be discussed.
The process in
In this aspect, the shortened page scan starts at approximately one page train interval after the time of energy detection so that the channel at which the page packet is transmitted at the beginning of the page scan is the same as the channel at which the device performs the page scan. This is based on the assumption that each channel of the page train repeats every page train interval (e.g., 10 ms) and that the energy scan and the page scan are performed at the same channel. Thus, if the energy detection system detects 460 the page packet on a certain channel, then the page packet will be transmitted again on the same channel at the beginning of the page scan (one page train interval after the time of energy detection). This aspect saves power by using a shortened page scan. As shown in the example in
The process in
The process in
In each of the paths 1010 and 1015, its corresponding mixer 1025a/1025b frequency down-converts the respective signal to baseband by mixing the signal with a local oscillator signal LOI/LOQ from the frequency synthesizer 1050. The local oscillator signal LOQ of the mixer 1020b in the Q path 1015 is 90 degrees out of phase with the local oscillator signal LOI of the mixer 1020a in the I path 1010 to provide the Q component of the signal. The frequency synthesizer 1050 may tune the frequency of the local oscillator signals LOI and LOQ according to a desired channel inputted from the channel selector 446. In one aspect, the local oscillator signals LOI and LOQ may be tuned within a frequency range of 2.402 and 2.480 GHz, which may correspond to 79 different channels spaced 1 MHz apart. Other frequency ranges and channel schemes may be used. For example, the receiver may down-convert a received RF signal to an intermediate frequency instead of baseband. The receiver in
Implementation examples of the frequency synthesizer 1050 are given below. The buffers 1040a and 1040b in the local oscillator paths may be used to sharpen the edges of the local oscillator signals LOI and LOQ before going to the mixers 1025a and 1025b, respectively. The local oscillator paths may also include amplifiers for amplifying the local oscillator signals LOI and LOQ.
In each path, its corresponding baseband amplifier 1025a/1025b amplifies the respective baseband signal. The amplified output signal of the baseband amplifier 1025a/1025b is then filtered by the anti-aliasing filter 1032a/1032b to remove aliasing components before analog-to-digital conversion. The anti-aliasing filter may have an output bandwidth of approximately 700 KHz. The filtered output signal of the anti-aliasing filter 1032a/1032b is inputted to the respective ADC 1035a and 1035b to digitize the signal. The ADC 1035a and 1035b may have high linearity, high noise performance and high dynamic range (e.g., 70 dB). The digital output signals of the I and Q paths 1010 and 1015 are inputted to the modem processor 430 for digital processing. The modem processor 430 may perform demodulation (e.g., GFSK demodulation) on the digital signals to recover data in a page packet or inquiry packet of the received signal.
In a page scan mode, the channel selector 446 may hop channels based on a page channel hopping sequence. In one aspect, the channel selector 446 hops channels at a rate of one channel per page scan.
In a page scan mode or inquiry scan mode, the receiver 1030 may be powered on only 1% or less of the time, e.g., for a scan window of 11.25 ms and an interval of 1.28 seconds between page scans or 2.56 between inquiry scans. However, because a Bluetooth enabled device may operate most of the time in the page scan mode and/or inquiry scan mode, the receiver current in the page scan mode and inquiry scan mode may have a significant impact on the battery life of the device. Therefore, it is desirable to reduce current in the page scan mode and inquiry scan mode to extend the battery life of the device.
In this aspect, the energy detection system 1160 may include components from the receiver 1030 in
In one aspect of the disclosure, the mixer 1020a frequency down-converts the signal from the LNA 1005 at a desired channel to an intermediate frequency (IF) instead of baseband. For a GFSK modulated page or inquiry signal, the page or inquiry signal has a constant envelope when down-converted to IF, which allows all of its energy to be kept in one channel. The IF may be 4 MHz or another frequency. The IF output signal of the mixer 1020a is then amplified by the baseband amplifier 1025a, which has sufficient bandwidth to amplify the page signal at IF. The amplified output signal of the baseband amplifier 1025a is further amplified by the second amplifier 1110. The second amplifier 1110 may be used to further boost the power of the signal before energy detection, and may have a gain of 20 dB. The output signal of the second amplifier 1110 is then filtered by the band-pass filter 1120. In one aspect, the band-pass filter 1120 may be configured to have a band-pass that allows a page packet having a 1 MHz bandwidth centered at the IF to pass (e.g., 4 MHz±500 KHz) while filtering out out-of-band blockers. The band-pass filter 1120 may be implemented by a combination of a first-order low-pass filter and a first-order high-pass filter. The capacitor 1105 may be used to increase the low-pass filter to second-order to enhance filtering of blockers.
The energy detector 1130 then detects energy at the output of the band-pass filter 1120. For example, the energy detector may detect energy that is above a predetermined threshold. When energy is detected, the energy detector 1130 may send a detection signal to the low power scan module 448. Examples of types of energy detectors that may be used include root-mean square detectors, peak detectors and other types of detectors. The energy detector may be implemented in the analog or digital domain.
In one aspect, the channel selector 446 may hop channels for each energy scan based on the same page channel hopping sequence used for page scans. When energy is detected at a certain channel during an energy scan and a page scan or an inquiry scan is initiated in response to the energy detection, the page scan or the inquiry scan may be performed at the same channel at which the energy was detected. The page scan or the inquiry scan may be scheduled using any of the methods described above.
The peak voltage from the peak detector 1205 and the analog threshold voltage are inputted to the comparator 1215. The comparator 1215 may output a high signal when the peak voltage is above the threshold voltage indicating energy detection, and a low signal when the peak voltage is below the threshold voltage. The threshold value may be provided by the low page scan module 448 and may be set, e.g., depending on a desired sensitivity for the energy detector 1230.
The processor 1220 may detect the energy of a page packet or an inquiry packet when the comparator 1215 output is high. In one aspect, the processor 1220 may output a detection signal to the low power scan module 448 when the comparator 1215 output is high. In another aspect, the processor 1220 may keep track of a time duration for which the comparator 1215 output is high and output the detection signal, e.g., when the time duration is approximately equal to and/or greater than the duration of a page packet or inquiry packet (e.g., 68 μs).
In one aspect of the disclosure, a squaring circuit and filtering circuit may be used in place of the peak detector 1205 in the energy detector 1230. Since a GPSK modulated page or inquiry signal has a constant envelope in IF, the squaring circuit converts the page or inquiry signal to a DC voltage level, which is proportional to a peak or root-mean-square (rms) voltage of the page or inquiry signal, and a second-order harmonic. The filtering circuit may be used to filter out the second-order harmonic so that the DC voltage level is inputted to the comparator 1215 to detect the signal.
The energy detection system 1360 may further comprise an analog-to-digital converter 1305 configured to sample the input signal from the band-pass filter 1120 (e.g., at a sampling rate of 32 MHz) and convert each sample of the signal into a digital value. In one aspect, the analog-to-digital converter may be implemented by a 1-bit sampler and quantizer 1305 that performs 1-bit quantization of the input signal if its threshold is set to zero or a small voltage to overcome DC offset in the system. The 1-bit sampler and quantizer 1305 may sample the input signal at a sampling rate of 32 MHz. With a 32 MHz sampling rate and a 1 MHz signal bandwidth (e.g., bandwidth of a page packet), the over sampling ratio is 32, which increases the effective dynamic range of the 1-bit sampler and quantizer. Other sampling rates may be used. In one aspect, the band-pass filter 1120 and/or amplifier 1110 may be configured to filter out aliasing components for the 1-bit sampler and quantizer 1305.
The output of the 1-bit sampler and quantizer 1305 may then be digitally processed by the energy detector 1330 to determine whether the energy of a page packet or inquiry packet is present. In this aspect, the energy detector 1330 may be implemented by a Digital Signal Processor (DSP) or other type of processor. In this aspect, the energy detector 1330 may comprise two mixers 1310a and 1310b, two baseband filters 1315a and 1315b, an envelope detector 1320, a second baseband filter 1325, a hard decision detector 1335, and an energy profile processor 1340.
In one aspect, the output signal of the 1-bit sampler and quantizer 1305 is split between an I and Q path 1308a and 1308b and frequency down-converted to baseband by the mixers 1310a and 1310b, respectively. The mixers may be implemented digitally by multiplying the signal in each path 1308a and 1308b with a repeating 0, +1, 0, −1 sequence. The sequences for the I and Q mixers may be shifted by 1 bit with respect to each other. The I and Q baseband signals are then filtered by the baseband filters 1315a and 1315b, respectively, to remove noise. The baseband filters 1315a and 1315b may have a bandwidth in the range of hundreds of KHz, e.g., 220 KHz. The I and Q filtered baseband signals are then inputted to the envelope detector 1320.
In one aspect, the envelope detector 1320 may perform the following operation:
D=√{square root over (I2+Q2)} (2)
where D is the output of the envelope detector 1320, I is the I baseband signal, and Q is the Q baseband signal. Thus, the envelope detector 1320 in this aspect squares each of the I and Q baseband signals, and takes the square root of the sum of their squares.
In this aspect, the envelope detector 1320 removes the GFSK modulation of the I and Q baseband signals, and outputs a DC level providing a measure of the envelope of a page signal or an inquiry signal and, hence, the energy of a page signal or an inquiry signal. The output of the envelope detector 1320 may then be filtered by the second baseband filter 1325.
In one aspect, the second baseband filter 1325 may have a narrow bandwidth centered at DC to allow the detector output at DC to pass while attenuating signals away from DC. The second baseband filter 1325 may have a bandwidth in the range of tens of KHz, e.g., 25 KHz. Thus, the second baseband filter 1325 may be used to isolate the DC level outputted by the envelope detector by applying narrow-bandwidth filtering to the resulting signal. This technique may be used to filter out signals, e.g., that do not have a constant envelope.
The output signal from the second baseband filter 1325 may then be inputted to the hard decision detector 1335. The hard decision detector 1335 may be configured to compare the input signal with a hard decision threshold, and output a logic high when the input signal is above the hard decision threshold and a logic low when the input signal is below the hard decision threshold. The hard decision detector 1335 may have a sampling rate of 125 KHz or other sampling rate. Thus, the hard decision detector 1335 may make a hard decision of whether energy is present based on whether the input signal is above or below the hard decision threshold. The hard decision detector 1335 may have a programmable threshold, e.g., in the range of 0 to 255 bits.
The output of the hard decision detector 1335 may then be inputted to the energy profile processor 1340. In one aspect, the energy profile processor 1340 may be configured to measure the duration of energy detection by the hard decision detector 1335, and determine whether the duration of energy detection corresponds to the length of a page packet or an inquiry packet (e.g., 68 μs). The energy profile processor 1340 may measure the duration of energy detection, e.g., by counting a number of samples from the hard decision detector 1335 indicating detected energy within a time window. If the count within the time window is above a count threshold, then the energy profile processor 1340 may determine that the energy of a page packet or inquiry packet has been detected, and output a detection signal to the low power scan processor 448. The energy profile processor 1340 may use one or more counters (not shown) to count the number of samples indicating detected energy, and may receive a clock signal, e.g., Bluetooth clock, to keep track of time. Further, the energy profile processor 1340 may output a time stamp to the low power scan processor 448 indicating, e.g., a time that the energy of a page packet or inquiry packet is first detected.
In one aspect, the energy profile processor 1340 may determine whether two conditions are met before declaring the detection of a page packet or inquiry packet. The first condition may be that the number of samples indicating detected energy within a first time window be equal to or above a first count threshold. The first condition may be used to determine whether the duration of the energy detection is long enough to be from a page packet or inquiry packet (e.g., 68 μs). The second condition may be that the number of samples indicating detected energy within a second window be equal to or less that a second count value. The second condition may be used to determine whether the duration of the energy detection is too long to be from a page packet or inquiry packet, in which case, the detected energy may be from another signal (e.g., WLAN signal) that may interfere with a page packet or inquiry packet.
The energy detection system 1460 also comprises a second anti-aliasing filter 1430 and a decimator 1440 between the 1-bit sampler and quantizer 1205 and the mixers 1310a and 1310b. In one aspect, the decimator 1440 is configured to decimate the signal from the 1 bit sampler and quantizer to a sampling rate of 16 MHz. The second anti-aliasing filter 1430 may be configured to filter out aliasing components for a sampling rate of 16 MHz before decimation by the decimator 1440. In this aspect, the decimator 1440 decimates the signal to the mixers 1310a and 1310b to a sampling rate of 16 MHz to simplify the implementation of the mixers 1310a and 1310b for the case where IF is 4 MHz. This is because a sampling rate that is four times faster than the IF allows the mixers 1310a and 1310b to be implemented by multiplying the signal at each mixer 1310a and 1310b with a repeating sequence of 0, +1, 0, −1. Other sampling rates may be used for the decimator 1440, e.g., depending on the IF of the energy detection system 1460.
In one aspect, the RPLL 1515 generates a reference signal having a tunable frequency from an input reference clock and outputs the reference signal to the PLL 1530. For example, the reference signal can be tuned within a frequency range of 75 MHz to 77.5 MHz based on a desired channel from the channel selector 446. The RPLL 1515 may be implemented using a fractional-N PLL or other type of PLL. The PLL 1530 receives the tunable reference signal from the RPLL 1515 and generates an oscillator signal from the reference signal, in which the oscillator signal has a frequency that can be tuned within a frequency range of 4.804 GHz to 4.960 GHz by tuning the frequency of the reference signal from the RPLL 1515. The oscillator signal may then be frequency divided by an IQ divide-by-2 divider 1555 to a frequency range of 2.402 GHz to 2.480 GHz and split into local oscillator signals LOI and LOQ for direct conversion of RF signals to baseband. In this aspect, the frequency of the local oscillator signals LOI and LOQ can be tuned in increments of 1 MHz within the frequency range 2.402 GHz to 2.480 GHz to select different channels by tuning the frequency of the reference signal from the RPLL 1515 inputted to the PLL 1530. The frequency ranges given above are exemplary only, and other frequency ranges may be used.
In one aspect, the PLL 1530 comprises a phase frequency detector (PFD) 1532, a charge pump 1535, a loop filter 1537, a voltage-controlled oscillator (VCO) 1540, the IQ divide-by-2 divider 1555, and a feedback frequency divider 1545. The loop filter may be used to provide stability and filtering to the feedback loop of the PLL 1530. In this aspect, the feedback frequency divider 1545 may divide the output signal of the VCO by a fixed integer (e.g., 32), which is fed to one of the inputs of the PFD 1532 to form a feedback loop. For an example where the frequency divider 1545 divides by 32, the total division along the feedback loop is 64 and the VCO 1540 generates a tunable oscillator signal having a frequency range of 4.804 GHz to 4.960 GHz when the reference signal has a frequency range of 75 GHz to 77.5 GHz.
In operation, the PFD 1532 compares the phases of the tunable reference signal and the VCO output signal divided by the frequency dividers 1545 and 1555 and outputs a phase error signal to the charge pump 1535 based on the phase difference between the two signals. The charge pump 1535 then injects current into or pulls current from capacitors (not shown) in the loop filter 1537 based on the phase error signal. The current injected into or pulled from the capacitors in the loop filter 1537 adjusts the voltage outputted by the loop filter 1537, which supplies the control voltage to the VCO 1540. The resulting adjustment of the control voltage to the VCO 1540 adjusts the frequency of the VCO 1540 in a direction that minimizes the phase error.
In one aspect, the DPLL 1615 may comprise a fractional-N PLL configured to generate a reference signal having a fixed frequency (e.g., 32 MHz) from a reference clock signal. The reference clock signal may come from a crystal oscillator, and may be the same reference clock signal inputted to the RPLL 1515 in
In one aspect, the DPLL 1615 outputs a fixed-frequency reference signal (e.g., 32 MHz) to the PLL 1630. The PLL 1630 comprises a phase frequency detector (PFD) 1632, a charge pump 1635, a loop filter 1637, a voltage-controlled oscillator (VCO) 1640, two divide-by-2 dividers 1655 and 1660, a divide-by-4 divider 1665 and a frequency divider 1645.
In one aspect, the frequency divider 1645 is configured to divide the frequency of the VCO output signal in the feedback loop by an adjustable fractional divisor. The frequency divider 1645 may be implemented using a dual-modulus divider that provides an adjustable fractional divisor between two integers (e.g., 9 and 10). In one aspect, the fractional divisor may be realized by toggling the frequency divider 1645 between 9 and 10, in which the fractional divisor is determined by the percentage of time the frequency divider 1645 spends on 9 and 10. In this aspect, a modulus controller 1647 may control the fractional divisor of the frequency divider 1645. The frequency divider 1645 may be configured to implement other fractional divisors besides fractional divisors between 9 and 10.
In one aspect, the frequency of the oscillator signal outputted by the PLL 1630 may be tuned by adjusting the fractional divisor of the frequency divider 1645 in the feedback path of the PLL 1630. In this aspect, the modulus controller 1647 may adjust the fractional divisor of the frequency divider 1645, and hence tune the frequency of the oscillator signal, based on a desired channel from the channel selector 446. The frequency of the oscillator signal may be tuned to down convert an RF signal corresponding to the desired channel to IF (e.g., 4 MHz) at the mixer 1020a. Thus, the oscillator signal in this aspect may be generated from a fixed-frequency reference signal from the DPLL 1615 and tuned by adjusting the fractional divisor of the frequency divider 1645.
The frequency synthesizer 1610 may use high-side or low-side injection to down convert an RF signal to IF. For example, for a channel corresponding to 2.432 GHz and an IF of 4 MHz, the oscillator output may be 2.436 GHz (high-side injection) or 2.428 (low-side injection) to down convert the RF signal to IF. The frequency synthesizer may alternate between the two types of injections. For example, if one of the types of injections is susceptible to spurs from the frequency divider at a certain channel, then the frequency synthesizer may use the other type of injection for that channel.
In one aspect, the frequency synthesizer 1710 comprises a DPLL 1615, a RPLL 1515, a switch 1717, and a PLL 1730. The switch 1717 couples either the DPLL 1615 or the RPLL 1515 to the PLL 1730 based on the mode of operation of the frequency synthesizer 1710. When the frequency synthesizer 1710 operates in a page scan mode, the switch 1717 couples the RPLL 1515 to the input of the PLL 1730. When the frequency synthesizer 1710 operates in an energy scan mode, the switch couples the DPLL 1615 to the input of the PLL 1730.
The PLL 1730 comprises a PFD 1732, a charge pump 1735, a loop filter 1737, and VCO 1740. The PLL 1730 further comprises two feedback paths to support the two modes of operation of the frequency synthesizer. A first feedback path comprises two divide-by-2 dividers 1757 and 1760 and a frequency divider 1745. A second feedback path comprises the two divide-by-2 1757 and 1760, a divide-by-4 divider 1665 and a frequency divider 1645. A switch 1727 couples either the first feedback path or the second feedback path to the input of the PFD 1732 depending on the mode of operation of the frequency synthesizer 1710. When the frequency synthesizer 1710 operates in a page scan mode, the switch 1727 couples the first feedback path to the input of the PFD 1732. When the frequency synthesizer 1710 operates in an energy scan mode, the switch 1727 couples the second feedback path to the input of the PFD 1732.
In one aspect, the loop filter 1737 may be programmable to adjust the loop bandwidth of the PLL 1730 for the different modes of operation. An example of a programmable loop filter is given below. Also, the charge pump 1735 may be programmable to adjust the current of the charge pump for the different modes of operation.
In one aspect, the VCO 1740 may have a programmable bias current. The bias current may be lowered in the energy scan mode to conserve power. Although lowering the bias current in the energy scan mode may increase the phase noise of the VCO 1740, the noise requirements of the energy detection system is relaxed compared with the receiver in the page scan mode. For example, the current of the charge pump in the energy scan mode may be reduced by 30% compared to the page scan mode.
In a page scan mode, the output signal of the VCO 1740 is frequency divided by the two divide-by-2 dividers 1757 and 1760 and the frequency divider 1745, and is fed back to the input of the PFD 1730 after frequency division. In one aspect, the frequency divider 1745 may be configured to frequency divide by 15, 16 or 17. When the frequency divider 1745 divides by 16, the total division along the first feedback loop is by 64, which is similar to the frequency synthesizer 1510 in
In an energy scan mode, the output signal of the VCO 1740 is frequency divided by the two divide-by-2 dividers 1757 and 1760, the divide-by-4 divider 1665, and the frequency divider 1645. The signal from the VCO 1740 is fed back to the input of the PFD 1730 after the frequency division. In an energy scan mode, the PLL 1730 may function similarly to the PLL 1630 in
In one aspect, the mode of operation of the frequency synthesizer 1710 may be controlled by a mode selector 1780, which may be implemented in the processing system 440. In one aspect, the mode selector 1780 may send control signals 1782 and 1784 to switches 1717 and 1727, respectively, to control which reference signal and feedback loop are used by the frequency synthesizer 1710. The control signal 1782 may be in the form of a 1-bit control signal, in which the switch 1717 couples the RPLL 1515 to the PFD 1732 when the bit value is zero and couples the DPLL 1615 to the PFD 1732 when the bit value is one. Similarly, the control signal 1784 may be in the form of a 1-bit control signal, in which the switch 1727 couples the first feedback loop to the PFD 1732 when the bit value is zero and couples the second feedback loop to the PFD 1732 when the bit value is one. In this aspect, the mode selector 1780 may output a bit value of zero for both control signals 1782 and 1784 in a page scan mode and a bit value of one for both control signals 1782 and 1784 in an energy scan mode. The control signals 1782 and 1784 may be the same.
In one aspect, the mode selector 1780 may send a control signal 1788 to the loop filter 1737 to control the loop bandwidth of the PLL 1730 based on the mode of operation of the frequency synthesizer 1710. For example, the mode selector 1780 may reduce the loop bandwidth of the PLL in the energy scan mode to filter out DPLL noise as well as attenuate fractional spurs generated by the fractional division of the frequency divider 1645.
In one aspect, the mode selector 1780 may send a control signal 1786 to the charge pump 1735 to control the current level of the charge pump 1735 based on the mode of operation of the frequency synthesizer 1710. For example, the mode selector may reduce the current of the charge pump 1735 in conjunction with the reduction in the loop bandwidth of the PLL in the energy scan mode to maintain adequate phase margin.
In one aspect, the mode selector 1780 may adjust the current bias 1790 to the VCO 1740 based on the mode of operation of the frequency synthesizer 1710. For example, the mode selector 1780 may lower the bias current in the energy scan mode to reduce power consumption with a tradeoff of higher VCO noise.
In one aspect, the accumulator output 1910 is fed back to the input 1912 of the accumulator through the D flip flop 1920. The other input 1914 of the accumulator receives a channel input. In this aspect, the D flip flop 1920 may be clocked by the DPLL (e.g., 32 MHz), in which the accumulator output 1920 is fed back to the input 1912 of the accumulator 1910 on every clock cycle.
In operation, the value of the channel input controls how frequently the accumulator overflows and outputs an overflow signal to the frequency divider. This in turn controls how frequently the frequency divider 1645 is toggled to 10, and hence the fractional divisor of the frequency divider 1645, which controls the frequency of the local oscillator signal. In one aspect, the channel input may have different values corresponding to different channels, in which a value corresponding to a desired channel is inputted to the accumulator 1910. The channel input may be provided by the channel selector, which may select channels based on a page channel hopping sequence or other channel hopping scheme.
Although the subject technology was described in the context of page scans and inquiry scans, the principles of the subject technology may be used to detect the energy of other types of packets. For example, the subject technology may be used to conserve power in applications where a device periodically scans for a packet of data by detecting the energy of the packet first, and performing a scan for the packet when its energy is detected. As another example, the subject technology may be applied in situations where a device scans for a packet of data that is transmitted on a repeating train by another device. The train may comprise a sequence of channels and may repeat every train interval. In this example, when the energy of the packet is detected, the scanning device may scan for the packet after approximately a train interval after the time of energy detection. Thus, the subject technology is not limited to the examples of page scans and inquiry scans. Further, the subject technology may be applied to page scans and inquiry scans used in other technologies besides Bluetooth.
Various components and blocks may be arranged differently (e.g., arranged in a different order, or partitioned in a different way) all without departing from the scope of the subject technology. For example, a functionality implemented in a processing system 440 of
By way of illustration and not limitation, an electronic device may be a cellular phone, a personal digital assistance (PDA) device, an audio device, a video device, a multimedia device, a game console, a laptop, a computer, a wireless headset, a wireless mouse, a wireless keyboard, a page scanning device, a Bluetooth enabled device, a processing system, a processor, or a component thereof, or any other electronic/optical device. By way of illustration and not limitation, an electronic device may include one or more integrated circuits. By way of illustration and not limitation, a page signal may include a page packet or a portion thereof.
Examples of particular communications protocols and formats have been given to illustrate the subject technology. However, the subject technology is not limited to these examples and applies to other communications protocols and formats.
Those of skill in the art would appreciate that the various illustrative blocks, units, elements, components, methods, and algorithms described herein may be implemented as electronic hardware, computer software, or combinations of both. To illustrate this interchangeability of hardware and software, various illustrative blocks, units, elements, components, methods, and algorithms have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application.
It is understood that the specific order or hierarchy of steps in the processes disclosed is an illustration of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged. Some of the steps may be performed simultaneously. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but is to be accorded the full scope consistent with the language claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed under the provisions of 35 U.S.C. §112, sixth paragraph, unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited using the phrase “step for.”
