This application relates to driving or updating active-matrix, electro-optic display devices with display pixels having multiple stable display states.
An electro-optic material has at least two “display states,” the states differing in at least one optical property. An electro-optic material may be changed from one state to another by applying an electric field across the material. The optical property may or may not be perceptible to the human eye, and may include optical transmission, reflectance, or luminescence. For example, the optical property may be a perceptible color or shade of gray.
Electro-optic displays include the rotating bichromal member, electrochromic medium, electro-wetting, and particle-based electrophoretic types. Electrophoretic display (“EPD”) devices, sometimes referred to as “electronic paper” devices, may employ one of several different types of electro-optic technologies. Particle-based electrophoretic media include a fluid, which may be either a liquid, or a gaseous fluid. Various types of particle-based EPD devices include those using encapsulated electrophoretic, polymer-dispersed electrophoretic, and microcellular media. Another electro-optic display type similar to EPDs is the dielectrophoretic display.
Generally, an image is formed on an electro-optic display device by individually controlling the display states of a large number of small individual picture elements or display pixels. A data pixel having one or more bits defines a particular display state of a display pixel. A frame of data pixels defines an image. Commonly, the display pixels are arranged in rows and columns forming a display matrix. An exemplary electro-optic display pixel includes a layer of electro-optic material situated between a common electrode and a pixel electrode. One of the electrodes, typically the common electrode, may be transparent. The common and pixel electrodes together form a parallel plate capacitor at each display pixel, and when a potential difference exists between the electrodes, the electro-optic material situated in between the electrodes experiences the resulting electric field.
An active-matrix display includes at least one non-linear circuit element, such as a transistor, for each display pixel. An exemplary active-matrix display pixel includes a thin-film transistor having its drain terminal coupled with the pixel electrode. The gate and source terminals of the transistor are respectively coupled with a row select line and a column data line. To change the display state of the display pixel, the common electrode is placed at ground or some other suitable voltage and a row driver circuit turns on the transistor by driving a suitable voltage on the row select line. An optical-property-dependent voltage corresponding with a display state transition may then be driven on the column data line by a column driver circuit.
An electro-optic display device may have display pixels that have multiple stable display states. Display devices in this category are capable of displaying (a) multiple display states, and (b) the display states are considered stable. With respect to (a), display devices having multiple stable display states include electro-optic displays that may be referred to in the art as “bistable.” The display pixels of a bistable display have first and second stable display states. The first and second display states differ in at least one optical property, such as a perceptible color or shade of gray. For example, in the first display state, the display pixel may appear black and in the second display state, the display pixel may appear white. In addition, display devices having multiple stable display states include devices having display pixels that have three or more stable display states. Each of the multiple display states differ in at least one optical property, e.g., light, medium, and dark shades of a particular color. As another example, a display device having multiple stable states may have display pixels having display states corresponding with 4, 8, 16, 32, or 64 different shades of gray.
With respect to (b), the multiple display states of a display device may be considered to be stable, according to one definition, if the persistence of the display state with respect to display pixel drive time is sufficiently large. The display state of a display pixel may be changed by driving a drive pulse (typically a voltage pulse) on the column data line of the display pixel until the desired appearance is obtained. Alternatively, the display state of a display pixel may be changed by driving the column data line over time with a series of drive pulses regularly spaced in time. In either case, the display pixel exhibits a new display state at the conclusion of the drive time. If the new display state persists for at least several times the minimum duration of the drive time, the new display state may be considered stable. Generally, in the art, the display states of display pixels of LCDs and CRTs are not considered to be stable.
EPD devices may be used in many different applications. For example, EPD devices may be used in electronic readers, cellular telephones, digital photo frames, and commercial signage. In various applications, the EPD device may be used to render a main image. Considering the example of the electronic reader, the main image may be a welcome screen, a page of a book, newspaper, magazine, or other document. In addition, the EPD device may be used to render an “overlay image.” The overlay image may be, for example, a pop-up menu, dialog box, icon, cursor, battery charge level indicator, message indicator, text, or other type of graphical image. The sub-windows may appear to overlay the main image being rendered. The location and size of the overlay image on the display may vary. During a session of use, a variety of different main and overlay image may be rendered at different times.
The display state of an EPD display pixel may be changed by applying one or more drive pulses. The drive pulse(s) required to change the display state of an EPD display pixel may depend on the prior display state of the display pixel, as well as other factors, which presents novel problems when rendering overlay images on an EPD device.
Accordingly, there is a need for methods and apparatus for efficient rendering of overlay images in an EPD device.
According to one embodiment, a method includes storing data pixels defining a first image in a first image buffer, and storing data pixels defining a second image in a second image buffer. In addition, the method includes storing a coordinate location of the second image in a memory, The coordinate location may define a first display location in a display matrix of a display device having display pixels, the display pixels having multiple stable states. Further, the method includes reading the data pixels of the first image from the first image buffer. If the coordinate location of a data pixel read from the first image buffer is within the first display location, the method includes reading a data pixel from the second image buffer corresponding with the data pixel read from the first image buffer, and combining the data pixel read from the second image buffer with the corresponding data pixel read from the first image buffer to generate a derived data pixel. Synthesized pixels corresponding with at least each of the data pixels of the second image are generated. The synthesized pixels respectively include the derived data pixels.
According to one embodiment, a display controller includes a first memory and a second memory. The first memory includes a first image buffer to store data pixels defining a first image and a second image buffer to store data pixels defining a second image. The second memory serves to store a coordinate location of the second image. The coordinate location of the second image defines a first display location in a display matrix of a display device having display pixels, the display pixels having multiple stable states. In addition, the display controller includes a first unit. The first unit reads data pixels of the first image from the first image buffer, and if the coordinate location of a data pixel read from the first image buffer is within the first display location, reads a data pixel from the second image buffer corresponding with the data pixel read from the first image buffer, and combines the data pixel read from the second image buffer with the corresponding data pixel read from the first image buffer to generate a derived data pixel. Further, the first unit generates synthesized pixels corresponding with at least each of the data pixels of the second image, the synthesized pixels respectively including the derived data pixels.
In the following detailed description of exemplary embodiments, reference is made to the accompanying drawings, which form a part hereof. In the several figures, like referenced numerals identify like elements. The detailed description and the drawings illustrate exemplary embodiments. Other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the subject matter presented here. The following detailed description is therefore not to be taken in a limiting sense, and the scope of the claimed subject matter is defined by the appended claims.
The display state of a display pixel may be changed by applying one or more drive pulses. The drive pulse(s) required to change the display state of a display pixel depends on the prior display state of the display pixel, as well as other factors, which presents novel problems when rendering overlay images on an EPD device. When display pixels of an overlay image are rendered instead of display pixels of the main image on an EPD device, it necessary to determine the prior display state in order to select the correct drive pulse(s), the prior display state being the display state of the main image pixel. In addition, when an overlay image is moved from one location to another, the display pixels that were formerly hidden by the overlay image need to be driven to a new display state. It is again necessary to know the prior display state of the display pixels in order to select the correct drive pulse(s). The need to know prior display states is a problem not solved in known display controllers that support overlay images. Accordingly, there is a need for methods and apparatus for efficient rendering of overlay images in an EPD device.
The host 22 may be a general purpose microprocessor, digital signal processor, controller, computer, or any other type of device, circuit, or logic that executes instructions of any computer-readable type to perform operations. Any type of device that can function as a host or master is contemplated as being within the scope of the embodiments.
In one embodiment, the display device 24 may be an electro-optic display device with display pixels having multiple stable display states in which individual display pixels may be driven from a current display state to a new display state by series of two or more drive pulses. In one alternative, the display device 24 may be an electro-optic display device with display pixels having multiple stable display states in which individual display pixels may be driven from a current display state to a new display state by a single drive pulse. The display device 24 may be an active-matrix display device. In one embodiment, the display device 24 may be an active-matrix, particle-based electrophoretic display device having display pixels that includes one or more types of electrically-charged particles suspended in a fluid, the optical appearance of the display pixels being changeable by applying an electric field across the display pixel causing particle movement through the fluid.
In one embodiment, the display controller 28 may be disposed on an integrated circuit (“IC”) separate from other elements of the system 20. In an alternative embodiment, the display controller 28 need not be embodied in a separate IC. In one embodiment, the display controller 28 may be integrated into one or more other elements of the system 20. The display controller 28 is further described below.
The system memory 30 may be may be an SRAM, VRAM, SGRAM, DDRDRAM, SDRAM, DRAM, flash, hard disk, or any other suitable memory. The system memory may store instructions that the host 22 may read and execute to perform operations. The system memory may also store data or instructions.
The display memory 32 may be an SRAM, VRAM, SGRAM, DDRDRAM, SDRAM, DRAM, flash, hard disk, or any other suitable memory. The display memory 32 may be a separate memory unit (shown in dashed lines), such as a separate IC, or it may be a memory embedded in the display controller 28, as shown in
The waveform memory 34 may be a flash memory, EPROM, EEPROM, or any other suitable non-volatile memory. The waveform memory 34 may store one or more different drive schemes, each drive scheme including one or more waveforms used for driving a display pixel to a new display state. The waveform memory 34 may include a different set of waveforms for one or more update modes. The waveform memory 34 may include waveforms suitable for use at one or more temperatures. The waveform memory 34 may be coupled with the display controller 28 via a serial or parallel bus. The waveform memory may also store data or instructions.
The drive pulse (or more typically, the series of drive pulses) required to change the display state of a display pixel to a new display state depends on temperature and other factors. To determine temperature, the temperature sensor 36 is provided. The temperature sensor 36 may be a digital temperature sensor with an integrated Sigma Delta analog-to-digital converter or any other suitable digital temperature sensor. In one embodiment, the temperature sensor 36 includes an I2C interface and is coupled with the display controller 28 via the I2C interface. The temperature sensor 36 may be mounted in a location suitable for obtaining temperature measurements that approximate the actual temperatures of the display pixels of the display device 24. The temperature sensor 36 may be coupled with the display controller 28 in order to provide temperature data that may be used in selecting a display pixel drive scheme.
The power module 38 is coupled with the display controller 28 and the display device 24. The power management unit 38 may be a separate IC. The power module 38 receives control signals from the display controller 28 and generates drive pulses of appropriate voltage (or current) to drive selected display pixels of the display device. In one embodiment, the power management unit 38 may generate voltages of +15V, −15V, or 0V. When drive pulses are not needed, the power module 38 may be powered down or placed in a standby mode.
The display device 24 may be coupled with the display controller 28 via one or more buses 50 that the display controller uses to provide pixel data and control signals to the display. The display state of a display pixel 40 is defined by one or more bits of data, which may be referred to as a “data pixel.” An image is defined by data pixels and may be referred to as a “frame.” Commonly, the display pixels are arranged in rows and columns forming a matrix (“display matrix”) 26. There is a one-to-one correspondence between data pixels of a frame and the display pixels 40 of a corresponding display matrix 26.
The display pixels 40 of the display matrix 26 of the display device 24 may have multiple stable states. In one embodiment, the display device 24 is a display device having display pixels 40 having three or more stable display states, each display state differing in at least one optical property. In one alternative embodiment, the display device 24 is a bistable display device having display pixels 40 which have first and second stable display states, each state differing from the other in at least one optical property. The display state of a display pixel 40 may be persistent with respect to drive time. In one embodiment, the display state of a display pixel 40 persists for at least two or three times the minimum duration of the drive time. In addition, in one embodiment, the drive pulse required to change the display state of a display pixel 40 from a current display state to a new display state strongly depends on the current display state.
In one embodiment, the display device 24 includes a layer of electro-optic material situated between a common electrode and a pixel electrode. One of the electrodes, typically the common electrode, may be transparent. The common and pixel electrodes together form a parallel plate capacitor, and when a potential difference exists between the electrodes, the electro-optic material situated in between the electrodes experiences the resulting electric field. This general arrangement may be in the form of one parallel plate capacitor at each display pixel, or more than one parallel plate capacitor at each display pixel.
To change the display state of a display pixel 40, the common electrode 56 is placed at ground or some other suitable voltage and the row driver circuit 42 turns on all of the transistors 60 in one of the rows by driving a suitable voltage on the row select line 46. The column driver circuit 44 then drives a drive pulse on the column data lines 48 of data pixels having their display state changed. As charge builds up on the common and pixel electrodes 56, 58 an electric field is established across the microcapsule(s) 54 associated with a particular display pixel. When the electric field is positive, the white particles 62 move toward the electrode 56, which results in the display pixel becoming whiter in appearance. On the other hand, when the electric field is negative, the black particles 64 move toward the electrode 56, which results in the display pixel becoming blacker in appearance. The microcapsule 54a is a simplified representation of a display pixel that is completely white and the microcapsule 54b is a simplified representation of a display pixel that is completely black. In addition, the microcapsule 54c illustrates a display pixel having a gray-scale value other than completely white or black, i.e., gray.
So long as charge is stored on the common and pixel electrodes 56, 58 there will be an electric field across the display pixel causing particle movement through the fluid. It will be appreciated that even after the row driver circuit 42 turns a transistor 60 off, or the column driver circuit 44 stops driving a drive pulse on the column data line 48, charge may remain on the common and pixel electrodes 56, 58, i.e., the field does not instantly collapse. In addition, particles 62, 64 may have momentum. Accordingly, particle movement through the fluid may continue for some time after a display pixel has been driven.
While the display state of a display pixel may be changed by having the column driver apply and hold an appropriate drive pulse on the column data line 48 until the desired display state is obtained in a single time interval, alternative methods may be employed for changing the display state of a display pixel. Various alternative methods provide for driving a series of drive pulses over time. In these methods, the display matrix 26 is refreshed or updated in a series of two or more “drive frames.” For each drive frame in the series, each row is selected once, allowing the column driver 44 to drive a drive pulse onto each display pixel of the selected row having its display state changed. The duration of time that each row is selected may be identical so that each drive frame in the series is of identical duration. Thus, instead of changing the display state of a display pixel with a single drive pulse in a single time period, the display state may be changed by driving a series of drive pulses in a series of time periods regularly spaced in time.
The waveform 66 is provided for the purpose of illustrating features of waveforms generally and for defining terms. The waveform 66 is not intended to depict an actual waveform. The time periods shown in
The display device 24 may make use of multiple drive schemes. For example, the display device 24 may use a gray scale drive scheme (“GSDS”), which can be used to cause transitions between all possible gray levels. In addition, display device 24 may use a monochrome drive scheme (“MDS”), which can be used to cause transitions only between two gray levels, e.g., black or white. Further, the display device 24 may use a pen update mode (PU), which can be used to cause transitions having an initial state that includes all possible gray levels and a final state of either black or white. The MDS and PU drive schemes typically provide quicker rewriting of the display than the GSDS drive scheme. A drive scheme may be selected based on the type of display state transitions that are needed. For instance, if display pixels may take any one of 16 gray levels and the region being updated includes display pixels transitioning from 10 to 15, then the GSDS drive scheme must be used. However, if the region being updated includes display pixels transitioning from 10 to 0, or 10 to 15, then either the GSDS or PU drive schemes may be used. Because the PU drive scheme is faster than the GSDS drive scheme, the PU drive scheme would generally be used. In alternative embodiments, any number of display states may be provided, e.g., 2, 4, 8, 32, 64, 256, etc.
Use of the display controller 28 permits the image displayed on an electro-optic display device having multiple stable display states to be divided into two or more regions and each of the regions may be updated in separate display update operations. Each display update operation may use a different drive scheme or update mode, and the display update operations may overlap in time. Each display update operation may use a different update pipe 84. The updating of a first region of the display matrix using a first update mode can begin even while a display update operation for updating a second region using a second update mode is in progress.
The image buffer 78 may be used to store a frame of data pixels, e.g., a main image. The PIP buffer 82 may be used to store a first overlay image and the cursor buffer 83 may also be used to store a second overlay image. The update buffer 80 may be used to store synthesized pixels. In one embodiment, a “synthesized pixel” is a data structure or a data record that defines a pixel transition. A synthesized pixel may include data defining a current display state and a next display state. A synthesized pixel may additionally include an identifier of an assigned update pipe 84.
The host 22 may store a full frame of data pixels or a portion of a frame of data pixels in the image buffer 78 using data path A. The pixel processor 88 may include an operability to generate synthesized pixels. In a pixel synthesis operation, the pixel processor 88 may read a data pixel stored in the image buffer 78, PIP buffer 82, and cursor buffer 83 to obtain data defining a next display state of a display pixel 40 using data path B. In one embodiment, the pixel processor 88 may read a synthesized pixel stored in the update buffer 80 to obtain data defining a current display state of a display pixel 40 using data path C. The pixel processor 88 may use the data pixel obtained from one of the image buffer 78, PIP buffer 82, and cursor buffer 83, and the synthesized pixel obtained from the update buffer 80 to generate a new synthesized pixel. The pixel processor 88 may store synthesized pixels that it generates in the update buffer 80 using data path C. The storing of a synthesized pixel in the update buffer 80 by the pixel processor 88 may overwrite a previously stored synthesized pixel.
In one embodiment, an imaging device, such as a camera, or an interface circuit, such as a pen input interface circuit, may store a first overlay image in the PIP buffer 82. The imaging device or interface circuit may also store coordinates for defining the location of the first overlay image in the registers 89. A circuit internal to the display controller, or the imaging device or interface circuit may send a display update command.
In one embodiment, an interface circuit, such as a mouse or trackball input interface circuit, may store a second overlay image in the cursor buffer 92. The interface circuit may also store coordinates for defining the location of the second overlay image in the registers 89. A circuit internal to the display controller, or interface circuit may send a display update command.
In an operation 1004, the coordinate location in the display matrix 26 of the data pixel read from the image buffer 78 in operation 1002 is inspected. It is determined if the data pixel read from the image buffer 78 is inside of the PIP region in operation 1004. The coordinates of the PIP region may be read from the registers 89 as part of operation 1004. The PIP region may correspond with a first submatrix 52. If the data pixel read from the image buffer 78 is outside of the PIP region, the pixel synthesis operation 1000 may, in one embodiment, advance to operation 1010. On the other hand, if the data pixel read from the image buffer 78 is inside of the PIP region, a data pixel is read or fetched from the PIP buffer 82 in an operation 1006. The data pixel that is fetched from the PIP buffer has a coordinate location corresponding with the data pixel fetched from the image buffer 78. In an operation 1008, the respective data pixels of the image and PIP buffers may be combined to generate or produce a “derived” data pixel. The respective data pixels may be combined by selecting one data pixel or the other. The respective data pixels may be combined in an “XOR” operation. The data pixels stored in the PIP buffer may include “transparent” pixels. In one embodiment, the pixel data read from the PIP buffer may be inverted if it is not transparent and the pixel data read from the image buffer 78 may be inverted if the pixel data read from the PIP buffer is transparent. In one embodiment, the respective data pixels may be combined by selecting the data pixel from the update buffer if the corresponding data pixel from the PIP buffer is transparent, and otherwise selecting the data pixel from the PIP buffer. The pixel synthesis operation 1000 advances to operation 1010 after the operation 1008.
In operation 1010, it is determined if the data pixel read from the image buffer 78 is inside of the cursor region. The coordinates of the cursor region may be read from the registers 89 as part of operation 1010. The cursor region may correspond with a second submatrix 52. If the data pixel read from the image buffer 78 is outside of the cursor region, the pixel synthesis operation 1000 may advance to operation 1018. On the other hand, if the data pixel read from the image buffer 78 is inside of the cursor region, a data pixel is read or fetched from the cursor buffer 82 in an operation 1012. The data pixel that is fetched from the cursor buffer 82 has a coordinate location corresponding with the data pixel fetched from the image buffer 78. In an operation 1014, the respective data pixels of the image and PIP buffers may be combined to generate or produce a “derived” data pixel. The respective data pixels may be combined by selecting one data pixel or the other. The respective data pixels may be combined by calculating a combination of the two values, e.g., a weighted average. Operation 1014 is analogous to operation 1008 and any of the techniques described above with respect operation 1008 may be employed in operation 1014. However, the operations 1008 and 1014 need not employ the same combining technique. The pixel synthesis operation 1000 advances to operation 1018 after the operation 1014.
In operation 1018, a data pixel is compared with a next pixel value. The data pixel compared in operation 1018 may be the data pixel fetched in operation 1002, the data pixel resulting from the combining operation 1008, or the data pixel resulting from the combining operation 1014. The particular data pixel compared in operation 1018 depends on the results of the determinations made in operations 1004 and 1010. The next pixel value compared in operation 1018 is obtained from the synthesized pixel fetched in operation 1016. A next pixel value is included in the data structure of each synthesized pixel and represents the current display state of a corresponding display pixel. Operation 1018 compares the data pixel and the next pixel value to determine if they are equal. If the values are equal, i.e., the next and current display states are identical, then the corresponding display pixel is not marked for updating. On the other hand, if the values differ, i.e., the next and current display states differ, then the corresponding display pixel is marked for updating.
In operation 1020, a new synthesized pixel may be formed or generated. If the display pixel was not marked for updating in operation 1018, a new synthesized pixel need not be formed. If the display pixel was marked for updating, the next pixel value obtained from the fetched synthesized pixel (operation 1016) is set as the current pixel value in the new synthesized pixel. The value of the data pixel from operations 1002-1014 is set as the next pixel value in the new synthesized pixel. In operation 1022, the new synthesized pixel is written back to the update buffer 80. The operation 1022 may overwrite a previously stored synthesized pixel. As indicated by operation 1024, the pixel synthesis operation 1000 repeats operations 1002-1022 for each pixel location in the display matrix 26 according to one embodiment.
According to one alternative embodiment, the pixel synthesis operation 1000 may omit processing for the PIP region. The operations 1004-1008 may be omitted, for example, when a PIP region is not being rendered. In addition, in another embodiment, the pixel synthesis operation 1000 may omit processing for the cursor region. The operations 1010-1014 may be omitted, for example, when a cursor region is not being rendered. In addition, additional operations may be added if more than one PIP region or cursors is desired.
According to one alternative embodiment, the pixel synthesis operation 1000 may only fetch data pixels corresponding with locations within the PIP region, the cursor region, or the PIP and cursor regions. In these embodiments, operation 1002 does not fetch display pixels from the image buffer 78 in raster order. Rather, the operation 1002 may include accessing the registers 89 to determine coordinate locations of the PIP region and cursor regions. The operation fetches only data pixels from the image buffer 78 corresponding with locations within the PIP or cursor regions in one embodiment.
According to another alternative embodiment, the pixel synthesis operation 1000 may be synchronized with the fetching of synthesized pixels by the sequencer 90. The pixel processor 88 and the update pipe sequencer 90 may share synthesized pixels fetched from the update buffer 80. The update pipe sequencer 90 may fetch synthesized pixels in raster order via a splitter. The splitter may provide one copy of the fetch synthesized pixel to the pixel processor 88 and another copy to the update pipe sequencer 90. In one embodiment, the pixel processor 88 may generate a synthesized pixel for a particular location only after receiving a corresponding synthesized pixel from the splitter in lieu of the operation 1016. This embodiment is further described in co-pending application Ser. No. ______, filed on Apr. 24, 2009, (Attorney Docket No. VP291). The entire content of this application is hereby incorporated by reference.
Referring again to
In one embodiment, an update pipe 84 locates a drive scheme stored in the waveform memory 34 corresponding with a designated update mode and a current temperature. For each drive frame in the waveform period, the update pipe 84 copies all possible drive pulses for the drive scheme for the current drive frame and stores the current drive frame pulses in a lookup table associated with the update pipe. The update pipe 84 uses the current and next display states of a synthesized pixel to locate drive pulse data in the lookup table and stores the pulse data in a first-in-first-out memory (“FIFO”) memory, which may be included within the update pipe. The FIFO memory is provided so that pulse data may be generated and buffered ahead of when it will be needed by the timing generation unit 86. The FIFO may be provided with one or more status flags that indicate the amount of drive pulse data present in the FIFO, e.g., full, half full, empty, etc.
The timing generation unit 86 includes an input that is coupled with the outputs of the update pipes 84. The timing generation unit 86 receives waveform data from the update pipes 84. The timing generation unit 86 provides waveform data to the display power module 38 and the display device 24 according to the timing requirements of the display device 24.
In one embodiment, some or all of the operations and methods described in this description may be performed by executing instructions that are stored in or on a computer-readable medium. The term “computer-readable medium” may include, but is not limited to, non-volatile memories, such as EPROMs, EEPROMs, ROMs, floppy disks, hard disks, flash memory, and optical media such as CD-ROMs and DVDs.
In this description, references may be made to “one embodiment” or “an embodiment.” These references mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the claimed inventions. Thus, the phrases “in one embodiment” or “an embodiment” in various places are not necessarily all referring to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in one or more embodiments.
Although embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the described embodiments are to be considered as illustrative and not restrictive, and the claimed inventions are not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims. Further, the terms and expressions which have been employed in the foregoing specification are used as terms of description and not of limitation, and there is no intention in the use of such terms and expressions to exclude equivalents of the features shown and described or portions thereof, it being recognized that the scope of the inventions are defined and limited only by the claims which follow.