Electrostatic discharge protection device in integrated circuit

Abstract

An electrostatic discharge protection device of a semiconductor integrated circuit, comprising a first diffusion layer that is a diffusion layer of a second conductivity type provided on a semiconductor substrate of a first conductivity type and serves as a collector, a second diffusion layer that is a diffusion layer of the first conductivity type provided in the first diffusion layer and serves as a base, a third diffusion layer that is a diffusion layer of the second conductivity type provided in the second diffusion layer and serves as an emitter, a collector contact region provided in the first diffusion layer, a fourth diffusion layer that is a diffusion layer of the second conductivity type provided in the first diffusion layer in a downward region of the collector contact region in a substrate-thickness direction, wherein the fourth diffusion layer is formed shallower in a depth than that of the first diffusion layer in the substrate-thickness direction, deeper in a depth than that of the second diffusion layer in the substrate-thickness direction and with a high density than that of the first diffusion layer, and an insulation film formed on a surface of the first diffusion layer between the second diffusion layer and the collector contact region and serving as a field, wherein the fourth diffusion layer is extended up until a region below the insulation film.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

These and other objects as well as advantages of the invention will become clear by the following description of preferred embodiments of the invention. A number of benefits not recited in this specification will come to the attention of those skilled in the art upon the implementation of the present invention.

FIG. 1 is a sectional view showing a structure of an electrostatic discharge protection device according to a preferred embodiment 1 of the present invention.

FIG. 2 is a characteristic curve chart of measurement data based on the TLP evaluation in which an effect of the preferred embodiment 1 was confirmed.

FIG. 3 is a sectional view showing a structure of an electrostatic discharge protection device according to a preferred embodiment 2 of the present invention.

FIG. 4 is a circuit diagram showing an example of an ESD protection circuit provided in a conventional integrated circuit.

FIG. 5 is an illustration of the snap-back characteristic of an NPN transistor.

FIG. 6 is a sectional view showing a structure of an electrostatic discharge protection device recited in the Patent Literature 1.

FIG. 7 is a sectional view showing a structure of an electrostatic discharge protection device recited in the Patent Literature 2.

FIG. 8 is a characteristic curve chart shows how BV_cbo, retained voltage Vh, and secondary breakdown current It2 in relation to separation between a high-density N-type sink layer and a P⁻ layer recited in the Patent Literature 2 based on measurement data.

Claims

1. An electrostatic discharge protection device of a semiconductor integrated circuit comprising a bipolar transistor, comprising: a semiconductor substrate of a first conductivity type;a first diffusion layer that is a diffusion layer of a second conductivity type provided on the semiconductor substrate and serves as a collector;a second diffusion layer that is a diffusion layer of the first conductivity type provided in the first diffusion layer and serves as a base;a third diffusion layer that is a diffusion layer of the second conductivity type provided in the second diffusion layer and serves as an emitter;a collector contact region provided in the first diffusion layer;a fourth diffusion layer that is a diffusion layer of the second conductivity type provided in the first diffusion layer in a downward region of the collector contact region in a substrate-thickness direction, wherein the fourth diffusion layer is formed shallower in a depth than that of the first diffusion layer in the substrate-thickness direction, deeper in a depth than that of the second diffusion layer in the substrate-thickness direction and with a higher density than that of the first diffusion layer; andan insulation film formed on a surface of the first diffusion layer between the second diffusion layer and the collector contact region and serving as a field, whereinthe fourth diffusion layer is extended up until a region below the insulation film.

2. The electrostatic discharge protection device as claimed in claim 1, wherein the collector contact region and the emitter are connected to an output terminal of the semiconductor integrated circuit, and the collector contact region is connected to an output terminal having a potential higher than that of the output terminal connected to the emitter.

3. The electrostatic discharge protection device as claimed in claim 1, wherein the collector contact region is connected to a highest-potential terminal of the semiconductor integrated circuit, and the emitter is connected to a lowest-potential terminal of the semiconductor integrated circuit.

4. The electrostatic discharge protection device as claimed in claim 1, wherein an extended dimension of the fourth diffusion layer extending from a border between the collector contact layer and the insulation film to below the insulation film is at least 10 μm.

5. The electrostatic discharge protection device as claimed in claim 1, wherein a fifth diffusion layer of the first conductivity type is formed in at least a part of the fourth diffusion layer below the insulation film.

6. The electrostatic discharge protection device as claimed in claim 5, wherein the fifth diffusion layer is arranged in the fourth diffusion layer.

7. The electrostatic discharge protection device as claimed in claim 1, wherein the second diffusion layer comprises a first diffusion region formed in the first diffusion layer and a second diffusion region having a density higher than that of the first diffusion region formed in the first diffusion region.