Patent Grant
9513644
A. Technical Field
The present invention relates to energy efficient systems having linear regulators, and more particularly, to low power systems having integrated regulators.
B. Background of the Invention
A linear regulator is a system widely used to generate a steady voltage output. A typical regulating device is made to act like a variable resistor, continuously adjusting output impedance to maintain a constant output voltage.
Linear regulators are often inefficient in terms of power usage and waste a significant portion of the electrical energy by dissipating it as heat.
The efficiency in power usage is an important factor considered in designing a circuit having a limited power supply, such as a battery. Even though linear regulators are inefficient compared to other types of regulators, such as switching regulator, linear regulators are still used in various circuits due to the low noise, short response time, low manufacturing cost, low area, and less strict requirements on input voltage. In such cases, circuit designers have to sacrifice the power efficiency in exchange for the advantages of linear regulators. As such, there is a need for a system that uses linear regulator without compromising efficiency in power usage.
Various embodiments of the present invention relate to systems having linear regulators and methods for operating the systems. Each system has partitioned circuit groups and the current flowing through at least one of the circuit groups bypasses the linear regulator to thereby enhance the efficiency in power utilization of the system.
One aspect of the invention is a system having an enhanced power utilization mechanism. The system includes: a linear regulator responsive to an input voltage and operative to output a regulated voltage; a first circuit responsive to the regulated voltage and configured to operate at a first voltage difference between the regulated voltage and a ground level; and a second circuit responsive to the input voltage and the regulated voltage and configured to operate at a second voltage difference between the input voltage and the regulated voltage, the second circuit being coupled to the first circuit so that an entire portion of a current flowing through the second circuit is configured to enter into the first circuit during operation, wherein the current flowing through the second circuit bypasses the linear regulator.
Another aspect of the invention is a system having an enhanced power utilization mechanism. The system includes: a linear regulator responsive to an input voltage and operative to output at least one regulated voltage; and one or more sub-circuits. Each of the sub-circuits includes: a first circuit responsive to the at least one regulated voltage and configured to operate at a first voltage difference between the regulated voltage and a ground level; a second circuit responsive to the at least one regulated voltage; and a monitor responsive to a second voltage difference between the input voltage and the at least one regulated voltage and a monitor reference voltage and operative to apply one of the first and second voltage differences to the second circuit.
Another aspect of the invention is a method of operating a system having an enhanced power utilization mechanism. The method includes: applying an input voltage to a linear regulator to cause the linear regulator to generate a regulated voltage; applying the regulated voltage to a first circuit so that the first circuit operates at a first voltage difference between the regulated voltage and a ground; monitoring a second voltage difference between the input voltage and the regulated voltage; determining if the second voltage difference is larger than a reference voltage; and if an answer to the determination is affirmative, applying the second voltage difference to the second circuit; and otherwise, applying the first voltage difference to the second circuit.
Certain features and advantages of the present invention have been generally described in this summary section; however, additional features, advantages, and embodiments are presented herein or will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims hereof. Accordingly, it should be understood that the scope of the invention shall not be limited by the particular embodiments disclosed in this summary section.
References will be made to embodiments of the invention, examples of which may be illustrated in the accompanying figures. These figures are intended to be illustrative, not limiting. Although the invention is generally described in the context of these embodiments, it should be understood that it is not intended to limit the scope of the invention to these particular embodiments.
In the following description, for the purposes of explanation, specific details are set forth in order to provide an understanding of the invention. It will be apparent, however, to one skilled in the art that the invention can be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, described below, may be performed in a variety of ways and using a variety of means. Those skilled in the art will also recognize additional modifications, applications, and embodiments are within the scope thereof, as are additional fields in which the invention may provide utility. Accordingly, the embodiments described below are illustrative of specific embodiments of the invention and are meant to avoid obscuring the invention.
A reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, characteristic, or function described in connection with the embodiment is included in at least one embodiment of the invention. The appearance of the phrase “in one embodiment,” “in an embodiment,” or the like in various places in the specification are not necessarily all referring to the same embodiment.
Furthermore, connections between components or between method steps in the figures are not restricted to connections that are effected directly. Instead, connections illustrated in the figures between components or method steps may be modified or otherwise changed through the addition thereto of intermediary components or method steps, without departing from the teachings of the present invention.
Linear regulator 202 receives electrical power at an input voltage, Vin, and outputs electrical power at an output voltage, Vout. Hereinafter, Vout is referred to as regulated voltage. The level of Vin may change during operation of system 200, while the level of Vout is maintained at a constant value by linear regulator 202. For instance, system 200 may be powered by a battery and Vin may decrease as the battery discharges.
Circuit-1210 and circuit-2212 are partitioned to form a stacked set of circuitry. Hereinafter, the term stacked refers to an arrangement where the low voltage terminal of a circuit, i.e., circuit-2212, is coupled to a high voltage terminal of another circuit, i.e., circuit-1210. The designer of system 200 may partition circuits into the two groups, i.e., circuit-1 and circuit-2, considering several factors. For instance, in general, analog circuits have well defined static power consumption rates. Thus, in embodiments, circuit-1210 may include analog circuits that consume more power than digital circuits while circuit-2212 may include digital circuits. In another example, in embodiments, circuit-1210 may include a system clock that operates at 10 MHz, while circuit-2212 may include an oscillator that operates at 5 MHz. In yet another example, in embodiments, circuit-1210 includes circuits/components that require a constant input voltage while circuit-2212 includes circuits/components that are less sensitive to the variation of input voltage. It should be apparent to those of ordinary skill in the art that other suitable factors may be used to partition the circuits. Also, circuits may be dynamically partitioned, i.e., some components/circuits may be grouped, depending on operational conditions. For instance, a circuit may be grouped into circuit-2212 when Vin is high, and grouped into circuit-1210 when Vin is low. In still another example, circuits may be partitioned based on the response speed to a voltage variation. For instance, the response of circuit-2212 to a voltage variation is slower than the response of circuit-1210 to the same voltage variation.
Unlike a conventional system, system 200 causes current i2206 to bypass linear regulator 202. As such, electrical power at a voltage difference ΔV (=Vin−Vout) and current i2206 is provided to circuit-2212, where this power would have over time been dissipated as heat in a conventional system. As such, system 200 has enhanced energy efficiency compared to the conventional system.
There are few conditions that need to be satisfied in order for system 200 to work. First, current i1204 must be greater than zero. Otherwise, linear regulator 202 would cease to function. Second, the voltage difference ΔV is suitable for circuit-2212 that is stacked over circuit-1210. Third, any data connections between circuit-1210 and circuit-2212 must be level translated. By partitioning the circuits into two groups, system 200 has two voltage domains and two power domains. Thus, a suitable voltage level shifter (not shown in
Comparator 412 compares Vin to a monitor reference voltage Vref (or, shortly, reference voltage) 422 and sends a control signal 414 to the pair of switches 410a and 410b. In embodiments, the monitor reference voltage, Vref, may be provided by a component located outside the monitor 408. Alternatively, in embodiments, monitor 408 may include a component for providing Vref. When Vin is higher than Vref, switch 410a is flipped upward and switch 410b is flipped downward so that the voltage difference ΔV (=Vin−Vout) is applied to circuit-2406. In this operation mode (which is referred to as efficient mode), system 400 has the similar arrangement as system 200. When Vin is lower than Vref, the pair of switches 410a and 410b are reversed so that circuit-2406 is powered by Vout to ground. In this mode (which is referred to as normal mode), current i 420 is split and the split currents flow into circuit-1404 and circuit 2406 while the same voltage is applied to both circuits, i.e., circuit-1404 and circuit-2406 are arranged in parallel. When Vin is close to Vref, a small fluctuation in Vin may cause artificial toggling of switches 410a and 410b. To avoid the false switching, comparator 412 may have hysteresis 413 as indicated in
It is noted that linear regulator 402 includes input and output terminals (not indicated in
When the pair of switches 410a and 410b are toggled to change the operation mode, the voltage applied to circuit-2406 changes from ΔV to Vout, or vice versa. When system 400 changes from the efficient mode to the normal mode, circuit-2406 experiences a large voltage change if switch 410b is toggled to the ground first. If switch 410b is toggled to the ground first while switch 410a is still coupled to Vin, the voltage difference of Vin is applied to circuit-2406. When switch 410a is subsequently toggled to Vout, a voltage difference of Vout is applied to circuit-2406. Thus, during the switching process, the voltage applied to circuit-2406 varies in the sequence of ΔV→Vin→Vout, causing an overstress to circuit-2406. As such, in embodiments, switch 410a is toggled to Vout first while switch 410b is still coupled to Vout. Then, switch 410b is toggled to the ground. In this switching process, the voltage applied to circuit-2406 varies in the sequence of ΔV→0 V→Vout, reducing overstress to circuit-2406. When system 400 changes from the normal mode to the efficient mode, switches 410a and 410b are toggled in the reverse order, i.e., switch 410b is toggled to Vout first, then switch 410a is toggled to Vin subsequently. System 400 will switch modes in a controlled manner in order to avoid loss of information. In embodiments, system 400 may for example store circuit state in a memory and restore state after switching.
System 400 is reset at step 502. Then, as the batteries start providing electrical power to system 400, monitor 408 toggles the pair of switches 410a and 410b to enter the efficient mode, i.e., the voltage difference ΔV (=Vin−Vout) is applied to circuit-2406 and the regulated voltage Vout to ground is applied to circuit-1404 at step 504. In the present example, when the discharge time T is zero, 1.3 V (=2.8 V-1.5 V) is applied to circuit-2406 while Vout (=1.5 V) is applied to circuit-1404. Then, as shown in
When the discharge time T approaches point 604, Vin drops below Vref and the answer to decision 506 becomes affirmative. Then, the process proceeds to step 508. At step 508, the pair of switches 410a and 410b are toggled so that both circuit-1404 and circuit-2406 are powered at the same voltage Vout to ground, i.e., system 400 enters the normal mode. Depending on the requirements of circuits-1404 and circuit-2406, Vout could be subsequently lowered to a suitable level, such as 1.2 V, for instance, which prolongs the region of sufficient ΔV 606 until system 400 enters the normal mode.
Linear regulator 702 may output a plurality of regulated voltages, Vout-1-Vout-n. To generate multiple Vout signals, in embodiments, linear regulator 702 may include multiple sub linear regulators, each of which is similar to linear regulator 300 in
Each regulated voltage Vout is used to control the electrical power supplied to the corresponding sub-circuit. For instance, Vout-1 is used by monitor 706a to control the electrical power supplied to circuit-a1704a1 and circuit-a2704a2. The structure of each monitor is similar to that of monitor 408 in
Each monitor may have a unique Vref so that the corresponding sub-circuit exits the efficient mode and enters the normal mode when ΔV reaches the unique Vref. Using predetermined Vout and Vref, each monitor may control the power usage of the corresponding sub-circuit in order to optimize the overall power utilization of system 700.
As discussed above, systems 200, 400, and 700 may be any suitable type of electrical components, devices, or circuits. For instance, systems 200, 400, and 700 are system-on-chips having the integrated linear regulators, even though they are not limited to SoC. Also, it should be apparent to those of ordinary skill in the art that systems 200, 400, and 700 may have variations without deviating from the scope of the present invention. For instance, system 700 may have multiple linear regulators so that each linear regulator generates one or more regulated voltages.
As discussed above, the pair of switches 410a and 410b should be toggled in a proper sequence to reduce overstress to circuit-2406 when system 400 changes from the efficient mode to the normal mode, or vice versa. In embodiments, the same switching sequence is applied to each sub-circuit in system 700.
It is noted that, for each pair of stacked circuits in systems 200, 400, and 700, circuit-1 is coupled to the ground while circuit-2 is coupled to Vout in the efficient mode, and thus, circuit-2 has higher reverse bias in the efficient mode. Since higher reverse bias means lower leakage current, systems 200, 400, and 700 will have lower current leakage during the efficient mode, which is another advantage of the embodiments of the presently claimed invention.
While the invention is susceptible to various modifications and alternative forms, specific examples thereof have been shown in the drawings and are herein described in detail. It should be understood, however, that the invention is not to be limited to the particular forms disclosed, but to the contrary, the invention is to cover all modifications, equivalents, and alternatives falling within the scope of the appended claims.
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