Enhanced DC offset mitigation

Abstract

A technique is disclosed to estimate the frequency offset in received direct downconverted predetermined signal despite the presence of a DC offset component. After compensation of the received predetermined signal according to the frequency offset estimation, the DC offset component is estimated. DC offset in data signals subsequent to the predetermined signal may then be mitigated based upon the estimated DC offset component.

Description

FIELD OF INVENTION

[0001] This invention relates to direct down conversion and more specifically to mitigating the DC offset component in a direct-down-converted signal.

BACKGROUND

[0002] Radio receivers typically employ a superheterodyne architecture. In this architecture, the receiver uses two stages to translate an RF signal from a carrier frequency to an intermediate frequency (IF) and then to baseband. In contrast, a direct downconversion receiver uses just one stage to translate an RF signal directly from the carrier frequency to baseband. Because the extra stage in a superheterodyne receiver inevitably introduces additional noise (thereby degrading the signal-to-noise ratio) and requires more components (making production more costly), direct downconversion receivers pose an attractive alternative to the prevalent superheterodyne architecture.

[0003] In a direct downconversion receiver, the RF signal is mixed with a local oscillator (LO) signal. Inevitably, this process produces an undesired self mixing of the LO signal, thereby producing both a DC offset component and a high frequency component. For example, if the LO signal is represented by the sinusoid cos(ωt), the self mixing produces the product:

cos(ωt)*cos(ωt)=½(the DC offset component)+cos(2ωt)/2 (the high frequency component).

[0004] The high frequency component may be filtered off. However, the DC offset component can wreak havoc in subsequent baseband processing, particularly for higher throughput modulations. For example, FIG. 1 shows the potential locations 10 in signal space for a QPSK-modulated signal. Signals 12 show the subsequent location in signal space should an arbitrary DC offset component be present. Although distorted, signals 12 may still be correctly demodulated. But should the same DC offset component be present for signals 14 in a 16-QAM modulation scheme as shown by resulting signals 16 in FIG. 2, errors may result as indicated by locations 16a. Accordingly, the presence of a DC offset poses a serious problem for any direct-downconverted receiver architecture. A superheterodyne receiver, however, may filter off the DC offset components because of the extra stage of processing. Thus, despite their inferior noise properties and higher manufacturing costs, superheterodyne receivers are more popular than direct downconversion receivers.

[0005] To realize the benefits of a direct downconversion receiver, something must be done to mitigate the DC offset component. For example, the DC offset component may be estimated so that it may be subsequently compensated for at baseband. But the measurement of the DC offset component becomes problematic should a frequency offset be present between the receiver and the transmitter. Such a frequency offset is inherent in any communication system, particularly in mobile applications subject to Doppler effects.

[0006] Accordingly, there is a need in the art for improved techniques to estimate the DC offset component despite the presence of a frequency offset between the receiver and transmitter.

SUMMARY

[0007] In accordance with one aspect of the invention, a method of mitigating a DC offset component in a received data sample subject to a frequency offset includes an act of receiving a sequence of samples of a predetermined signal, wherein the predetermined signal is periodic over n samples. Because the predetermined signal is periodic with respect to n samples, the frequency-offset-induced phase shift between successive received samples of the predetermined signal may be estimated by comparing received samples in a first period of the predetermined signal to the corresponding received samples in a second period of the predetermined signal. The DC offset component in the received samples of the predetermined signal may then be estimated after compensating the received samples based upon the estimated frequency-offset-induced phase shift. This estimated DC offset component may then be cancelled for in the received data sample.

[0008] In accordance with another aspect of the invention, a baseband processor includes a state machine for estimating a frequency-offset-induced phase shift between successive received samples of a predetermined signal, wherein the transmitted samples of the predetermined signal are periodic. The state machine estimates this phase shift by comparing received samples in a first period of the predetermined signal to the corresponding received samples in a second period of the predetermined signal. The state machine is further configured to estimate a DC offset component in the received samples of the predetermined signal after compensating the received samples according to the estimated phase shift.

[0009] The invention will be more fully understood upon consideration of the following detailed description, taken together with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] FIG. 1 illustrates the effect of a DC offset component on the potential locations in signal space for a QPSK-modulated signal.

[0011] FIG. 2 illustrates the effect of a DC offset component on the potential locations in signal space for a 16-QAM-modulated signal.

[0012] FIG. 3 is a z-transform representation of a prior art averaging technique that estimates the DC component without accounting for frequency offsets.

[0013] FIG. 4 is a shift register implementation for the technique illustrated in FIG. 3.

[0014] FIG. 5 is a z-transform representation of a circuit to estimate the DC offset component in the presence of a frequency offset according to one embodiment of the invention.

[0015] FIG. 6 is a partial block diagram for a DC offset cancellation processor according to one embodiment of the invention.

[0016] FIG. 7 is a z-transform implementation of a frequency offset estimation technique that does not compensate for the presence of a DC offset component according to one embodiment of the invention.

[0017] FIG. 8 is a z-transform implementation of a frequency offset estimation technique independent of the presence of a DC offset component according to one embodiment of the invention.

[0018] FIG. 9 is a block diagram for a DC offset cancellation processor according to one embodiment of the invention.

DETAILED DESCRIPTION

[0019] In networks such as a wireless LAN, data transmission occurs in bursts or packets of data. Each burst of data may be pre-pended with a preamble that is known to the receiver. Because the characteristics of this preamble are known apriori to the receiver, it may be used for signal up detection, automatic gain control (AGC), antenna diversity implementation, and receiver synchronization. As will be explained further herein, the known characteristics of the preamble may also be exploited by the receiver to aid in DC offset component estimation.

[0020] For example, in an IEEE 802.11a waveform, the preamble consists of ten identical sequences each of length sixteen. Each sequence has an average value of zero. Thus, by summing over all sixteen samples in each sequence, a DC offset component may be estimated. Mathematically, the kth received sample {tilde over (r)}k may be given by:

{tilde over (r)} k ={tilde over (p)} k +{tilde over (V)} DC

[0021] where {tilde over (V)}DC is the DC offset component for each received sample and {tilde over (p)}k is the transmitted kth sample of the preamble. Those of ordinary skill will appreciate that these signals may be complex or real depending upon the signal representation. It follows that: 1$\sum _{k=0}^{n-1}{\tilde{r}}_k=\sum _{k=0}^{n-1}{\tilde{p}}_k+n{\tilde{V}}_{DC}$

[0022] where n is the number of samples for summation. A typical value of n for an IEEE 802.11a application would be 16 or 32. After rearrangement, the previous equation becomes: 2${\tilde{V}}_{DC}=\frac{\sum _{k=0}^{n-1}{\tilde{r}}_k-\sum _{k=0}^{n-1}{\tilde{p}}_k}{n}$

[0023] The known periodic characteristics of the preamble may be used to solve for the DC component. Assuming an IEEE 802.11a application, the average value of the n samples in a complete sequence from a preamble is zero such that: 3$\sum _{k=0}^{n-1}{\tilde{p}}_k=0$

[0024] resulting in the following expression for {tilde over (V)}DC: 4${\tilde{V}}_{DC}=\frac{1}{n}\sum _{k=0}^{n-1}{\tilde{r}}_k$

[0025] FIG. 3 illustrates a z-transform implementation of the previous derivation for the DC offset component. It will be appreciated that a variety of circuits may be used to implement the z-transform representation of FIG. 3. For example, FIG. 4 shows an averaging circuit 14 that estimates {tilde over (V)}DC using a 16-bit shift register 20 and a D-type flip-flop 22. Averaging circuit 14 may be implemented for both the in-phase (I) and the quadrature-phase (Q) signal components.

[0026] The averaging approach discussed with respect to FIGS. 3 and 4 becomes problematic, however, should a frequency offset be present in the received signal from a Doppler shift or other effects. Because the frequency offset is not known, the characteristics of the received signal cannot be predicted apriori despite the known characteristics of the preamble. For example, let ωo be the frequency offset and ωs be the sampling frequency. The received signal then becomes:

{tilde over (r)} k ={tilde over (p)} k e jφ k +{tilde over (V)} DC   Equation (1)

[0027] where φk=k−φo and φo=. Summing all received signal samples over n gives: 5$\sum _{k=0}^{n-1}{\tilde{r}}_k=\sum _{k=0}^{n-1}{\tilde{p}}_k{e}^{j{\phi }_k}+n{\tilde{V}}_{DC}$

[0028] Solving for {tilde over (V)}DC in the previous equation gives: 6${\tilde{V}}_{DC}=\frac{1}{n}\left(\sum _{k=0}^{n-1}{\tilde{r}}_k-\sum _{k=0}^{n-1}{\tilde{p}}_k{e}^{j{\phi }_k}\right)$

[0029] where the second term in the parenthesis is not zero if a frequency offset exists.

[0030] Accordingly, the performance of communication systems that estimate the DC offset component using the averaging approach of FIG. 3 is not very encouraging should even a small frequency offset be present. The frequency offset should be removed before a reliable DC offset estimation can be performed. The present invention provides two techniques to estimate and remove the frequency offset. In a first technique, the frequency offset is estimated in the presence of the DC offset component. In a second technique, the estimate from the first technique is refined by removing the influence of the DC offset component. Regardless of the estimation technique implemented, the following approach may be used to mitigate the DC offset component in the presence of a frequency offset in a direct-down converted signal such as that produced by the receiver architecture disclosed in the co-pending U.S. pat. application Ser. No. ______, entitled “Zero Intermediate Frequency to Low Intermediate Frequency Receiver Architecture,” Attorney docket no. M-15027, filed ______, 2002, the contents of which are hereby incorporated by reference.

[0031] If the estimated frequency offset is represented by {circumflex over (ω)}o, the estimated amount of frequency-offset-induced phase shift between each received sample of the preamble would be 7${\hat{\phi }}_o=2\pi \frac{{\hat{\omega }}_o}{{\omega }_s}.$

[0032] From equation (1) and the estimated amount of phase shift {circumflex over (φ)}o in each received sample, the following estimate for {tilde over (V)}DC may be derived:

{tilde over (r)} k e −jk{circumflex over (φ)} o ={tilde over (p)} k e jφ k e −jk{circumflex over (φ)} o +{tilde over (V)} DC e −jk{circumflex over (φ)} o

{tilde over (r)} k e −jk{circumflex over (φ)} o ={tilde over (p)} k e j(φ k −k{circumflex over (φ)} o ) +{tilde over (V)} DC e −jk{circumflex over (φ)} o 8 $$ ∑ k ⁢ r ~ k ⁢ ⅇ - j ⁢   ⁢ k ⁢   ⁢ φ ^ o = ∑ k ⁢ p ~ k ⁢ ⅇ j ⁡ ( φ k - k ⁢ φ ^ o ) + V ~ D ⁢   ⁢ C ⁢ ∑ k ⁢ ⅇ - j ⁢   ⁢ k ⁢   ⁢ φ ^ o V ~ D ⁢   ⁢ C = ∑ k ⁢ r ~ k ⁢ ⅇ - j ⁢   ⁢ k ⁢   ⁢ φ ^ o - ∑ k ⁢ p ~ k ⁢ ⅇ j ⁡ ( φ k - k ⁢   ⁢ φ ^ o ) ∑ k ⁢ ⅇ - j ⁢   ⁢ k ⁢   ⁢ φ ^ o

[0033] Assuming that the frequency estimate is accurate, the quantity (φk−k{circumflex over (φ)}o) would be very small, such that the DC offset is given by: 9$\begin{array}{cc}{\tilde{V}}_{DC}=\frac{\sum _k{\tilde{r}}_k{e}^{-jk{\hat{\phi }}_o}-\sum _k{\tilde{p}}_k}{\sum _k{e}^{-jk{\hat{\phi }}_o}}& \mathrm{Equation}\left(2\right)\end{array}$

[0034] For an IEEE 802.11a waveform, the second term in the numerator of Equation (2) is very small or zero and can be neglected. FIG. 5 illustrates a z-transform implementation of Equation (2). In frequency estimation block 40, {circumflex over (φ)}o is derived according to the present invention as discussed herein. Although the approach of FIG. 5 is feasible, the required division would entail considerable complexity when implemented in hardware. It will be appreciated that the DC offset estimation techniques disclosed herein may be implemented in either hardware or software. A software approach would avoid the complexities of the hardware division required to implement the DC offset estimation discussed with respect to FIG. 5. However, dedicated state machines implemented, e.g., in an ASIC, will typically provide greater processing speed.

[0035] Because a dedicated hardware approach is desirable but, if implemented based upon the z-transform representation of FIG. 5, would involve considerable complexity, an alternate approach is as follows. A DC offset mitigation using the estimate provided by the Equation (2) would be performed on samples {tilde over (r)}t of data transmitted after the known samples of the preamble such that a corrected data sample Outa is given by: 10$\begin{array}{cc}{\mathrm{Out}}_a={\tilde{r}}_t-{\tilde{V}}_{DC}={\tilde{r}}_t-\frac{\sum _k{\tilde{r}}_k{e}^{-jk{\hat{\phi }}_o}-\sum _k{\tilde{p}}_k}{\sum _k{e}^{-jk{\hat{\phi }}_o}}& \mathrm{Equation}\left(3\right)\end{array}$

[0036] Multiplication of Equation (3) with the numerator term 11$\left(\sum _k{e}^{-jk{\hat{\phi }}_o}\right)$

[0037] gives the following corrected data sample Outb: 12$\begin{array}{cc}\begin{array}{c}{\mathrm{Out}}_b={\tilde{r}}_t\sum _k{e}^{-jk{\hat{\phi }}_o}-\left(\sum _k{\tilde{r}}_k{e}^{-jk{\hat{\phi }}_o}-\sum _k{\tilde{p}}_k\right)\\ ={\mathrm{Out}}_a\left(\sum _k{e}^{-jk{\hat{\phi }}_o}\right)\end{array}& \mathrm{Equation}\left(4\right)\end{array}$

[0038] This factor 13$\left(\sum _k{e}^{-jk{\hat{\phi }}_o}\right)$

[0039] generates a known amplitude and phase change, which may be compensated for in subsequent demodulation to give the desired corrected data sample value Outa described previously. FIG. 6 illustrates a DC offset mitigation processor 60 performing the DC offset cancellation of Equation (4). Advantageously, no complex hardware is required—those of ordinary skill in the art will appreciate the numerous ways such a DC offset mitigation processor may be implemented using simple hardware such as shift registers, multipliers, and adders. Alternatively, such a DC offset mitigation processor may be performed using a microprocessor in a software-based approach. The techniques of the present invention to provide the frequency offset estimation factor {circumflex over (φ)}o will now be discussed.

[0040] Frequency Offset Estimation Techniques

[0041] 1. Estimating Frequency Offset with the DC Offset Component.

[0042] As can be seen from Equation (1), the kth received preamble sample {tilde over (r)}k will be shifted in phase by an amount (k*{circumflex over (φ)}o) with respect to the kth transmitted sample {tilde over (p)}k of the preamble (ignoring, for the moment, the contribution from {tilde over (V)}DC). Assuming the preamble comprises at least two identical sequences each having n samples, the following technique may be used. At the (k+n)th received sample of the preamble, the amount of phase shift will be (n+k)*{circumflex over (φ)}o with respect to the (k+n)th transmitted sample in the preamble. But given the periodicity over n of the preamble, the (k+n)th transmitted sample is the same as the kth transmitted sample. Accordingly, if the (k+n)th received sample is multiplied by the complex conjugate of the kth received sample, the product is the phasor exp(j{circumflex over (φ)}o*n) (ignoring the amplitude component, which has no effect on the phase). The frequency offset per sample {circumflex over (φ)}o may thus be derived by taking the arc tangent of this phasor and dividing the result by n. However, this discussion ignores the contribution from the DC offset component. But for a small DC offset component, the estimation is quite good.

[0043] A z-transform implementation of the preceding algorithm is shown in FIG. 7, wherein the periodicity of the transmitted samples is represented by the variable “m.” To decrease noise, the kth received sample is multiplied by the complex conjugate of the (k−m)th received sample for all samples in the sequence (from k=0 to k=(m−1)) and then summed. Alternatively, greater or fewer samples could be summed depending upon the desired signal-to-noise ratio and latency requirements (where decreasing the number of samples would decrease latency but also decrease the signal-to-noise ratio). Although the DC offset component is estimated with this baseline frequency offset, the computation is considerably better than the simple averaging approach discussed previously—there are no error floors and the performance is only slightly degraded with the expected DC offset.

[0044] 2. Estimating Frequency Offset Independently of the DC Offset Component.

[0045] In a second approach, an enhanced frequency offset is estimated independently from any effects of a DC offset component present in the system. The following is a derivation of this approach. As discussed previously, the kth received sample {tilde over (r)}k of the preamble may be represented by:

{tilde over (r)} k ={tilde over (p)} k e jφ k +{tilde over (V)} DC   Equation (4)

[0046] Similarly, the (k−m)th sample of the preamble, where m is the number of samples in a sequence in the preamble is given by:

{tilde over (r)} k−m ={tilde over (p)} k−m e jφ k−m +{tilde over (V)} DC ={tilde over (p)} k e jφ k e −jmφ o +{tilde over (V)} DC

[0047] it follows that:

{tilde over (r)} k−m e jmφ o ={tilde over (p)} k e jφ k +{tilde over (V)} DC e jmφ o   Equation (5)

[0048] From equations (4) and (5) it can be shown that: 14$\begin{array}{c}\begin{array}{c}\sum _k{\tilde{r}}_k{\tilde{r}}_{k-m}^{*}=e^{jm{\phi }_o}\sum _k{\&LeftBracketingBar;{\tilde{p}}_k\&RightBracketingBar;}^2+m{\&LeftBracketingBar;{\tilde{V}}_{DC}\&RightBracketingBar;}^2+\\ e^{jm{\phi }_o}{{\tilde{V}}_{DC}\left(\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\right)}^{*}+{\tilde{V}}_{DC}^{*}\left(\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\right)\end{array}\\ \mathrm{and}\\ \begin{array}{c}\left(\sum _k{\tilde{r}}_k\right){\left(\sum _k{\tilde{r}}_{k-m}\right)}^{*}=e^{jm{\phi }_o}{\&LeftBracketingBar;\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\&RightBracketingBar;}^2+{\&LeftBracketingBar;m{\tilde{V}}_{DC}\&RightBracketingBar;}^2+\\ m{e}^{jm{\phi }_o}{{\tilde{V}}_{DC}\left(\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\right)}^{*}+m{\tilde{V}}_{DC}^{*}\left(\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\right)\end{array}\\ \mathrm{such}\mathrm{that}:\\ \sum _k{\tilde{r}}_k{\tilde{r}}_{k-m}^{*}-\frac{1}{m}\left(\sum _k{\tilde{r}}_k\right){\left(\sum _k{\tilde{r}}_{k-m}\right)}^{*}=e^{jm{\phi }_o}\sum _k{\&LeftBracketingBar;{\tilde{p}}_k\&RightBracketingBar;}^2-\frac{1}{m}{e}^{jm{\phi }_o}{\&LeftBracketingBar;\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\&RightBracketingBar;}^2\end{array}$

[0049] The preceding equation may be factored as follows: 15$\sum _k{\tilde{r}}_k{\tilde{r}}_{k-m}^{*}-\frac{1}{m}\left(\sum _k{\tilde{r}}_k\right){\left(\sum _k{\tilde{r}}_{k-m}\right)}^{*}=e^{jm{\phi }_o}\left(\sum _k{\&LeftBracketingBar;{\tilde{p}}_k\&RightBracketingBar;}^2-\frac{1}{m}{\&LeftBracketingBar;\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\&RightBracketingBar;}^2\right)$

[0050] Because the factor 16$\left(\sum _k{\&LeftBracketingBar;{\tilde{p}}_k\&RightBracketingBar;}^2-\frac{1}{m}{\&LeftBracketingBar;\sum _k{\tilde{p}}_k{e}^{j{\phi }_k}\&RightBracketingBar;}^2\right)$

[0051] is a real number, the estimated phase shift {circumflex over (φ)}o per received preamble sample from this enhanced technique is thus given by: 17${\phi }_o=\frac{1}{m}\mathrm{phase}\left\{\sum _k{\tilde{r}}_k{\tilde{r}}_{k-m}^{*}-\frac{1}{m}\left(\sum _k{\tilde{r}}_k\right){\left(\sum _k{\tilde{r}}_{k-m}\right)}^{*}\right\}$

[0052] FIG. 8 is the z-transform implementation of this enhanced frequency offset estimate that is independent of effects from the DC offset component. Those of ordinary skill in the art will appreciate that a number of different state machines may be designed to implement this enhanced frequency offset estimation technique. For example, delay block 70, for both the I and Q components, may be implemented using shift register 20 and flip-flop 22 discussed with respect to FIG. 4. Similar delay blocks also required for this technique may be implemented in that fashion as well.

[0053] Regardless of how the frequency offset is estimated, the present invention provides an enhanced DC offset mitigation technique that is robust with respect to frequency offset effects. FIG. 9 illustrates a receiver 100 configured to perform this DC offset mitigation technique. A direct downconversion receiver 110 receives an RF signal and provides an analog baseband signal to an analog-to-digital converter 120. Analog-to-digital converter 120 digitizes the analog baseband signal and provides the resulting received signal samples to a frequency offset estimation state machine 130. State machine 130 may perform either frequency offset technique discussed herein to provide the estimated frequency-offset-induced phase shift {circumflex over (φ)}o between each received sample of the preamble. DC cancellation state machine 140 receives the digitized baseband samples and the phase shift estimation factor {circumflex over (φ)}o to cancel the DC offset component according to the techniques disclosed herein. This cancellation may involve the complex division discussed with respect to FIG. 5 or be performed as discussed with respect to FIG. 6. In an alternate embodiment, state machines 130 and 140 may be combined.

[0054] Although the present invention has been described with respect to an IEEE 802.11a based communication system, it may be applied to any communication scheme that transmits data that is prepended with a predetermined periodic signal. Because the properties of this predetermined periodic signal are known apriori by the receiver, the received samples from this predetermined packet may be exploited according to the present invention to mitigate the DC offset component despite the presence of a frequency offset between the transmitter and the receiver. For example, if the predetermined signal is periodic over n samples, a given sample of the predetermined signal should have the same phase as a sample delayed with respect to the given sample by n samples. By examining the phase shift between these two samples, the frequency offset estimation may be performed according to the techniques disclosed herein. Using this frequency offset estimate and the known values of the transmitted predetermined signal samples, the DC offset component for the received predetermined signal samples may also be derived according to the techniques disclosed herein. This DC offset component may then be cancelled in any data samples received subsequent to the predetermined signal. Accordingly, although the invention has been described with respect to particular embodiments, this description is only an example of the invention's application and should not be taken as a limitation. Consequently, the scope of the invention is set forth in the following claims.

Claims

1. A method of mitigating a DC offset component, comprising: (a) estimating a frequency-offset-induced phase shift {circumflex over (φ)}o between successive received samples of a predetermined signal by comparing at least one sample in a first period of the predetermined signal with the corresponding at least one received sample in a second period of the predetermined signal; (b) estimating a DC offset component in the received samples of the predetermined signal after compensating the received samples according to the estimated phase shift {circumflex over (φ)}o; and (c) mitigating a DC offset component in a received data sample according to the estimated DC offset.

2. The method of claim 1, wherein the first and second period of the predetermined signal each comprises n samples, and wherein act (c) comprises: (e) forming the sum of the n successive received samples of the a period of the predetermined signal, each received sample in the sum being rotated in phase according to the estimated phase shift {circumflex over (φ)}o such that a jth received sample is rotated in phase by an amount −j times the phase shift {circumflex over (φ)}o; (f) subtracting the sum of n transmitted samples for a period of the predetermined signals from the result from act (e); and (g) adjusting the received data sample using the result from act (f).

3. The method of claim 2, wherein act (g) comprises: (i) forming the sum: 18∑k=0n-1⁢ⅇ-j⁡(k⁢ ⁢φ^o)(j) dividing the result from act (f) with the result from act (i); and (k) subtracting the result from act (j) from the received data sample.

4. The method of claim 2, wherein act (g) comprises: (i) multiplying the received data sample by the sum: 19∑k=0n-1⁢ⅇ-j⁡(k⁢ ⁢φ^o)(j) subtracting the result from act (f) from the result from act (i).

5. The method of claim 1, wherein the estimation in act (a) is made without compensating for a DC offset component in the received samples of the predetermined signal.

6. The method of claim 5, wherein act (a) comprises extracting the phase difference between the at least one received sample in the first period and the corresponding at least one received sample in the second period.

7. The method of claim 5, wherein act (a) comprises averaging the phase difference between each received sample in the first period and the corresponding received sample in the second period.

8. The method of claim 7, wherein the predetermined signal is a preamble of an IEEE 802.11a modulated data signal.

9. The method of claim 5, wherein the estimation in act (a) is made independently from a DC offset component in the received samples of the predetermined signal.

10. The method of claim 9, wherein act (a) comprises: for each given sample {tilde over (r)}k in the first period and the corresponding sample {tilde over (r)}*k−n in the second period, calculating {tilde over (φ)}o such that:

11. The method of claim 10, wherein the predetermined signal is a preamble of an IEEE 802.11a modulated data signal.

12. A baseband processor for a received direct downconverted predetermined signal, wherein the received predetermined signal is subject to a frequency offset, comprising: an analog-to-digital converter for digitizing samples of the received predetermined signal; and a state machine configured to estimate a frequency-offset-induced phase shift {circumflex over (φ)}o between successive received samples of the predetermined signal by comparing at least one sample in a first period of the predetermined signal with the corresponding at least one received sample in a second period of the predetermined signal, wherein the state machine is further configured to estimate a DC offset component in the received samples of the predetermined signal after compensating the received samples according to the estimated phase shift {circumflex over (φ)}o.

13. The baseband processor of claim 12, wherein the state machine comprises an application-specific-integrated circuit (ASIC).

14. The baseband processor of claim 12, wherein the state machine is configured to estimate {circumflex over (φ)}o without compensating for a DC offset component in the received samples of the predetermined signal.

15. The baseband processor of claim 12, wherein the state machine is configured to estimate {circumflex over (φ)}o independently from a DC offset component in the received samples of the predetermined signal.

16. The baseband processor of claim 14, wherein the predetermined signal is a preamble of an IEEE 802.11a modulated data signal.

17. The baseband processor of claim 15, wherein the predetermined signal is a preamble of an IEEE 802.11a modulated data signal.