1. Technical Field
The present disclosure relates to an equalizer, and particularly to an equalizer for a multi-level equalization.
2. Description of Related Art
Attenuation is unavoidable during transmission of high frequency signals, such as digital signals, so an error rate of those signals will be gradually increased. Therefore, a waveform equalizer is used to perform high frequency compensation for the high frequency signals before the signals are transmitted. However, conventional waveform equalizers can perform only one-level frequency compensation, but cannot perform multi-level frequency compensation according to actual requirements. Thus, effect of the conventional waveform equalizers is limited for the high frequency signals.
Therefore, there is need for improvement in the art.
Many aspects of the present disclosure can be better understood with reference to the following drawing(s). The components in the drawing(s) are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawing(s), like reference numerals designate corresponding parts throughout the several views.
The first input terminal A is connected to the combining unit 50. The second input terminal B is connected to the first delay module 20. The first delay module 20 is connected to the second delay module 25 and to the combining unit 50 through the first amplitude module 30. The second delay module 25 is connected to the combining unit 50 through the second amplitude module 40. The combining unit 50 is connected to the output terminal C. The input signal is transmitted into the combining unit 50 through the first input terminal A, and the first signal is transmitted into the first delay module 20 through the second input terminal B.
The first delay module 20 includes a plurality of first delay units 22. The first delay units 22 of the first delay module 20 are connected in series. The first signal received from the second input terminal B is transmitted consecutively from a first one of the first delay units 22 to a last one of the first delay units 22. For example, the first one of the first delay units 22 transmits the signal to the second one of the first delay units 22, and then the second one of the first delay units 22 transmits the signal to the third one of the first delay units 22.
During the transmission procedure, each of the first delay units 22 receives the first transmitted signal from a previous one, delays the received signal for a unit period, and then transmits the delayed signal. In other words, the first one of the first delay units 22 receives the first signal. The first received signal of the first one is delayed and the first delayed signal of the first one is transmitted to the second one of the first delay units 22. Then, the second one of the first delay units 22 receives the first transmitted signal from the first one of the first delay units 22. The first received signal of the second one is delayed the first delayed signal of the second one is transmitted, and the rest may be deduced by analogy.
The second delay module 25 includes a plurality of second delay units 27. The second delay units 27 of the second delay module 25 are connected in series. A second signal received from the first delay module 20 is transmitted consecutively from a first one of the second delay units 27 to a last one of the second delay units 27, wherein the first delay module 20 delays the first signal to form the second signal through each of the first delay units 22. Similarly, during the transmission procedure, each of the second delay units 27 receives the second transmitted signal from a previous one, delays the second received signal for the unit period, and then transmits the second delayed signal.
The first amplitude module 30 includes a plurality of first weighting units 33. Each of the first weighting units 33 is connected to a corresponding one of the first delay units 22, so the number of the first weighting units 33 is equal to the number of the first delay units 22. Each of the first weighting units 33 connects the corresponding first delay unit 22 to the combining unit 50, receives the first delayed signal, and transmits a first weighted signal with a first peak amplitude A1. For example, a first one of the first weighting units 33 receives a first one of the first delayed signals from the first one of the first delay units 22, and transmits a first one of the first weighted signals with the first peak amplitude A1. A second one of the first weighting units 33 receives a second one of the first delayed signals from the second one of the first delay units 22, and transmits a second one of the first weighted signals with the first peak amplitude A1.
The second amplitude module 40 includes a plurality of second weighting units 44. Each of the second weighting units 44 is connected to a corresponding one of the second delay units 27, so the number of the second weighting units 44 is equal to the number of the second delay units 27. Similarly, each of the second weighting units 44 connects the corresponding second delay unit 27 to the combining unit 50, receives the second delayed signal, and transmits a second weighted signal with a second peak amplitude A2.
The first weighting units 33 have a first weighted coefficient, and the second weighting units 44 have a second weighted coefficient. The first peak amplitude A1 is computed according to the first weighted coefficient, and the second peak amplitude A2 is computed according to the second weighted coefficient. The first weighted coefficient is different from the second weighted coefficient. In the embodiment, the first weighted coefficient is larger than the second weighted coefficient.
The combining unit 50 is utilized to combine the input signal from the first input terminal A, the first weighted signals from the first weighting units 33 and the second weighted signals from the second weighting units 44 together to generate an equalized signal. The equalized signal is transmitted through the output terminal C.
An operating principle of an embodiment of the present disclosure is described as follows.
As shown in
Besides, a third signal (whose waveform is a second unit waveform H) is transmitted to the first delay module 20 through the second input terminal B at a second time t2 and delayed by each of the first delay units 22 to form a fourth signal. In the embodiment, the third signal is a unit signal. Similarly, each of the first delay units 22 transmits their respective third delayed signals according to the third signal, the second delay module 25 receives the fourth signal, and each of the second delay units 27 transmits their respective fourth delayed signals according to the fourth signal. Moreover, each of the first weighting units 33 receives a corresponding third delayed signal and transfers the corresponding third delayed signal with the first weighted coefficient to transmit a third weighted signal (whose waveform is a third weighted waveform Y) with a third peak amplitude A3 to the combining unit 50. Similarly, each of the second weighting units 44 receives a corresponding fourth delayed signal and transfers the corresponding fourth delayed signal with the second weighted coefficient to transmit a fourth weighted signal (whose waveform is a fourth weighted waveform L) with a fourth peak amplitude A4 to the combining unit 50.
The combining unit 50 combines the input signal from the first input terminal A, the first weighted signals and the third weighted signals from the first weighting units 33, and the second weighted signals and the fourth weighted signals from the second weighting units 44 together to generate the equalized signal (whose waveform is a equalized waveform G).
The first signal is different from the third signal. In the embodiment, an absolute value of a peak amplitude of the first signal is the same as that of the third signal, but a direction of the first signal is different from that of the third signal. In other embodiments, the absolute value of the peak amplitude of the first signal can be different from that of the third signal.
In the embodiment, a time interval between the first time t1 and the second time t2 is larger than a total delay time. In other words, the time interval is larger than a sum of the delay times delayed by the first delay units 22 and the second delay units 27, wherein the sum can be computed according to a first equation (X+Z)×T. X is the number of the first delay units 22, Z is the number of the second delay units 27, and T is the unit period. In the embodiment, X and Z are a positive integer and both of them are more than 1.
After comparing the equalized signal with the input signal, it can be found that the equalized signal has a first equalization gain S1 and a second equalization gain S2. The first equalization gain S1 is computed by a second equation
The second equalization gain S2 is computed by a third equation
wherein V1 is an amplitude of the input signal, V2 is an amplitude between a maximum voltage and a minimum voltage of the equalized signal, and V3 is an amplitude between a second largest voltage and a second smallest voltage of the equalized signal.
The above equalizer delays the signal for a period via the first and the second delay modules 20 and 25. Then, the equalizer transfers the delayed signals to transmit the weighted signals with two peak amplitudes by the first and the second amplitude modules 30 and 40, and combines the input signal and the weighted signals by the combining unit 50 to generate the equalized signal. Hereby, the equalizer can effectively compensate high frequency attenuation of the high frequency signals, such as digital signals, during signal transmission.
In the embodiment, the equalizer includes two delay modules and two amplitude modules to obtain the equalized signal with two-level equalization gain. This is just a simple embodiment for convenience of the description. In other embodiments, the number of the delay modules in the equalizer can be more than 2 so the number of the amplitude modules corresponding to the delay modules can also be more than 2. Therefore, the signal can be transmitted in more than two delay modules and be transferred to generate the weighted signals with more than two peak amplitudes. Accordingly, the equalizer can perform multi-level equalization to generate an equalized signal with multi-level equalization grain.
While the disclosure has been described by way of example and in terms of various embodiments, it is to be understood that the disclosure is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
| Number | Date | Country | Kind |
|---|---|---|---|
| 101106435 | Feb 2012 | TW | national |