ESD protection device

Abstract

The junction breakdown voltage of an ESD protection device is adjusted by altering the distance between two diffusion regions of opposite conductivity types.

Description

BRIEF DESCRIPTION OF DRAWINGS

These and other objects, features and advantages of the present invention will become apparent to those skilled in the art upon consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings, in which:

FIG. 1 shows a conventional ESD protection device;

FIG. 2 shows an equivalent circuit of the structure in FIG. 1;

FIG. 3 shows a current-voltage curve of the device of FIG. 1 during operation;

FIG. 4 shows a current flowing diagram when it is at point A of the current-voltage curve of FIG. 3;

FIG. 5 shows a current flowing diagram when it is at point B of the current-voltage curve of FIG. 3;

FIG. 6 shows a conventional ESD protection device for a LV-NMOS device;

FIG. 7 shows an equivalent circuit of the structure in FIG. 6;

FIG. 8 shows a conventional ESD protection device for a BJT process application;

FIG. 9 shows a circuit diagram of the structure in FIG. 8;

FIG. 10 shows an equivalent circuit of the structure in FIG. 9;

FIG. 11 shows a BJT structure for the ESD protection in FIG. 8;

FIG. 12 shows an ESD protection device according to the present invention;

FIG. 13 shows an equivalent circuit of the structure in FIG. 12;

FIG. 14 shows a current-voltage curve of the device of FIG. 12 during operation;

FIG. 15 shows a current flowing diagram when it is at point A of the current-voltage curve of FIG. 14;

FIG. 16 shows a current flowing diagram when it is at point B of the current-voltage curve of FIG. 14;

FIG. 17 shows a comparison between the conventional current-voltage curve and the current-voltage curve of the present invention;

FIG. 18 shows an ESD protection device for a LV-NMOS device according to the present invention;

FIG. 19 shows an equivalent circuit of the structure in FIG. 18;

FIG. 20 shows an ESD protection device for a the BJT process application according to the present invention;

FIG. 21 shows an equivalent circuit of the structure in FIG. 20;

FIG. 22 shows an ESD protection device for a HV-CMOS device according to the present invention;

FIG. 23 shows a relationship of the distance between the high concentration diffusion region and the well and the breakdown voltage in FIG. 22; and

FIG. 24 shows a relationship of the distance between the high concentration diffusion region and the well and the breakdown voltage in FIG. 22.

Claims

1. An ESD protection device, comprising: a substrate of a first conductivity type having a well of said first conductivity type;a first high concentration diffusion region of said first conductivity type, a second high concentration diffusion region of a second conductivity type opposite to said first conductivity type, a third high concentration diffusion region of said second conductivity type, and a fourth high concentration diffusion region of said first conductivity type, all in said well;a first conductive layer electrically connecting to said first and second high concentration diffusion regions; anda second conductive layer electrically connecting to said third high concentration diffusion region;wherein said third and fourth high concentration diffusion regions are spaced with therebetween a distance to adjust a breakdown voltage of said ESD protection device.

2. The ESD protection device of claim 1, wherein each of said first and second conductive layers comprises a metal layer.

3. The ESD protection device of claim 1, wherein said first conductive layer is electrically grounded.

4. The ESD protection device of claim 1, wherein said second conductive layer is electrically connected to a pad.

5. An ESD protection device, comprising: a substrate of a first conductivity type having a well of said first conductivity type;a first high concentration diffusion region of said first conductivity type, a second high concentration diffusion region of a second conductivity type opposite to said first conductivity type, a third high concentration diffusion region of said second conductivity type, and a fourth high concentration diffusion region of said first conductivity type, all in said well;a gate above a channel between said second and third high concentration regions;a first conductive layer electrically connecting to said first and second high concentration diffusion regions; anda second conductive layer electrically connecting to said third high concentration diffusion region;wherein said third and fourth high concentration diffusion regions are spaced with therebetween a distance to adjust a breakdown voltage of said ESD protection device.

6. The ESD protection device of claim 5, wherein each of said first and second conductive layers comprises a metal layer.

7. The ESD protection device of claim 5, wherein said first conductive layer is electrically grounded.

8. The ESD protection device of claim 5, wherein said second conductive layer is electrically connected to a pad.

9. The ESD protection device of claim 5, wherein said gate comprises a polysilicon layer spaced from said channel with a gate oxide therebetween.

10. An ESD protection device, comprising: a substrate of a first conductivity type;an epitaxial layer of a second conductivity type opposite to said first conductivity type on said substrate;a first diffusion region of said first conductivity type and a second diffusion region of said second conductivity type both in said epitaxial layer;a third diffusion region of said second conductivity type in said first diffusion region; anda fourth diffusion region of said second conductivity type extending from said second diffusion region to a portion of said epitaxial layer between said first and second diffusion regions;wherein said first and fourth diffusion regions are spaced with therebetween a distance to adjust a breakdown voltage of said ESD protection device.

11. The ESD protection device of claim 10, wherein said second diffusion region constitutes a transistor collector.

12. The ESD protection device of claim 10, wherein said fourth diffusion region has a doped concentration higher than that of said second diffusion region.

13. The ESD protection device of claim 10, wherein said first diffusion region constitutes a transistor base.

14. The ESD protection device of claim 10, wherein said third diffusion region constitutes a transistor emitter.

15. An ESD protection device, comprising: a substrate of a first conductivity type having a first well of said first conductivity type and a second well of a second conductivity type opposite to said first conductivity type, both adjacent to each other;a first high concentration diffusion region of said first conductivity type in said first well; anda second high concentration diffusion region of said second conductivity type in said second well;wherein said first and second high concentration diffusion regions are spaced with therebetween a distance to adjust a breakdown voltage of said ESD protection device.