This invention relates, in general, to establishing a logical path between servers in a processing environment, and, more particularly, to establishing a logical path between servers in a coordinated timing network that enables servers in the coordinated timing network to synchronize to a reference time.
For performance and data integrity, computing systems that access shared data, such as a SYSPLEX offered by International Business Machines Corporation, Armonk, N.Y., must be able to maintain time of day (TOD) clock synchronization to an accuracy that is better than best case communication time between the systems. Currently, in one example, to meet the synchronization requirements, a timer, such as the IBM® 9037 SYSPLEX timer, is used. This timer requires expensive dedicated timing links and a separate external box.
Other networks, such as the Network Timing Protocol (NTP), provide time synchronization, but do not meet the accuracy requirements of high-end systems. NTP requires that each server has access to an external time source that provides accuracy to a microsecond level in order to ensure all servers synchronize to the same reference time. This is a problem for those systems that do not have a capability to attach to external time servers that provide this level of accuracy. Further, a requirement of GPS receivers or similar attachment on each system may be considered infeasible for maintenance, security and reliability reasons.
Based on the foregoing, a need exists for a capability that facilitates the providing of time synchronization in a processing environment. In one example, a need exists for a capability that establishes a logical path between two servers in a coordinated timing network, wherein the logical path may be utilized by the servers to exchange time synchronization messages to facilitate synchronization of the servers' clocks.
The shortcomings of the prior art are overcome and additional advantages are provided through the provision of at least one program storage device readable by a machine embodying at least one program of instructions executable by the machine to perform a method of establishing a logical path between two processing systems in a coordinated timing network of a processing environment. The method including, for instance, transmitting, by a processing system to an attached processing system, a request to establish a logical path between the processing system and the attached processing system, the logical path facilitating time synchronization of the processing system and the attached processing system; receiving, by the processing system, a response from the attached processing system indicating whether the attached processing system accepted the request transmitted by the processing system; receiving, by the processing system, another request transmitted by the attached processing system, the another request requesting to establish the logical path between the processing system and the attached processing system; transmitting, by the processing system to the attached processing system, another response indicating whether the processing system accepted the another request transmitted by the attached processing system; and establishing the logical path between the processing system and the attached processing system if the response indicates that the request was accepted by the attached processing system and if the another response indicates that the another request was accepted by the processing system.
Systems and methods relating to one or more aspects of the present invention are also described and may be claimed herein.
Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.
One or more aspects of the present invention are particularly pointed out and distinctly claimed as examples in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
In one aspect, the present invention provides a capability of establishing a logical path between two servers in a coordinated timing network of a processing environment. To establish a server-time-protocol (STP) logical path to an attached server in the coordinated timing network, a server transmits a request to establish an STP logical path in a message command block to an attached server. The attached server processes information in the message command block for compatibility with the attached server's configuration and transmits a response in a message response block to the server indicating whether the attached server accepted the request transmitted by the server. In addition, the attached server transmits a request in a message command block to the server, requesting to establish a server-time-protocol logical path to the server. The server receives the request from the attached server and determines whether information in the message command block is compatible with the server's configuration. The server transmits a response in a message response block to the attached server indicating whether the server accepted the request transmitted by the attached server. If the attached server's response indicates that the server's request was accepted by the attached server and if the server's response indicates that the attached server's request was accepted by the server, a logical path is established between the server and the attached server.
One aspect of the present invention provides a method for establishing a logical path between two servers for timing synchronization using intersystem coupling links of the computing environment. For timing synchronization between servers, a physical link by itself is not sufficient. In addition, the servers at either end of the link are to satisfy a set of well-defined criteria before the link can be regarded as established as a path that can be used for timing-synchronization purposes. Other aspects of the present invention include the definition of these criteria and a protocol by which the exchange of establish-STP-path (ESP) messages between the two servers is initiated and brought to a conclusion.
In one embodiment, only one server-time-protocol (STP) path is established over any given physical link, and it is strictly a connection between the servers (or other processing systems). The STP facility at one central electronic complex (CEC) of a processing system is to exchange timekeeping messages with the STP facility at another CEC of another processing system. An STP path can be established over every physical link connecting one CEC with another. However, in accordance with an aspect of the present invention, a capability for establishing a server-time-protocol path between central electronic complexes includes checks so that a coordinated timing network (CTN) only includes those servers that belong there. A technique, in accordance with an aspect of the invention, also acts to make sure that every server that belongs in the CTN is, in fact, included in the CTN.
If any of the comparisons in steps 32, 33, and 34 produce an exception condition, the server sends a response message to the attached server with a response code (RC) indicating that the command message was unsuccessful 37, and the first process of the STP facility terminates unsuccessfully. Otherwise, the server sends a response message to the attached server including a response code indicating that the command message was successful 35 (i.e., accepted by the server), and the first process checks whether a second process of the STP facility has completed 36. If the second process has completed, the first process terminates successfully. Alternatively, if the second process has not completed, the first process initiates the second process 38 before the first process ends.
When the server process for establishing an STP path reaches State 6 of the state transition diagram illustrated in
In one embodiment, the process of establishing an STP path normally begins when a physical link between two servers is configured online. This event causes the channel subsystem (CSS) to invoke the STP facility at each of the two servers, and the link in question is investigated to determine its suitability as an STP path.
There are several situations in which an STP path will not be established on a physical link between two servers. The situation in which an STP path will not be established include the following: (1) the STP facility is not supported or is not enabled at one or both of the servers connected by that physical link; (2) the two servers connected by the physical link belong to different coordinated timing networks; (3) the versions of the STP facility at the servers connected by the physical link are not compatible; (4) the configuration type (for example, triad, dual-server, single-server, or null configuration) at one of the two servers connected by the physical link is not compatible with the configuration type at the other server; and (5) a server is connected to itself by the physical link.
The process of establishing an STP path, which is also referred to herein as the establish STP path process or ESP process, may also be initiated under circumstances other than the link entering the physical-link-operational state. The ESP process may be initiated, for example, when the coordinated timing network identification (CTN ID) at a server has changed as the result of a local modify-CTN-ID command, or when the maximum-supported STP version number at a server has changed, or when the stratum-1 configuration at a server has changed as the result of a local modify-stratum-1-configuration command. Another example of a case in which the ESP process is initiated without explicit prompting by elements of the channel subsystem (CSS) involves the action that is taken when an attached server fails to respond to an exchange time parameters (XTP) command on any path within the path group associated with that attached server for some specified period of time. Every path to the attached server in question is placed in the uninitialized state (with uninitialized reason code equal to “communication error”), causing an establish-STP-path (ESP) command to be sent to the attached server on every path at the completion of every message interval until a response has been received or until the CSS signals that the paths to the attached server have been configured offline or that these paths are otherwise unavailable for use by the STP facility.
When the ESP process completes successfully for a given physical link, an STP control block called the link information block (LIB) is placed in the initialized state. If this is the first STP path to the attached server to enter the initialized state, then a node information block (NIB) is created for this attached server.
One characteristic of a technique of establishing a logical path between two servers, in accordance with an aspect of the present invention, is that an exchange of signals between the two servers may be initiated and proceed in any order. That is, although each of the two servers sends a message of a particular type and receives a response to that message, the order in which these events occur is not significant. The protocol may be characterized as symmetrical, since each of the two servers engaged in the exchange of signals to establish a logical path will perform the same set of operations as a part of the process of establishing a path to use for timing-synchronization purposes. In order for the process of establishing an STP path to complete successfully on a given link, the STP facilities at both of the two servers connected by the link are to conclude that no exceptional conditions were encountered in the exchange of establish-STP-path commands.
In one embodiment, a server initiates a process for initializing and establishing a server-time-protocol path with an attached server as follows.
The STP-link-monitoring procedure determines all external data links attached to the server that may be used as STP links. For each link that is capable of acting as an STP link, the STP-link-monitoring procedure builds a link information block. The STP-link-monitoring procedure monitors the server's external data links for the addition and deletion of STP data links and for changes in the operational state of the links. When an STP link enters the physical-link-operational state (as defined for the type of physical link), the STP-link-monitoring procedure initiates the STP-path-initialization process.
The STP-path-initialization procedure is performed on an STP path when the STP facility establishes initiative to perform path initialization. Initiative to perform STP path initialization on an STP link is established when the server is configured with a non-zero STP ID and any of the following occur:
Initiative is established to perform STP path initialization on all STP links that are in the link-operational state when the server is configured with a non-zero STP ID and any of the following occur:
STP path initialization includes the steps listed below. If any of the steps does not complete successfully, STP path initialization fails and none of the subsequent steps is performed.
The ESP procedure is performed as part of STP path initialization. When the STP facility has established initiative to perform path initialization as the result of receiving an ESP message command on a link, the STP facility performs the following steps:
When the STP facility has established initiative to perform path initialization, but not as a result of receiving an ESP message command, the STP facility performs the following steps:
The Link Information Block is a control block for a link that is utilized in the process of establishing an STP path. All of the following fields are initially written by the CSS. The “I” bit and the “URC” field are subsequently managed by the STP facility to track the ESP process:
These four fields of the Link Information Block are managed by the STP facility:
The contents of an ESP MCB transmitted by a server include:
When a link is configured online, the CSS invokes the STP facility at each of the two servers connected by means of that link. This means that an ESP MCB will originate at each of the two servers and that each of the two servers will eventually have to respond to the MCB from the other server by returning an ESP MRB to the other server. (“MRB” stands for “Message Response Block”—the control block used to respond to a message sent across an “intersystem coupling link”.) In other words, the ESP process is “symmetrical” in the sense that each of the two servers involved in the process performs the operation in the same way, sending an MCB and receiving an MRB in return, and also receiving an MCB and responding by returning an MRB. The ESP process does not reach a successful conclusion until both of the two MCB/MRB exchanges have completed on the link in question with a response code indicating that no exceptional conditions have been encountered.
When the ESP MCB arrives at the remote-server end of the link, the STP facility at the remote server is invoked by the CSS and passed several parameters. Among these parameters are the SLID, the address of the MCB, and the address of the location in storage where the MRB is to be written. The SLID is used to locate the LIB associated with the link in question. The “ESP MCB received” flag is set. Now the MCB is studied to see if there is any reason why the ESP process should not be allowed to continue to a successful completion. This action is referred to as the “ESP Verification Function”; it is defined as follows.
The “ESP Verification Function” verifies that the request operands in the ESP message command permit path initialization. The following checks are performed on the operands in the ESP MCB:
If no exceptional conditions are encountered when processing a received ESP MCB, then the ESP MRB is written with a value of RC that indicates that the command was processed successfully. The only other response operand that is written in the ESP MRB is the receiving server's CTN ID. The CTN ID is written in the ESP MRB regardless of the value written in the RC operand.
In case one of the exceptional conditions was encountered, in general, the attached server is sent an ESP command in return, if this has not already been done. The situation is that the attached server has no way of knowing whether this server rejected the incoming ESP MCB before or after it sent an ESP MCB of its own. So when the attached server receives the MRB about to be returned, it would not know if it would be receiving an ESP MCB as well. By sending an ESP MCB in spite of the fact that the attached server's ESP MCB has been rejected, any doubt the attached server might otherwise have had about whether the ESP operation is complete is eliminated. In other words, the attached server is to wait for the ESP MCB from this server before completing the ESP process even if this server has rejected the ESP MCB from the attached server. There are several exceptions to this rule; all of them involve cases in which it is apparent that the server rejecting the ESP MCB that it received from the attached server would not under any circumstances be sending an ESP MCB of its own: the STP facility is not enabled at this server, the STP ID component of the CTN ID is zero, or the STP facility is busy.
To determine whether an ESP MCB should be sent to the attached server when the ESP MCB from the attached server has been rejected because of one of the exceptional conditions listed above, the “ESP MCB sent” flag is examined. If that flag is equal to zero, then the URC value in the LIB associated with the link on which the ESP command arrived is changed from “Incoming ESP Command Reject” to “Outgoing ESP Command Pending”. The routine that scans the LIBs at the completion of every message interval looking for a link that requires ESP processing treats the URC value “Outgoing ESP Command Pending” the same way it treats the URC value “Initialization Not Complete”—an ESP command is sent to the attached server and the “ESP MCB sent” flag is set to one, just as described earlier for the URC=“Initialization Not Complete” case. If, on the other hand, the “ESP MCB sent” flag is equal to one, then the ESP process is complete for the link in question. All that remains is to reset the four “state machine” flags in the LIB that keep track of the progress of the ESP process for the link in question: “ESP MCB sent”, “ESP MRB received”, “ESP MCB received”, and “ESP MRB sent”.
In case none of the exceptional conditions listed above was encountered, then it is possible that the ESP process has come to a successful conclusion for the link in question. All that is necessary is that this server has already sent the ESP MCB to the attached server and has received the ESP MRB returned by the attached server. Of course, it is also necessary that the attached server responded to the ESP command with the response code that indicates a successful outcome. In other words, the link-initialization process is not completed until the ESP MCB is sent to the attached server and the RC=“successful” response has been received. If the ESP MCB has not been sent to the attached server and a response has not been received, then the link-initialization process will be concluded when the ESP MRB arrives from the attached server. The “ESP MCB sent” flag is examined; if it is equal to one, then the “ESP MRB received” flag is examined. If the “ESP MRB received” flag is equal to zero, then there is nothing to do but wait for the ESP MRB to arrive from the attached server. If, however, the “ESP MRB received” flag is equal to one, then the ESP process for the link in question will be concluded immediately. But suppose for a moment that the “ESP MCB sent” flag is equal to zero. In that case, the URC value in the LIB associated with the link in question is set to “Outgoing ESP Command Pending”; that will cause an ESP command to be sent to the attached server at the end of the current message interval.
Now, returning to the case in which no exceptions were encountered during the execution of the ESP Verification Function as described above and both the “ESP MCB sent” flag and the “ESP MRB received” flag are found to be equal to one, the possibility that the ESP MCB sent by this server was rejected by the attached server is considered. In other words, even though this server found nothing wrong with the ESP command it received from the attached server, the attached server rejected the ESP command sent to it by this server by returning an ESP MRB containing one of the exceptional response codes listed above. If that has in fact happened, then the value “Outgoing ESP Command Reject” will be found in the URC field of the LIB associated with the link in question. In that case, the ESP process is complete: the link will remain in the “uninitialized” state with the “I” bit in the LIB remaining equal to zero; and the URC value will continue to be “Outgoing ESP Command Reject”.
There is another possibility to consider. The ESP MCB that was just received from the attached server was examined and found to have no exceptions. The receiving server will respond to that ESP command with RC=“the command was successfully performed”. The “ESP MCB sent” flag and the “ESP MRB received” flag are both equal to one. Finally, the URC field in the LIB associated with the link in question is examined and found to contain the value “Incoming ESP Command Pending”, which means that the attached server responded to the ESP command from this server with RC=“the command was successfully performed”. The entire ESP process has completed successfully at this server for the link in question, and processing proceeds with the creation of a “node information block” (NIB) for the attached server that is connected to this server by the link in question. The NIB is an architected entity; but it is also a control block that contains other fields besides the objects specified in the STP architecture.
The following ESP processing occurs when the ESP MRB arrives in response to an ESP MCB that was sent earlier. The STP routine that is invoked by the CSS is passed the address of the MCB, the address of the MRB, and the SLID identifying the path on which the MRB arrived. The ESP-MRB-handling routine uses the SLID to find the right LIB in the LIB array. The “ESP MRB received” flag is immediately set to one in that LIB.
It is possible that a “communication timeout” will have occurred on the link when the ESP MCB was sent; the CSS will inform the STP facility of this outcome by passing the ESP-MRB-handling routine a “null” MRB address. The STP facility does not give up because of a “communication timeout”. Instead, the URC field in the LIB in question is set to “No Response”, which will cause the ESP MCB to be re-transmitted at the end of the current message interval. Also the “ESP MCB sent” and “ESP MRB received” flags are reset to zero.
But if the indication that a “communication timeout” has occurred is not present, and if the response code in the ESP MRB is “successful”, then the next processing step depends on whether this server has received the ESP MCB from the attached server and what response code this server wrote in the ESP MRB it returned to the attached server. If this server has not yet received the ESP MCB from the attached server, then it is not possible, in this embodiment, to proceed with the ESP process; it is necessary to wait until the ESP MCB arrives from the attached server. At this point, the URC value is changed to “Incoming ESP Command Pending”. The final ESP processing will be done by the routine, discussed above, that processes the ESP MCB when it arrives from the attached server.
If an RC=“successful” ESP MRB has been received from the attached server and if the ESP MCB from the attached server also has already been processed, then the URC in the LIB associated with the link in question is examined. If the URC field contains the value “Incoming ESP Command Reject”, then the ESP process for the link in question is over. The ESP process has failed for that link, and the link will remain in the “uninitialized” state. All that remains is to reset to zero the four flags that record the link's progress through the ESP process: “ESP MCB sent”, “ESP MRB received”, “ESP MCB received”, and “ESP MRB sent”. The idea is that the “bad result” MRB sent to the attached server earlier overrides the “good result” MRB just received from the attached server. Both servers are to agree about the outcome of the exchange of ESP commands on the link in question to establish an STP path.
If, on the other hand, an ESP MRB with an RC=“successful” has been received from the attached server and if the server also already processed the ESP MCB from the attached server and if the URC field in the LIB does not contain the value “Incoming ESP Command Reject”, then the process proceeds to completion just as described above: a new NIB and ASSIB is created if this is the first link to the attached server in question, the new path is included in the path group for the attached server, and so forth. At the end of that, the four flags that record the link's progress through the ESP process are also reset.
In one embodiment, one or more aspects of the present invention can be executed in a processing environment that is based on one architecture, which may be referred to as a native architecture, but emulates another architecture, which may be referred to as a guest architecture. As examples, the native architecture is the Power4 or PowerPC® architecture offered by International Business Machines Corporation, Armonk, N.Y., or an Intel® architecture offered by Intel Corporation; and the guest architecture is the z/Architecture® also offered by International Business Machines Corporation, Armonk, N.Y. Aspects of the z/Architecture® are described in “z/Architecture Principles of Operation,” IBM Publication No. SA22-7832-04, September 2005, which is hereby incorporated herein by reference in its entirety. In such an environment instructions and/or logic, which is specified in the z/Architecture® and designed to execute on a z/Architecture® machine, is emulated to execute on an architecture other than the z/Architecture®. One example of this processing environment is described with reference to
Referring to
Native central processing unit 2402 includes one or more native registers 2410, such as one or more general purpose registers and/or one or more special purpose registers, used during processing within the environment. These registers include information that represent the state of the environment at any particular point in time.
Moreover, native central processing unit 2402 executes instructions and code that are stored in memory 2404. In one particular example, the central processing unit executes emulator code 2412 stored in memory 2404. This code enables the processing environment configured in one architecture to emulate another architecture. For instance, emulator code 2412 allows machines based on architectures other than the z/Architecture®, such as Power PC® processors, pSeries® servers, xSeries® servers, HP Superdome® servers, or others to emulate the z/Architecture® and to execute software and instructions developed based on the z/Architecture®.
Further details relating to emulator code 2412 are described with reference to
Emulator code 2412 further includes an instruction translation routine 2504 to determine the type of guest instruction that has been obtained and to provide one or more native instructions 2509 that correspond to the guest instruction. In one example, the providing includes creating during, for instance, a translation process, a native stream of instructions for a given guest instruction. This includes identifying the function and creating the equivalent native instructions. In a further example, the providing of the native instructions includes selecting a code segment in the emulator that is associated with the guest instruction. For instance, each guest instruction has an associated code segment in the emulator, which includes a sequence of one or more native instructions, and that code segment is selected to be executed.
Emulator code 2412 further includes an emulation control routine 2506 to cause the native instructions to be executed. Emulation control routine 2506 may cause native CPU 2402 to execute a routine of native instructions that emulate one or more previously obtained guest instructions and, at the conclusion of such execution, to return control to the instruction fetch routine to emulate the obtaining of the next guest instruction or group of guest instructions. Execution of the native instructions 2509 may include loading data into a register from memory 2404; storing data back to memory from a register; or performing some type of arithmetic or logical operation, as determined by the translation routine. Each routine is, for instance, implemented in software, which is stored in memory and executed by the native central processing unit 2402. In other examples, one or more of the routines or operations are implemented in firmware, hardware, software or some combination thereof. The registers of the emulated guest processor may be emulated using the registers 2410 of the native CPU or by using locations in memory 2404. In embodiments, the guest instructions 2502, native instructions 2509, and emulation code 2412 may reside in the same memory or may be dispersed among different memory devices.
In yet a further embodiment, a data processing system suitable for storing and/or executing program code is usable that includes at least one processor coupled directly or indirectly to memory elements through a system bus. The memory elements include, for instance, local memory employed during actual execution of the program code, bulk storage, and cache memory which provide temporary storage of at least some program code in order to reduce the number of times code must be retrieved from bulk storage during execution.
Input/Output or I/O devices (including, but not limited to, keyboards, displays, pointing devices, DASD, tape, CDs, DVDs, thumb drives and other memory media, etc.) can be coupled to the system either directly or through intervening I/O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modems, and Ethernet cards are just a few of the available types of network adapters.
One or more aspects of the present invention can be included in an article of manufacture (e.g., one or more computer program products) having, for instance, computer usable media. The media has therein, for instance, computer readable program code means or logic (e.g., instructions, code, commands, etc.) to provide and facilitate the capabilities of the present invention. The article of manufacture can be included as a part of a system (e.g., computer system) or sold separately.
One example of an article of manufacture or a computer program product incorporating one or more aspects of the present invention is described with reference to
A sequence of program instructions or a logical assembly of one or more interrelated modules defined by one or more computer readable program code means or logic direct the performance of one or more aspects of the present invention.
Establishing a server-time-protocol (STP) logical path between processing systems of a processing environment, in accordance with an aspect of the present invention, facilitates the use of STP over high-speed, low latency links to provide the capability to synchronize all systems in the CTN to the accuracy of, for instance, a few microseconds when based on a reference time provided by a single server.
Additional information regarding timing networks is provided in the following patent applications, each of which is hereby incorporated herein by reference in its entirety: U.S. Provisional Ser. No. 60/887,584 entitled “Facilitating Synchronization Of Servers In A Coordinated Timing Network” (Docket No. POU920070008US1), filed Jan. 31, 2007; U.S. Ser. No. ______ entitled “Facilitating Synchronization Of Servers In A Coordinated Timing Network” (Docket No. POU920070008US2), filed herewith; U.S. Ser. No. ______ entitled “Facilitating Synchronization Of Servers In A Coordinated Timing Network, And Methods Therefor” (Docket No. POU920070008US4), filed herewith; U.S. Ser. No. ______ entitled “Definition Of A Primary Active Server In A Coordinated Timing Network” (Docket No. POU920070008US3), filed herewith; U.S. Ser. No. ______ entitled “Definition Of A Primary Active Server In A Coordinated Timing Network, And Methods Therefor” (Docket No. POU920070008US5), filed herewith; U.S. Provisional Ser. No. 60/887,562 entitled “Defining A Stratum-1 Configuration In A Coordinated Timing Network” (Docket No. POU920070009US1), filed Jan. 31, 2007; U.S. Ser. No. ______ entitled “Employing Configuration Information To Determine The Role Of A Server In A Coordinated Timing Network” (Docket No. POU920070009US2), filed herewith; U.S. Ser. No. ______ entitled “Employing Configuration Information To Determine The Role Of A Server In A Coordinated Timing Network, And Methods Therefor” (Docket No. POU920070009US3), filed herewith; U.S. Provisional Ser. No. 60/887,576 entitled “Method And System For Establishing A Logical Path Between Servers In A Coordinated Timing Network” (Docket No. POU920070010US1), filed Jan. 31, 2007; U.S. Ser. No. ______ entitled “Establishing A Logical Path Between Servers In A Coordinated Timing Network, And Methods Therefor” (Docket No. POU920070010US3), filed herewith; U.S. Provisional Ser. No. 60/887,586 entitled “Facilitating Recovery In A Coordinated Timing Network” (Docket No. POU920070011US1), filed Jan. 31, 2007; U.S. Ser. No. ______ entitled “Facilitating Recovery In A Coordinated Timing Network” (Docket No. POU920070011US2), filed herewith; U.S. Ser. No. ______ entitled “Facilitating Recovery In A Coordinated Timing Network, And Methods Therefor” (Docket No. POU920070011US3), filed herewith; U.S. Provisional Ser. No. 60/887,544 entitled “Channel Subsystem Server Time Protocol Commands” (Docket No. POU920070012US1), filed Jan. 31, 2007; U.S. Provisional Ser. No. 60/887,512 entitled “Server Time Protocol Messages And Methods” (Docket No. POU920070013US1), filed Jan. 31, 2007; U.S. Ser. No. 11/468,352, entitled “Coordinated Timing Network Configuration Parameter Update Procedure,” filed Aug. 30, 2006; U.S. Ser. No. 11/460,025, entitled “Directly Obtaining By Application Programs Information Usable In Determining Clock Accuracy,” filed Jul. 26, 2006; U.S. Ser. No. 11/223,886, entitled “System And Method For TOD-Clock Steering;” U.S. Ser. No. 11/532,168, entitled “Synchronization Signal For TOD-Clock Steering Adjustment;” U.S. Ser. No. 11/468,501, entitled “Managing Data Access Via A Loop Only If Changed Locking Facility;” U.S. Ser. No. 11/223,878, entitled Clock Filter Dispersion;” U.S. Ser. No. 11/223,876, entitled “Method And System For Clock Skew And Offset Estimation;” U.S. Ser. No. 11/223,577, entitled “Use Of T4 Timestamps To Calculate Clock Offset And Skew;” and U.S. Ser. No. 11/223,642 entitled “System And Method For Calibrating A TOD Clock.”
Although one or more examples have been provided herein, these are only examples. Many variations are possible without departing from the spirit of the present invention. For instance, processing environments other than the examples provided herein may include and/or benefit from one or more aspects of the present invention. Further, the environment need not be based on the z/Architecture®, but instead can be based on other architectures offered by, for instance, IBM®, Intel®, Sun Microsystems, as well as others. Yet further, the environment can include multiple processors, be partitioned, and/or be coupled to other systems, as examples.
As used herein, the term “obtaining” includes, but is not limited to, fetching, receiving, having, providing, being provided, creating, developing, etc.
The capabilities of one or more aspects of the present invention can be implemented in software, firmware, hardware, or some combination thereof. At least one program storage device readable by a machine embodying at least one program of instructions executable by the machine to perform the capabilities of the present invention can be provided.
The flow diagrams depicted herein are just examples. There may be many variations to these diagrams or the steps (or operations) described therein without departing from the spirit of the invention. For instance, the steps may be performed in a differing order, or steps may be added, deleted, or modified. All of these variations are considered a part of the claimed invention.
Although preferred embodiments have been depicted and described in detail herein, it will be apparent to those skilled in the relevant art that various modifications, additions, substitutions and the like can be made without departing from the spirit of the invention, and these are, therefore, considered to be within the scope of the invention, as defined in the following claims.
This application claims priority to U.S. Provisional Application No. 60/887,576, entitled “METHOD AND SYSTEM FOR ESTABLISHING A LOGICAL PATH BETWEEN SERVERS IN A COORDINATED TIMING NETWORK”, filed Jan. 31, 2007, which is hereby incorporated herein by reference in its entirety. This application also contains subject matter which is related to the subject matter of the following application, which is assigned to the same assignee as this application. The below listed application is hereby incorporated herein by reference in its entirety: “ESTABLISHING A LOGICAL PATH BETWEEN SERVERS IN A COORDINATED TIMING NETWORK, AND METHODS THEREFOR,” Carlson et al., U.S. Ser. No.: ______, filed herewith.
Number | Date | Country | |
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60887576 | Jan 2007 | US |