Patent Application
20120327952
The present application relates to the design of a network adapter that allows for offloading networking tasks.
Networking tasks can require a large amount of processing. For this reason, some operating systems, such as the Windows® Operating System, allow for the offloading of certain networking tasks from the host to a network adapter, also called a network interface controller (NIC).
Offloaded networking tasks can include TCP/IP tasks, such as checksum offload, transmission control protocol (TCP) segmentation offload and Internet protocol security (IPSec) offload.
IPsec is a protocol for securing Internet protocol (IP) communications by authenticating and encrypting each IP packet in a communication session. IPsec also includes protocols to establish mutual authentication between agents and to negotiate the cryptographic algorithms and keys used for the communication.
To have a network adapter that allows for networking task offload typically requires that the chip is used in the network adaptor be designed such that it can implement the offloaded tasks. If additional offloaded networking tasks are to be supported by the network adapter, this chip needs to be redesigned.
Currently the classic networking task offload solution is a one-chip solution, in which the offload functionalities are integrated into the ethernet controller. This invention introduces an ethernet tag as a vehicle to carry the offload requests and offload completion statuses between the host and the device, thus the ethernet controller does not need to perform the offload tasks.
In the one-chip offload solution, a new task offload type is likely to require the change of the ethernet controller design. Using this invention, regular and well-defined networking tasks are implemented in the first chip of the controller; however, new task offload features are implemented in a second chip. The value of this invention is to enable modularized design of a network interface card to better support the changing requirements, in that the main (first) chip can be re-used while any new requirements can be supported by the second chip.
Embodiments of the present invention use a two-chip network adapter. The first chip implements the main ethernet controller. The second chip does the offloaded networking tasks. Communication between the host and the second chip, and optionally between the host and the first chip, is done using tags added to the Ethernet frame header of the Ethernet frames.
The added tags in the ethernet frame header allows for the shifting of the offloaded networking tasks to the second chip. New offloaded networking tasks can be added to the network adapter merely by redesigning the smaller and less complex second chip.
The use of the ethernet frame header allows for the data associated with the offloaded task to be indicated without requiring out-of-band communications.
The host 108 adds offload tags to the ethernet frame header of ethernet frames for the offloaded networking tasks. A driver or a portion of the operating system stack at the host 108 can implement these and other functions related to the offloaded networking tasks.
The first chip 104 passes ethernet frames to the second chip 106. The second chip 106 receives the ethernet frames from the first chip and examines the ethernet frames for an offload tag in the ethernet frame header. When an ethernet frame with the offload tag is found, the second chip 106 processes the etherenet frame according to the offloaded networking task.
In addition to the ethernet frame header, the ethernet frames carry data. In the example of the TCP/IP offloaded networking tasks, the data payloads of the ethernet frames contain TCP/IP packets. The second chip 106 processes the TCP/IP packets in the payload of the ethernet frames that indicate that the offload task is to be done. The second chip repackages the processed TCP/IP packets as payload in outgoing ethernet frames and removes the offload tag from the ethernet frame header of the ethernet frames. The second chip 106 then sends the Ethernet frame out to the network 110.
The offload tasks can be a TCP/IP offload task such as an IPsec offload task, a check sum task, a TCP segmentation task or some other offloaded task. As new offloaded tasks are created, the architecture of
The second chip 106 checks the TCP/IP payload of the incoming ethernet frames and processes the TCP/IP packet payload of relevant frames for an offloaded task. For example, the TCP/IP packets can be checked for IPsec protocol information, and then processed. The processed TCP/IP packet payload is repackaged into ethernet frames with the completion tag added to the ethernet frame header.
The second chip 106 forwards the ethernet frame to a first chip 104 that passes the ethernet frame to host 108. As a result of the completion tag, the host 108 will then know that the ethernet frame was processed for the offloaded task by second chip 106.
The foregoing description of preferred embodiments of the present invention has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many embodiments were chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications that are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.
