1. Field of the Invention
This invention relates generally to an evanescent mode resonator and, more particularly, to an evanescent mode resonator that employs a tunable capacitive post.
2. Discussion of the Related Art
Evanescent mode resonators that have a high-Q and low-loss characteristics are known in the art for various applications, such as for filtering RF signals at a receiver front end. A few resonators can be cascaded together to provide an RF filter. One known evanescent mode resonator is micro-machined in silicon, and includes a capacitive post positioned within a cavity in which the RF waves resonate. The size of the cavity, the size of the post and a gap between the post and the cavity wall set the resonant frequency and the quality factor (Q) of the resonator. The capacitive post lowers the resonant frequency of the cavity, which allows an RF signal of a certain frequency to resonate within an otherwise much smaller cavity to provide a relatively small filter structure for lower frequencies.
Known evanescent mode filters are permanently tuned to a particular wavelength, and thus, only operate at that frequency. It would be desirable to selectively tune an evanescent mode filter so that it resonated at different frequencies over a relatively large frequency band.
Further, known evanescent mode filters are generally based on waveguide components, and are therefore, difficult to integrate with other millimeter wave integrated circuits.
In accordance with the teachings of the present invention, an evanescent mode resonator is disclosed that includes a cavity formed within a semiconductor substrate, such as silicon. A capacitive post is provided within the cavity. An RF signal is introduced into the cavity, which resonates therein, and is output from the cavity having a narrow frequency band. A flexible element is positioned within a wall of the cavity proximate to the capacitive post, where the flexible element is electrically moved relative to the post to change the gap between the flexible element and the post, and tune the frequency of the cavity.
Additional features of the present invention will become apparent from the following description and appended claims, taken in conjunction with the accompanying drawings.
a)-3(m) are cross-sectional views of various semiconductor layers showing processing steps for fabricating an evanescent mode resonator, according to an embodiment of the present invention.
The following discussion of the embodiments of the invention directed to a tunable evanescent mode resonator and method for making same is merely exemplary in nature, and is in no way intended to limit the invention or its applications or uses.
The substrate layer 12 and the cover 20 are micro-machined from a semiconductor material, such as silicon. By fabricating the filter 10 from a semiconductor material, the filter 10 can be integrated on a common semiconductor wafer with other semiconductor devices.
A metallized input connector 28 is formed on a top surface 30 of the cover 20. An input coplanar waveguide 32 is patterned on the top surface 30 of the cover 20 and is impedance matched to the connector 28. Likewise, a metallized output connector 34 is formed on the top surface 30 opposite to the input connector 28. An output coplanar waveguide 36 is patterned on the top surface 30 relative to the output connector 34, and is impedance matched thereto.
A slot 38 is provided through the metallized layer on the bottom surface of the cover 20 relative to the coplanar waveguide 32, and a slot 40 is provided through the metallized layer on the bottom surface of the cover 20 relative to the coplanar waveguide 36. An RF signal coupled to the connector 28 propagates down the waveguide 32 through the slot 38 and into the cavity 14. A controlled gap is provided between the capacitive post 16 and the metallized layer on the bottom surface of the cover 20. The gap defines the frequency tuning of the filter 10, where the combination of the three capacitive posts 16 provides the filter. The tuned RF output signal propagates through the slot 40 down the waveguide 36 and is output by the output connector 34.
As mentioned above, the gap between the metallized undersurface of the cover 20 and the capacitive posts 16 define the frequency tuning of the filter 10. According to the invention, flexible elements 50 are provided in the cover 20 relative to the capacitive posts 16, and are movable to increase or decrease the gap therebetween. In one non-limiting embodiment, the flexible elements 50 are piezoelectric transducers that receive a DC bias signal on lines 52 that control their flexure. In an alternate embodiment, the flexible elements 50 are thermal elements that expand when they are heated. In another embodiment, the flexible elements 50 are static elements that flex in response to an electrostatic field. It has been shown that each flexible element 50 can change the tuning of the filter 20 in the range of 10-15 GHz.
The evanescent mode filter 10 is a filter because of the plurality of capacitive post 16 provided in the cavity 14. If a single capacitive post 16 were provided in the cavity 14, then the filter 10 would be a resonator. In an alternate embodiment, a plurality of evanescent mode resonators can be cascaded together where the connector 34 is coupled to an input connector of a next resonator in the cascaded series.
Many applications require an RF signal to be filtered. In one embodiment, the connector 28 is electrically coupled to an input antenna, and the output connector 34 is electrically coupled to an RF front end of a receiver. Therefore, the signals that are received by the antenna are filtered to pass only the desired RF wavelength.
a)-3(m) are cross-sectional views of various semiconductor layers showing processing steps for fabricating an evanescent mode resonator, according to an embodiment of the present invention. As discussed above, the evanescent mode resonator is micro-machined in silicon, or another suitable semiconductor wafer, such GaAs, InP, etc., so that it can be effectively integrated with other semiconductor devices. As will be appreciated by those skilled in the art, various other semiconductor fabrication steps can also be performed to provide an evanescent mode resonator of the invention.
a) shows a semiconductor wafer 102 that has been micro-machined to about 500 μm thick. A conductive layer 104, such as Cr/Au, is deposited, for example by sputtering, on the semiconductor substrate 102, and is patterned using a suitable mask (not shown) to define openings 106 and alignment marks (holes) 108.
b) shows covering the alignment marks 108 with a patterned mask 110, and performing a deep reactive ion etch (DRIE) into the substrate 102 through the openings 106 to provide a recess 112 that defines the cavity, where the remaining portion 114 will be a capacitive post. In one embodiment, the recess 112 is about 450 μm deep, leaving a 50 μm thickness at the bottom of the substrate 102.
c) shows a spacer wafer 116, such as a silicon wafer, mounted to a handling wafer 118. In one non-limiting embodiment, the spacer wafer 116 is about 100 μm thick. A conductive layer 120, such as Cr/Au, is deposited, for example by sputtering, on the wafer 116, and is patterned using a suitable mask (not shown) to define an opening 122 that will align with the recess 112 and alignment marks (holes) 124 that will align with the alignment marks 108.
d) shows a DRIE has been performed through the opening 122 and the alignment marks 124 all of the way through the spacer wafer 116.
e) shows that the handling wafer 118 has been removed from one side of the wafer 116 and mounted to the other side of the wafer 116. A photoresist layer 126 is patterned and deposited within the opening 122 and the alignment marks 124 on the wafer 116, and a conductive layer 128 is then deposited, such as by sputtering, on the photoresist layer 122.
f) shows that the handling wafer 118 has been removed from the spacer wafer 116, and the spacer wafer 116 has been mounted to the substrate 102 using the conductive layers 104 and 128, where the alignment marks 108 and 124 are aligned. Any suitable fabrication technique can be used to cause the conductive layers 104 and 128 to form together.
g) shows a conductive layer 130, such as Au, is deposited, such as by sputtering, over the entire combination of the substrate 102 and the spacer layer 116.
h) shows a semiconductor wafer 140, such as silicon, attached to a handling wafer 142, where a side of the wafer 140 opposite to the handling wafer 142 is coated with a conductive layer 144, such as gold, by, for example, sputtering. The wafer 140 will be the cover of the resonator.
i) shows that the conductive layer 144 has been patterned and etched to provide alignment marks 146, slots 150 so that RF energy can get into and out of the cavity and windows 148 for visually inspecting the wafer fabrication.
j) shows a DRIE has been performed into the wafer 140 at the alignment marks 146 and the windows 148, where the slots 150 have been covered with a photoresist 154 so that they are not etched.
The handling wafer 142 is removed from the wafer 140, and the wafers 102, 116 and 140 are all bonded together using the various conductive layers, as shown in
l) shows a blanket deposit of a conductive layer 156, such as gold, by, for example, sputtering, on the wafers 102, 116 and 140.
m) shows an etch has been performed through the conductive layer 156 to create the input and output lines 158 and 160, and window metallization to provide the resonator.
The foregoing discussion discloses and describes merely exemplary embodiments of the present invention. One skilled in the art will readily recognize from such discussion, and from the accompanying drawings and claims, that various changes, modifications and variations can be made therein without departing from the spirit and scope of the invention as defined in the following claims.