Patent Application
20090248601
1. Field of the Invention
This invention relates to the simplification of satisfiability problem proofs using double pivot reduction.
2. Description of Background
Satisfiability (“SAT”) problems are decision problems, i.e., given an expression, determine if there is some assignment of variables that make the entire expression true. SAT problems have applications in a variety of areas including computer science, automation, and artificial intelligence.
A well known algorithm for solving SAT problems is the Davis-Putnam-Logemann-Loveland algorithm (“DPLL”). DPLL-based SAT solvers progress by implicitly applying binary resolution. They generate resolution proofs that are useful for a variety of purposes in formal verification and elsewhere including: extracting an unsatisfiable core in case the formula is unsatisfiable, extracting an interpolant, and detecting clauses that can be reused in an incremental satisfiability setting such as the one used in Bounded Model-Checking.
SAT problem solutions are typically presented as proofs and can be presented in a form called Directed Acyclic Graph (“DAG”). When a prior art SAT solver produces a proof, it can contain redundant resolutions. While there are methods such as Run till fix, Core Trimmer and Proof Tightening that are known in the art as methods of simplifying proofs, the prior art does not disclose a method for simplifying proofs by identifying and removing redundant resolutions.
The shortcomings of the prior art are overcome and additional advantages are provided through the use of a method for simplifying resolution proofs in DAG format where each leaf node represents a clause and each internal node represents a resolution between its children by representing a SAT proof as a stripped proof, analyzing pivots to identify redundant resolutions, and constructing a simplified proof without the redundant resolutions.
Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.
As a result of the summarized invention, SAT proofs are simplified This simplification results in a savings of processing time and cost in use of the simplified proof in place of the original proof.
The subject matter which is regarded as the invention is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
The detailed description explains the preferred embodiments of the invention, together with advantages and features, by way of example with reference to the drawings.
The invention herein involves simplification of SAT proofs using a method called double pivot reduction. Double pivot reduction relies on the exploitation of the double pivot phenomena. When two resolutions occur on the same branch of a proof in a tree form, the bottom one, i.e., the one closest to the leafs is redundant. This bottom resolution can be removed from the proof and thus enable its simplification.
In a DAG presentation, let node n1 rule node n2 if every path from root to n2 passes through n1. Given a DAG form of a SAT proof, the preferred embodiment identifies double resolutions on the same pivot where one is ruling the other and removes the bottom resolution.
It is well known in the art that some reordering of resolutions in a SAT proof is possible. A preferred embodiment involves reordering to increase the double pivot effect and using it for further simplification.
With reference to the accompanying drawings,
The computing device 34 is shown including a processor 38, a memory 40, an input/output (I/O) interface 42, and a bus 44. Further, the computing device 34 is shown in communication with an external I/O device/resource 46 and a storage system 48. As is known in the art, in general, the processor 38 executes computer program code, which is stored in memory 40 and/or storage system 48. While executing computer program code, the processor 38 can read and/or write data, such as the range boundary 50, to/from memory 40, storage system 48, and/or I/O interface 42. The bus 44 provides a communications link between each of the components in the computing device 34. The I/O device 46 can comprise any device that enables an individual to interact with the computing device 34 or any device that enables the computing device 34 to communicate with one or more other computing devices using any type of communications link.
The computing device 34 can comprise any general purpose computing article of manufacture capable of executing computer program code installed thereon (e.g., a personal computer, server, handheld device, etc.). However, it is understood that the computing device 34 is only representative of various possible equivalent computing devices that may perform the processes described herein. Similarly, the computer infrastructure 32 is only illustrative of various types of computer infrastructures for implementing the invention. For example, in one embodiment, the computer infrastructure 32 comprises two or more computing devices (e.g., a server cluster) that communicate over any type of communications link, such as a network, a shared memory, or the like, to perform the process described herein.
A preferred embodiment is disclosed in the example provided in
The following pseudo code provides a preferred implementation of the claimed method.
A proof is a directed acyclic graph (DAG) P with a single root, P.root, where each node represents a clause n.C. The single root represents the clause CConclusion. For every node n the following holds:
Definition (Stripped Proof) A stripped proof is a directed acyclic graph (DAG) with a single root where each leaf node represents a clause. Every non leaf node has either one or two children.
Defenition (Stripped Pivot Proof). A stripped pivot proof is a stripped proof where each internal node n with 2 children is annotated by a literal pivot n. piv.
Algorithm stripp
Input: A proof P
Output: A striped proof P′
Comment: For each Proof P Stripping (P) is a stripped Proof
Algorithm reconstruct
Input: A stripped pivot proof P
Output: P holds a proof
mark all nodes of P as unvisited
recursiveReconsturct (P, root (P))
Algorithm recursiveReconsturct
Input: Stripped Proof P and node n
Output: P such that the sub proof starting at n is a proof of n.c.
Comment for each Proof P reconstruct (stripp (P))==P
Definition clause partial order
C1≧C2 iff all lits of C1 are included in C2
Definition Proof partial order
Algorithm: doublePivotReduction
input: a stripped proof P
output: a (“stronger”, see comment below) stripped proof P
comment: reconstruct (doublePivotReduction (stripp (P))==P
While the preferred embodiment to the invention has been described, it will be understood that those skilled in the art, both now and in the future, may make various improvements and enhancements which fall within the scope of the claims which follow. These claims should be construed to maintain the proper protection for the invention first described.
