Claims
- 1. An extended range frequency synthesiser responsive to a number of different input frequencies to provide multiples of those input frequencies as its final outputs comprising:
a phase locked loop having an output frequency range containing a multiple of each of the final output frequencies; and a pre-divider circuit for dividing the input frequencies by a first predetermined number before submission to said phase locked loop and a post-divider circuit for dividing the phase locked loop output by a second predetermined number to obtain the final output while operating the phase locked loop in said output frequency range.
- 2. The extended range frequency synthesiser of claim 1 in which said phase locked loop includes a voltage controlled oscillator for providing an output which is a multiple of the input to the phase locked loop; a loop divider for dividing the voltage controlled oscillator output by a third predetermined number; a phase detector responsive to the input to the phase locked loop and to the loop divider output for detecting any error between the two, and a loop filter responsive to an error detected by said phase detector to drive the voltage controlled oscillator to correct the error.
- 3. The extended range frequency synthesiser of claim 1 in which the first and second predetermined numbers may be integers.
- 4. The extended range frequency synthesiser of claim 2 in which the third predetermined number may be an integer.
- 5. The extended range frequency synthesiser of claim 1 in which said phase locked loop has an operating point within said frequency range and said multiples of said final output frequencies deviate fractionally from said operating point.
- 6. The extended range frequency synthesiser of claim 2 in which said first, second and third predetermined numbers are different.
RELATED APPLICATIONS
[0001] This application claims priority of U.S. Provisional Application No. 60/297,288, filed on Jun. 11, 2001, and entitled “A FREQUENCY SYNTHESISER, AND A METHOD FOR SYNTHESISING RESPECTIVE OUTPUT FREQUENCY SIGNALS FROM CORRESPONDING INPUT FREQUENCY SIGNALS IN A PHASE-LOCKED LOOP FREQUENCY SYNTHESISER.”
Provisional Applications (1)
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Number |
Date |
Country |
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60297288 |
Jun 2001 |
US |